On Fri, Jun 10, 2016 at 2:11 PM, Geert Uytterhoeven
wrote:
> Hi Rob,
>
> On Fri, Jun 10, 2016 at 7:39 PM, Rob Herring wrote:
>> On Thu, Jun 09, 2016 at 02:41:33PM +0100, Kieran Bingham wrote:
>>> The power domain must be specified to bring the device out of module
>>> standby. Document this in th
Hi Morimoto-san,
On Wednesday 25 May 2016 00:38:48 Kuninori Morimoto wrote:
> Hi David, Laurent
>
> These removes unneeded error message from Renesas DU driver.
> Current this unneeded error message makes user confuse.
Thank you for the patches. For both of them,
Reviewed-by: Laurent Pinchart
On 06/10/2016 11:42 PM, Geert Uytterhoeven wrote:
The only problem I'm seeing (again) is the RCAN clock failing to
register:
rcar_gen2_cpg_clocks_init: failed to register cpg_clocks rcan clock (-12)
I was going to look at it yesterday but (wrongly) thought it somehow
cured itself... I'll
Hi Sergei,
On Fri, Jun 10, 2016 at 9:29 PM, Sergei Shtylyov
wrote:
>The only problem I'm seeing (again) is the RCAN clock failing to
> register:
>
> rcar_gen2_cpg_clocks_init: failed to register cpg_clocks rcan clock (-12)
>
>I was going to look at it yesterday but (wrongly) thought it so
On 06/10/2016 04:02 AM, Simon Horman wrote:
[...]
And that the system behaves sanely on suspend/resume.
I'd be thankful if you told me how to test that. :-)
System suspend:
echo mem > /sys/power/state
Oh. I know that one! :-)
System resume: You're gonna need a "wakeup-source"
Hi Rob,
On Fri, Jun 10, 2016 at 7:39 PM, Rob Herring wrote:
> On Thu, Jun 09, 2016 at 02:41:33PM +0100, Kieran Bingham wrote:
>> The power domain must be specified to bring the device out of module
>> standby. Document this in the example provided, so that new additions
>> are not missed.
>>
>> S
On Mon, Jun 6, 2016 at 4:04 PM, Bjorn Helgaas wrote:
> Several host bridge drivers (designware and all derivatives, iproc,
> xgene, xilinx, and xilinx-nwl) don't request the MMIO and I/O port
> windows they forward downstream to the PCI bus.
>
> That means the PCI core can't request resources for
On Thu, Jun 09, 2016 at 02:41:34PM +0100, Kieran Bingham wrote:
> The FDP1 is a de-interlacing module which converts interlaced video to
> progressive video. It is also capable of performing pixel format conversion
> between YCbCr/YUV formats and RGB formats.
>
> Signed-off-by: Kieran Bingham
> -
On Thu, Jun 09, 2016 at 02:41:33PM +0100, Kieran Bingham wrote:
> The power domain must be specified to bring the device out of module
> standby. Document this in the example provided, so that new additions
> are not missed.
>
> Signed-off-by: Kieran Bingham
> ---
> Documentation/devicetree/bind
On Thu, Jun 09, 2016 at 02:41:32PM +0100, Kieran Bingham wrote:
> The FCP driver, can also support the FCPF variant for FDP1 compatible
Drop the comma.
> processing.
>
> Signed-off-by: Kieran Bingham
> ---
> Documentation/devicetree/bindings/media/renesas,fcp.txt | 4 +++-
> 1 file changed, 3
On Fri, Jun 10, 2016 at 05:24:12PM +0200, Daniel Vetter wrote:
> On Tue, Jun 07, 2016 at 01:48:01PM +0200, Boris Brezillon wrote:
> > For all outputs except dp_mst, we have a 1:1 relationship between
> > connectors and encoders and the driver is relying on the atomic helpers:
> > we can drop the cu
On Tue, Jun 07, 2016 at 01:47:55PM +0200, Boris Brezillon wrote:
> Hello,
>
> This patch series aims at replacing all dummy ->best_encoder()
> implementations where we have a 1:1 relationship between encoders
> and connectors.
> The core already provides the drm_atomic_helper_best_encoder()
> func
On Tue, Jun 07, 2016 at 01:48:01PM +0200, Boris Brezillon wrote:
> For all outputs except dp_mst, we have a 1:1 relationship between
> connectors and encoders and the driver is relying on the atomic helpers:
> we can drop the custom ->best_encoder() implementation and let the core
> call drm_atomic
From: Wolfram Sang
It must be "drive-strength", with a hyphen.
Signed-off-by: Wolfram Sang
---
Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt
Hi Geert,
Thank you for the patch.
On Friday 10 Jun 2016 09:44:33 Geert Uytterhoeven wrote:
> According to the latest information, the parent clock of the LVDS module
> clock is the S0D4 clock, not the S2D1 clock.
>
> Note that this change has no influence on actual operation, as the
> rcar-du L
On Friday 10 Jun 2016 09:58:28 Geert Uytterhoeven wrote:
> Hi Dirk,
>
> On Thu, Jun 2, 2016 at 7:42 AM, Dirk Behme wrote:
> >> +int __init rcar_rst_read_mode_pins(u32 *mode)
> >
> > Just a style issue: Is the string 'pins' in the function name still
> > relevant? I.e. what's about just 'rcar_rst
Name the Pin Function Controller subnode for SCIFA1 after its device
name, instead of after the serial port alias.
This avoids conflicts when enabling support for more serial ports later,
either here or in a DT overlay.
Signed-off-by: Geert Uytterhoeven
---
arch/arm/boot/dts/r8a7740-armadillo80
Name the Pin Function Controller subnode for SCIF0 after its device
name, instead of after the serial port alias.
This avoids conflicts when enabling support for more serial ports later,
either here or in a DT overlay.
Signed-off-by: Geert Uytterhoeven
---
arch/arm/boot/dts/r8a7778-bockw.dts |
Name the Pin Function Controller subnode for SCIF2 after its device
name, instead of using some arbitrary name that looks like a serial port
alias, but differs from the actual alias.
This avoids conflicts when enabling support for more serial ports later,
either here or in a DT overlay.
Signed-of
Name the Pin Function Controller subnode for SCIF2 after its device
name, instead of using some arbitrary name that looks like a serial port
alias, but differs from the actual alias.
This avoids conflicts when enabling support for more serial ports later,
either here or in a DT overlay.
Signed-of
Name the Pin Function Controller subnode for MMC0 after its device name,
instead of using the generic and indexless "mmc".
This avoids conflicts when enabling support for more MMC interfaces
later, either here or in a DT overlay.
Signed-off-by: Geert Uytterhoeven
---
arch/arm/boot/dts/r8a73a4-a
Name the Pin Function Controller subnodes for SCIF0 and SCIFA1 after
their device names, instead of after the serial port aliases.
This avoids conflicts when enabling support for more serial ports later,
either here or in a DT overlay.
Signed-off-by: Geert Uytterhoeven
---
arch/arm/boot/dts/r8a
Name the Pin Function Controller subnodes for SCIF2 and SCIF4 after
their device names, instead of using some arbitrary names that look like
serial port aliases, but differ from the actual aliases.
This avoids conflicts when enabling support for more serial ports later,
either here or in a DT over
Name the Pin Function Controller subnodes for SCIF0 and SCIF1 after
their device names, instead of after the serial port aliases.
This avoids conflicts when enabling support for more serial ports later,
either here or in a DT overlay.
Signed-off-by: Geert Uytterhoeven
---
arch/arm/boot/dts/r8a7
Name the Pin Function Controller subnode for QSPI after its device name,
instead of after the spi interface alias.
This avoids conflicts when enabl support for more spi interfaces later,
either here or in a DT overlay.
Signed-off-by: Geert Uytterhoeven
---
arch/arm/boot/dts/r8a7793-gose.dts | 2
Name the Pin Function Controller subnodes for QSPI and MSIOF0 after
their device names, instead of after the spi interface aliases.
This avoids conflicts when enabling support for more spi interfaces
later, either here or in a DT overlay.
Signed-off-by: Geert Uytterhoeven
---
arch/arm/boot/dts/
Name the Pin Function Controller subnodes for SCIF0 and SCIF1 after
their device names, instead of after the serial port aliases.
This avoids conflicts when enabling support for more serial ports later,
either here or in a DT overlay.
Signed-off-by: Geert Uytterhoeven
---
arch/arm/boot/dts/r8a7
Name the Pin Function Controller subnodes for QSPI and MSIOF1 after
their device names, instead of after the spi interface aliases.
This avoids conflicts when enabling support for more spi interfaces
later, either here or in a DT overlay.
Signed-off-by: Geert Uytterhoeven
---
arch/arm/boot/dts/
Name the Pin Function Controller subnode for QSPI after its device name,
instead of after the spi interface alias.
This avoids conflicts when enabl support for more spi interfaces later,
either here or in a DT overlay.
Signed-off-by: Geert Uytterhoeven
---
arch/arm/boot/dts/r8a7794-alt.dts | 2
Name the Pin Function Controller subnode for SCIFA0 after its device
name, instead of after the serial port alias.
This avoids conflicts when enabling support for more serial ports later,
either here or in a DT overlay.
Signed-off-by: Geert Uytterhoeven
---
arch/arm/boot/dts/r8a73a4-ape6evm.dts
Name the Pin Function Controller subnode for QSPI after its device name,
instead of after the spi interface alias.
This avoids conflicts when enabling support for more spi interfaces
later, either here or in a DT overlay.
Signed-off-by: Geert Uytterhoeven
---
arch/arm/boot/dts/r8a7791-porter.dt
Name the Pin Function Controller subnode for QSPI after its device name,
instead of after the spi interface alias.
This avoids conflicts when enabling support for more spi interfaces
later, either here or in a DT overlay.
Signed-off-by: Geert Uytterhoeven
---
arch/arm/boot/dts/r8a7794-silk.dts
Name the Pin Function Controller subnode for VIN1 after its device name,
instead of using the generic and indexless "vin".
This avoids conflicts when enabling support for more video inputs later,
either here or in a DT overlay.
Signed-off-by: Geert Uytterhoeven
---
arch/arm/boot/dts/r8a7790-lag
Name the Pin Function Controller subnode for SCIFA4 after its device
name, instead of after the serial port alias.
This avoids conflicts when adding support for more serial ports later,
either here or in a DT overlay.
Signed-off-by: Geert Uytterhoeven
---
arch/arm/boot/dts/sh73a0-kzm9g.dts | 2
Name the Pin Function Controller subnode for SCIF0 after its device
name, instead of after the serial port alias.
This avoids conflicts when enabling support for more serial ports later,
either here or in a DT overlay.
Signed-off-by: Geert Uytterhoeven
---
arch/arm/boot/dts/r8a7791-porter.dts |
Hi Simon, Magnus,
Currently board DTS files use various naming conventions for the Pin
Function Controller subnodes. This may cause conflicts when enabling
support for more instances later, either directly in board DT files, or
in DT overlays. These conflicts are most likely to happen fo
Hi Laurent,
On Fri, Jun 10, 2016 at 2:16 PM, Laurent Pinchart
wrote:
> On Friday 10 Jun 2016 12:05:02 Geert Uytterhoeven wrote:
>> The Renesas Pin Function Controller uses two header files:
>> - sh_pfc.h, for use by both core code and SoC-specific drivers,
>> - core.h, for internal use by the
Today I learned about make C=1
So ... reviewing my own patch, consider the following sparse warnings
'fixed up'
I'll run make C=1 before any future submissions from now on.
On 09/06/16 18:37, Kieran Bingham wrote:
> The FDP1 driver performs advanced de-interlacing on a memory 2 memory
> based v
On Wed, Jun 08, 2016 at 10:58:23AM +0900, Yoshihiro Shimoda wrote:
> From: Ryo Kodama
>
> This patch adds to check the return value from pwm_apply_state()
> used in enable_store(). The error of enable_store() doesn't work
> if the return value doesn't received.
>
> Signed-off-by: Ryo Kodama
> S
Hi Geert,
Thank you for the patch.
On Friday 10 Jun 2016 11:58:19 Geert Uytterhoeven wrote:
> With C=1:
>
> drivers/pinctrl/sh-pfc/pfc-sh7757.c:1613:9: warning: Initializer entry
> defined twice drivers/pinctrl/sh-pfc/pfc-sh7757.c:1628:9: also defined
> here
>
> Remove the duplicate initi
Hi Geert,
Thank you for the patch.
On Friday 10 Jun 2016 12:05:02 Geert Uytterhoeven wrote:
> The Renesas Pin Function Controller uses two header files:
> - sh_pfc.h, for use by both core code and SoC-specific drivers,
> - core.h, for internal use by the core code only.
>
> Several SoC-speci
Hi Wolfram,
On Fri, Jun 10, 2016 at 1:12 PM, Wolfram Sang wrote:
>> BTW, are these a hard dependency for patch 3, or will the missing power
>> source control just be ignored?
>
> Long answer short: It is a hard dependency.
>
> It shouldn't be, but fixing this might need patches to pfc, mmc-core,
> BTW, are these a hard dependency for patch 3, or will the missing power
> source control just be ignored?
Long answer short: It is a hard dependency.
It shouldn't be, but fixing this might need patches to pfc, mmc-core,
and sdhi driver. Need to think about it. (and even then, patch 3 will be
d
For consistency with a57_0/a57_1 cpu nodes, and all other nodes.
Signed-off-by: Geert Uytterhoeven
---
arch/arm64/boot/dts/renesas/r8a7795.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index fca68d7
Hi,
This series contains various cleanups for the Renesas Pin Function
Controller driver subsystem.
This has been tested on r8a7791/koelsch, and compile-tested for other
ARM and SH platforms.
I plan to queue this in sh-pfc-for-v4.8.
Thanks for your comments!
Geert Uytterhoeven (3):
p
With C=1:
drivers/pinctrl/sh-pfc/pfc-emev2.c:1695:30: warning: symbol
'emev2_pinmux_info' was not declared. Should it be static?
drivers/pinctrl/sh-pfc/pfc-r8a7779.c:3888:30: warning: symbol
'r8a7779_pinmux_info' was not declared. Should it be static?
Note that there are more warnings o
This allows to remove the .remove() callback, and all functions and data
it needed for its own bookkeeping.
Suggested-by: Laxman Dewangan
Signed-off-by: Geert Uytterhoeven
---
drivers/pinctrl/sh-pfc/core.c | 10 --
drivers/pinctrl/sh-pfc/core.h | 1 -
drivers/pinctrl/sh-pfc/gpio.c
The Renesas Pin Function Controller uses two header files:
- sh_pfc.h, for use by both core code and SoC-specific drivers,
- core.h, for internal use by the core code only.
Several SoC-specific drivers include core.h, as they need the sh_pfc
structure, which is passed explicitly to the various
With C=1:
drivers/pinctrl/sh-pfc/pfc-sh7757.c:1613:9: warning: Initializer entry
defined twice
drivers/pinctrl/sh-pfc/pfc-sh7757.c:1628:9: also defined here
Remove the duplicate initializer to fix this.
Signed-off-by: Geert Uytterhoeven
---
Based on the comment near the definition of
On 10.06.2016 09:58, Geert Uytterhoeven wrote:
Hi Dirk,
On Thu, Jun 2, 2016 at 7:42 AM, Dirk Behme wrote:
+int __init rcar_rst_read_mode_pins(u32 *mode)
Just a style issue: Is the string 'pins' in the function name still
relevant? I.e. what's about just 'rcar_rst_read_mode()'?
I feel "mode
Hi Dirk,
On Thu, Jun 2, 2016 at 7:42 AM, Dirk Behme wrote:
>> +int __init rcar_rst_read_mode_pins(u32 *mode)
>
> Just a style issue: Is the string 'pins' in the function name still
> relevant? I.e. what's about just 'rcar_rst_read_mode()'?
I feel "mode" is a too generic word for a public API.
It
Hi Laurent,
On Thu, Jun 2, 2016 at 11:58 PM, Laurent Pinchart
wrote:
>> --- /dev/null
>> +++ b/drivers/soc/renesas/rcar-rst.c
>> +static int __init rcar_rst_init(void)
>> +{
[...]
>> +}
>> +arch_initcall(rcar_rst_init);
>
> Given that rcar_rst_init() is only used as a support function for
> rc
Hi Laurent,
On Thu, Jun 2, 2016 at 11:47 PM, Laurent Pinchart
wrote:
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/reset/renesas,rst.txt
>> @@ -0,0 +1,35 @@
>> +DT bindings for the Renesas R-Car Reset Controller
>> +
>> +The R-Car Reset Controller provides reset control, and impleme
According to the latest information, the parent clock of the LVDS module
clock is the S0D4 clock, not the S2D1 clock.
Note that this change has no influence on actual operation, as the
rcar-du LVDS encoder driver doesn't use the parent clock's rate.
Signed-off-by: Geert Uytterhoeven
---
Will que
On Thu, Jun 9, 2016 at 6:56 PM, Kieran Bingham wrote:
> Signed-off-by: Kieran Bingham
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical
On Thu, Jun 9, 2016 at 6:56 PM, Kieran Bingham wrote:
> Provide nodes for the FCP devices dedicated to the FDP device channels.
>
> Signed-off-by: Kieran Bingham
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux be
Hi Kieran,
On Thu, Jun 9, 2016 at 6:12 PM, Kieran Bingham wrote:
> Reviewed-by: Geert Uytterhoeven
> Reviewed-by: Laurent Pinchart
> Signed-off-by: Kieran Bingham
> ---
> drivers/clk/renesas/r8a7795-cpg-mssr.c | 3 +++
> 1 file changed, 3 insertions(+)
Thanks queued in clk-renesas-for-v4.8.
Hi Wolfram,
On Mon, Jun 6, 2016 at 6:08 PM, Wolfram Sang wrote:
> This series adds support for PFC voltage switching for r8a7795. I decided to
> refactor voltage switching because all Gen2 and Gen3 hardware follow the same
> style to do that. So, we can put generic handling to the core and keep o
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