On Thu, Jun 30, 2016 at 12:30:56PM +0100, Chris Wilson wrote:
> Backlights controlled by i915.ko and only associated with its connectors
> and also only associated with the intel_drmfb fbcon, controlled by
> i915.ko. In this situation, we already handle adjusting the backlight
> when the fbcon is b
On 07/12/2016 12:50 AM, Sergei Shtylyov wrote:
Here's the set of 2 patches against Simon Horman's 'renesas.git' repo,
'renesas-devel-20160711-v4.7-rc7' tag. I've found a couple of issues in the
R8A7792 DT clock descriptions, so these patches are targeted as fixes for 4.8.
Oops, those wer
Define the generic R8A7792 part of the SDHI0 device node.
Signed-off-by: Sergei Shtylyov
---
arch/arm/boot/dts/r8a7792.dtsi | 12
1 file changed, 12 insertions(+)
Index: renesas/arch/arm/boot/dts/r8a7792.dtsi
===
--
Describe the SDHI0 clock and its parent, SD clock in the R8A7792 device tree.
Signed-off-by: Sergei Shtylyov
---
arch/arm/boot/dts/r8a7792.dtsi | 16
1 file changed, 16 insertions(+)
Index: renesas/arch/arm/boot/dts/r8a7792.dtsi
==
Hello.
Here's the set of 2 patches against Simon Horman's 'renesas.git' repo,
'renesas-devel-20160711-v4.7-rc7' tag plus the R8A7792 PFC/GPIO/EtherAVB
patchsets. We're adding the R8A7792 SDHI clocks and device nodes. They have
been tested on the Blanche board -- I'm not posting the Blanche patc
Add the EtherAVB pin groups to the R8A7792 PFC driver.
Signed-off-by: Sergei Shtylyov
---
The patch is against the 'devel' branch of Linus Walleij's 'linux-pinctrl.git'
repo plus my 2 R8A7792 PFC patches posted before...
Changes in version 2:
- added AVB_AVTP_MATCH pin group.
drivers/pinctrl/
Add SDHI0 pin groups to the R8A7792 PFC driver.
Signed-off-by: Sergei Shtylyov
---
The patch is against the 'devel' branch of Linus Walleij's 'linux-pinctrl.git'
repo plus my 2 R8A7792 PFC patches posted before and the EtherAVB patch just
reposted...
drivers/pinctrl/sh-pfc/pfc-r8a7792.c | 5
On Mon, Jul 11, 2016 at 11:51 PM, Sergei Shtylyov
wrote:
> Despite the QSPI clock has PLL1/VCOx1/4 clock as a parent, the latter
> hasn't been added to the R8A7792 device tree -- fix this overlook at
> last...
>
> Signed-off-by: Sergei Shtylyov
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}
On Mon, Jul 11, 2016 at 11:52 PM, Sergei Shtylyov
wrote:
> Simon Horman told me that R8A7792 had ADSP clock (based on the most recent
... based on a probably incorrect table in ...
> R-Car gen2 manual) but when I got that manual as well, this claim proved
> to be false: R8A7792 is the only ge
On Tue, Jul 12, 2016 at 11:10 PM, Sergei Shtylyov
wrote:
> Describe the SDHI0 clock and its parent, SD clock in the R8A7792 device tree.
>
> Signed-off-by: Sergei Shtylyov
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots o
On Tue, Jul 12, 2016 at 11:11 PM, Sergei Shtylyov
wrote:
> Define the generic R8A7792 part of the SDHI0 device node.
>
> Signed-off-by: Sergei Shtylyov
Reviewed-by: Geert Uytterhoeven
> ---
> arch/arm/boot/dts/r8a7792.dtsi | 12
> 1 file changed, 12 insertions(+)
>
> Index: ren
According to the datasheet, SDn clocks are from the SDSRC clock. And
the SDSRC has a 1/2 divider. So, we should have ".sdsrc" as an internal
core clock. Otherwise, since the sdhi driver will calculate clock for
a sd card using the wrong parent clock rate, and then performance will
be not good.
Sig
On Tue, Jul 12, 2016 at 11:38 PM, Sergei Shtylyov
wrote:
> Add the EtherAVB pin groups to the R8A7792 PFC driver.
>
> Signed-off-by: Sergei Shtylyov
Reviewed-by: Geert Uytterhoeven
> ---
> The patch is against the 'devel' branch of Linus Walleij's 'linux-pinctrl.git'
> repo plus my 2 R8A7792 P
On Tue, Jul 12, 2016 at 11:40 PM, Sergei Shtylyov
wrote:
> Add SDHI0 pin groups to the R8A7792 PFC driver.
>
> Signed-off-by: Sergei Shtylyov
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@l
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