Check the MD_CLK pin to determine the current clock mode in order to set
the pll clock parent correctly.
Signed-off-by: Chris Brandt
---
v2:
* Switched to reading MD_CLK pin to determine mode
---
drivers/clk/renesas/clk-rz.c | 21 +
1 file changed,
Hello.
On 08/29/2016 05:41 PM, Chris Brandt wrote:
The RZ/A1 has a TSU, but since it only has one Ethernet port, it does
not have POST registers.
I'm not sure the reason is having one port... do you have the old SH manuals
somewhere? :-)
Yes, I used to support the SH7757.
Good to
Define the Wheat board dependent part of the CAN0/1 device nodes...
Based on the original (and large) patch by Vladimir Barinov
<vladimir.bari...@cogentembedded.com>.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
---
This patch is against the 'renesas-devel-2
On Mon, Aug 29, 2016 at 8:39 PM, Sergei Shtylyov
wrote:
>> + np = of_find_node_by_name(NULL, "usb_x1");
>
>
>"usb_x1" looks like a board specific name too much. Previously on R-Car
> we had the USB_EXTAL pin, maybe that one would be better?
On Mon, Aug 29, 2016 at 8:14 PM, Chris Brandt wrote:
> Add RSKRZA1 Device tree bindings Documentation, listing it as a supported
> board.
>
> This allows to use checkpatch to validate DTSes referring to the RSKRZA1
> board.
>
> Signed-off-by: Chris Brandt
Hello.
On 08/25/2016 10:05 PM, Chris Brandt wrote:
Instead of hard coding EXTAL only, check if EXTAL was specified. If not,
then assume the USB clock is used as the main system clock.
Signed-off-by: Chris Brandt
---
drivers/clk/renesas/clk-rz.c | 30
Add RSKRZA1 Device tree bindings Documentation, listing it as a supported
board.
This allows to use checkpatch to validate DTSes referring to the RSKRZA1
board.
Signed-off-by: Chris Brandt
---
Documentation/devicetree/bindings/arm/shmobile.txt | 2 ++
1 file changed,
Add the initial device tree for the RZ/A1 based development board (RSK).
Signed-off-by: Chris Brandt
Reviewed-by: Geert Uytterhoeven
---
v2:
* Removed empty line at end
---
arch/arm/boot/dts/Makefile | 1 +
Hi Geert,
On Mon, Aug 29, 2016, Geert Uytterhoeven wrote:
> I believe this applies not only to RZ, but to all other supported RSPI
> variants?
> Hence I think it should be made common.
I would think it would be the same for all the other parts with RSPI.
Currently there are 3 separate config
Hi Laurent,
On Tue, Aug 9, 2016 at 2:29 PM, Laurent Pinchart
wrote:
> The FCPs handle the interface between various IP cores and memory. Add
> the instances related to the VSP2s.
>
> Signed-off-by: Laurent Pinchart
Hi Laurent,
On Tue, Aug 9, 2016 at 2:29 PM, Laurent Pinchart
wrote:
> The r8a7795 has 9 VSP instances.
7?
> Signed-off-by: Laurent Pinchart
> ---
> arch/arm64/boot/dts/renesas/r8a7795.dtsi | 90
>
Hi Geert,
On Mon, Aug 29, 2016, Geert Uytterhoeven wrote:
> Until you have a proper GPIO driver, I think the best solution is to
> ioremap() the
> hardcoded registers in clk-rz.c, and reading the mode pins.
OK. Thank you.
Chris
On Wed, Aug 24, 2016 at 03:49:22PM +0900, Yoshihiro Shimoda wrote:
> This driver can support for r8a7796 SoC. So, this patch adds it.
>
> Signed-off-by: Yoshihiro Shimoda
> ---
> Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb2.txt | 2 ++
>
Hi Chris,
On Mon, Aug 29, 2016 at 5:32 PM, Chris Brandt wrote:
> On Aug 29, 2016, Geert Uytterhoeven wrote:
>> We really need to get the GPIO driver upstream, and add support for reading
>> the MD_* pins.
>
> OK, we can just read the mode pin instead of looking at the
Hi Chris,
On Fri, Aug 5, 2016 at 3:36 PM, Chris Brandt wrote:
> When you leave the clock divider at 0, 130kHz is the lowest you can go.
> Also, by adjusting the clock divider you can get more accurate resolutions
> for clock speeds lower than 16MHz. This patch uses the
Hi Geert Uytterhoeven,
On Aug 29, 2016, Geert Uytterhoeven wrote:
> We really need to get the GPIO driver upstream, and add support for reading
> the MD_* pins.
OK, we can just read the mode pin instead of looking at the DT.
In setup-r8a7779.c, they use ioremap to read the mode and then pass
Hi Chris,
On Mon, Aug 29, 2016 at 4:53 PM, Chris Brandt wrote:
> On Aug 29, 2016, Geert Uytterhoeven wrote:
>>> Instead of hard coding EXTAL only, check if EXTAL was specified. If
>>> not, then assume the USB clock is used as the main system clock.
>>>
>>>
Hi Geert,
On Aug 29, 2016, Geert Uytterhoeven wrote:
>> Instead of hard coding EXTAL only, check if EXTAL was specified. If
>> not, then assume the USB clock is used as the main system clock.
>>
>> Signed-off-by: Chris Brandt
>
> What's the rationale behind this
Hi Geert,
On Aug 29, Geert Uytterhoeven wrote:
> > --- /dev/null
> > +++ b/arch/arm/boot/dts/r7s72100-rskrza1.dts
>
> > + compatible = "renesas,rskrza1", "renesas,r7s72100";
>
> scripts/checkpatch.pl says:
>
>DT compatible string "renesas,rskrza1" appears un-documented -- check
>
On 08/28/2016, Sergei Shtylyov wrote:
>> The RZ/A1 has a TSU, but since it only has one Ethernet port, it does
>> not have POST registers.
>
>I'm not sure the reason is having one port... do you have the old SH
> manuals somewhere? :-)
Yes, I used to support the SH7757. It had dual ETHER
On 29 August 2016 at 14:05, Simon Horman wrote:
> On Fri, Aug 26, 2016 at 10:01:35AM +0200, Ulf Hansson wrote:
>> On 25 August 2016 at 14:04, Simon Horman wrote:
>> > On Tue, Aug 23, 2016 at 05:02:56PM +0200, Ulf Hansson wrote:
>
> ...
>
>> >> >> I am
On Tue, Aug 23, 2016 at 09:49:42AM +0200, Simon Horman wrote:
> Hi,
>
> this patch set updates drivers, documentation and DT to
> enable SDHI0 & 3 on the r8a7796/salvator-x. This includes
> defining nodes for all available SDHI and GPIO devices.
>
> I have boot-tested this which seems
Hi Chris,
On Thu, Aug 25, 2016 at 5:31 PM, Chris Brandt wrote:
> Add the initial device tree for the RZ/A1 based development board (RSK).
Thanks for your patch!
> Signed-off-by: Chris Brandt
Reviewed-by: Geert Uytterhoeven
Hi Chris,
On Thu, Aug 25, 2016 at 9:05 PM, Chris Brandt wrote:
> Instead of hard coding EXTAL only, check if EXTAL was specified. If not,
> then assume the USB clock is used as the main system clock.
>
> Signed-off-by: Chris Brandt
What's the
Hi Magnus,
On Thu, Aug 25, 2016 at 7:34 AM, Magnus Damm wrote:
> On Sat, Aug 13, 2016 at 1:38 AM, Geert Uytterhoeven
> wrote:
>> On R-Car H3, the various MSIOF instances (used for SPI) have a common
>> parent clock. This mso clock is a
On Fri, Aug 26, 2016 at 10:01:35AM +0200, Ulf Hansson wrote:
> On 25 August 2016 at 14:04, Simon Horman wrote:
> > On Tue, Aug 23, 2016 at 05:02:56PM +0200, Ulf Hansson wrote:
...
> >> >> I am wondering whether it would it be possible to keep a cache of the
> >> >> currently
Hi Laurent,
Thanks for the patchset!
On Wed, Aug 17, 2016 at 03:20:27PM +0300, Laurent Pinchart wrote:
> The metadata buffer type is used to transfer metadata between userspace
> and kernelspace through a V4L2 buffers queue. It comes with a new
> metadata capture capability and format
On Fri, Aug 26, 2016 at 11:16:49PM +0300, Sergei Shtylyov wrote:
> Hello.
>
>Here's the set of 3 patches against Simon Horman's 'renesas.git' repo,
> 'renesas-devel-20160826-v4.8-rc3' tag. We add the device tree support for
> the R8A7792-based Wheat board. I have only sparse board
On Fri, Aug 26, 2016 at 10:23 PM, Sergei Shtylyov
wrote:
> R8A7792 SoC doesn't have the EtherMAC core, so SMSC LAN89218 Ethernet
> chip was used instead on the Wheat debug board; this chip is compatible
> with SMSC LAN9115 for which there's a (device tree
On Fri, Aug 26, 2016 at 10:21 PM, Sergei Shtylyov
wrote:
> Add the initial device tree for the R8A7792 SoC based Wheat board.
> The Wheat board itself has no serial ports wired up, the USB serial chips
> are situated on a separate debug board and one of
On Fri, Aug 26, 2016 at 10:20 PM, Sergei Shtylyov
wrote:
> Document the Wheat device tree bindings, listing it as a supported board.
>
> This allows to use checkpatch.pl to validate .dts files referring to the
> Wheat board.
>
> Signed-off-by: Sergei Shtylyov
Hi Simon,
The patch index in the subject should have been 0/4. You're breaking my
script to extract patch series from email threads ;-)
On Fri, Aug 26, 2016 at 3:49 PM, Simon Horman
wrote:
> Remove label property from led nodes. This seems to have little
> value and
32 matches
Mail list logo