Hi Simon
> > From: Kuninori Morimoto
> >
> > This patch adds CTU (= Channel Transfer Unit) supoort which is needed
> > to sound mixing.
> >
> > Signed-off-by: Kuninori Morimoto
>
> Thanks Morimoto-san,
>
> I have queued up this and the following patch for v4.11 after running
> the following
Hi Niklas,
On Friday 09 Dec 2016 00:15:51 Niklas Söderlund wrote:
> On 2016-12-08 23:40:42 +0200, Laurent Pinchart wrote:
> > On Thursday 08 Dec 2016 18:32:28 Niklas Söderlund wrote:
> >> From: Geert Uytterhoeven
> >>
> >> Currently gpio modules are runtime-resumed at probe time. This means the
Hi Laurent,
On 2016-12-08 23:40:42 +0200, Laurent Pinchart wrote:
> Hi Niklas,
>
> Thank you for the patch.
>
> On Thursday 08 Dec 2016 18:32:28 Niklas Söderlund wrote:
> > From: Geert Uytterhoeven
> >
> > Currently gpio modules are runtime-resumed at probe time. This means the
> > gpio module
Hi Niklas,
Thank you for the patch.
On Thursday 08 Dec 2016 18:32:28 Niklas Söderlund wrote:
> From: Geert Uytterhoeven
>
> Currently gpio modules are runtime-resumed at probe time. This means the
> gpio module will be active all the time (except during system suspend,
> if not configured as a
Hi Niklas,
Thank you for the patch.
On Thursday 08 Dec 2016 18:32:27 Niklas Söderlund wrote:
> This enables Runtime PM handling for interrupts.
>
> By setting the parent_device in struct irq_chip genirq will call the
> pm_runtime_get/put APIs when an IRQ is requested/freed.
>
> Signed-off-by: N
This enables Runtime PM handling for interrupts.
By setting the parent_device in struct irq_chip genirq will call the
pm_runtime_get/put APIs when an IRQ is requested/freed.
Signed-off-by: Niklas Söderlund
---
drivers/gpio/gpio-rcar.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/
From: Geert Uytterhoeven
Currently gpio modules are runtime-resumed at probe time. This means the
gpio module will be active all the time (except during system suspend,
if not configured as a wake-up source).
While an R-Car Gen2 gpio module retains pins configured for output at
the requested lev
Hi all,
This series (re)adds Runtime PM support which was reverted by:
commit 42c25013ca95ce79 ('Revert "gpio: rcar: Add Runtime PM handling for
interrupts"')
commit ce0e2c60e69e5f87 ('Revert "gpio: rcar: Fine-grained Runtime PM support"')
The reason it was reverted was that 'Runtime PM handlin
On 12/08/2016 03:28 PM, Sergei Shtylyov wrote:
Good to see that somebody cares still about this driver, one more task off
my back. :-)
On 12/07/2016 07:28 PM, Niklas Söderlund wrote:
You only enable the WOL support fo the R-Car gen2 chips but never say that
explicitly, neither in the subj
On Tue, Dec 06, 2016 at 03:54:21AM +, Kuninori Morimoto wrote:
>
> From: Kuninori Morimoto
>
> This patch adds CTU (= Channel Transfer Unit) supoort which is needed
> to sound mixing.
>
> Signed-off-by: Kuninori Morimoto
Thanks Morimoto-san,
I have queued up this and the following patch
On Thu, Dec 08, 2016 at 04:01:05PM +0100, Niklas Söderlund wrote:
> Hi Simon,
>
> Thanks for your feedback.
>
> On 2016-12-08 14:22:44 +0100, Simon Horman wrote:
>
>
>
> > > >
> > > > > --- a/drivers/net/ethernet/renesas/sh_eth.h
> > > > > +++ b/drivers/net/ethernet/renesas/sh_eth.h
> > > > >
Use recently added en 3 fallback compat string for PCIE
in r8a7795 DT.
Signed-off-by: Simon Horman
---
Based on renesas-devel-20161207-v4.9-rc8
---
arch/arm64/boot/dts/renesas/r8a7795.dtsi | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a77
On Thu, Dec 8, 2016 at 3:56 PM, Niklas Söderlund
wrote:
>> > + /* Increased clock usage so device won't be suspended */
>> > + clk_enable(mdp->clk);
>>
>>Hum, intermixiggn runtime PM with clock API doesn't look good...
>
> I agree it looks weird but I need a way to increment the usage coun
Hi Simon,
Thanks for your feedback.
On 2016-12-08 14:22:44 +0100, Simon Horman wrote:
> > >
> > > > --- a/drivers/net/ethernet/renesas/sh_eth.h
> > > > +++ b/drivers/net/ethernet/renesas/sh_eth.h
> > > > @@ -493,6 +493,7 @@ struct sh_eth_cpu_data {
> > > > unsigned shift_rd0:1; /* s
Hi Sergei,
Thanks for your feedback.
On 2016-12-08 15:28:48 +0300, Sergei Shtylyov wrote:
> Hello!
>
>Good to see that somebody cares still about this driver, one more task
> off my back. :-)
>
> On 12/07/2016 07:28 PM, Niklas Söderlund wrote:
>
> You only enable the WOL support fo the R
Hi Simon,
On Thu, Dec 8, 2016 at 2:28 PM, Simon Horman wrote:
> On Fri, Nov 25, 2016 at 10:22:59AM +0100, Geert Uytterhoeven wrote:
>> On Fri, Nov 25, 2016 at 9:16 AM, Magnus Damm wrote:
>> > On Mon, Nov 21, 2016 at 8:09 PM, Geert Uytterhoeven
>> > wrote:
>> >> On Thu, Nov 17, 2016 at 9:51 AM,
On Wed, Dec 07, 2016 at 05:44:44PM +0100, Ulrich Hecht wrote:
> Hi!
>
> This revision adds dmac2 references and Reviewed-bys where appropriate, plus
> the missing C pin group for HSCIF2.
>
> (Unlike the SCIF series, the DMA assignments in this one are not completely
> bogus. Go figure.)
>
> Base
On Wed, Dec 07, 2016 at 05:44:24PM +0100, Ulrich Hecht wrote:
> Hi!
>
> This revision fixes the completely incorrect DMA assignments (must have
> looked in the wrong datasheet), and adds dmac2 references and Reviewed-bys
> where appropriate.
>
> Based on renesas-devel-20161207-v4.9-rc8.
Hi Ulric
On Mon, Dec 05, 2016 at 06:43:10PM +0100, Niklas Söderlund wrote:
> The EthernetAVB should not depend on the bootloader to setup correct
> drive-strength values. Values for drive-strength where found by
> examining the registers after the bootloader has configured the
> registers and successfully u
On Thu, Dec 01, 2016 at 10:07:26AM +0100, Simon Horman wrote:
> Provide separaate sd0 and sd0_uhs nodes rather than duplicate sd0 nodes.
>
> Cc: Vladimir Barinov
> Cc: Sergei Shtylyov
> Fixes: 93373c309a70 ("arm64: dts: h3ulcb: rename SDHI0 pins")
> Signed-off-by: Simon Horman
I have queued th
On Fri, Nov 25, 2016 at 10:22:59AM +0100, Geert Uytterhoeven wrote:
> Hi Magnus,
>
> (this time with CC kept)
>
> On Fri, Nov 25, 2016 at 9:16 AM, Magnus Damm wrote:
> > On Mon, Nov 21, 2016 at 8:09 PM, Geert Uytterhoeven
> > wrote:
> >> On Thu, Nov 17, 2016 at 9:51 AM, Magnus Damm wrote:
> >>
On Tue, Dec 06, 2016 at 03:00:53PM +0100, Geert Uytterhoeven wrote:
> On Tue, Dec 6, 2016 at 2:32 PM, Simon Horman
> wrote:
> > Enable recently added r8a7743 (RZ/G1M) and r8a7745 (RZ/G1E) SoCs.
> >
> > Signed-off-by: Simon Horman
>
> Acked-by: Geert Uytterhoeven
Thanks, I have queued up this
On do, dec 08, 2016 at 08:16:20 +0100, Niklas Söderlund wrote:
> Hi Geert,
>
> Thanks for testing and your feedback.
>
> On 2016-12-07 19:14:40 +0100, Geert Uytterhoeven wrote:
> > Hi Niklas,
> >
> > On Wed, Dec 7, 2016 at 5:28 PM, Niklas Söderlund
> > wrote:
> > > Signed-off-by: Niklas Söderlu
Hello!
Good to see that somebody cares still about this driver, one more task off
my back. :-)
On 12/07/2016 07:28 PM, Niklas Söderlund wrote:
You only enable the WOL support fo the R-Car gen2 chips but never say that
explicitly, neither in the subject nor here.
Signed-off-by: Niklas
On 12/7/2016 7:44 PM, Ulrich Hecht wrote:
Add the device nodes for all HSCIF serial ports, incl. clocks, and
clock domain.
Not power domain?
Signed-off-by: Ulrich Hecht
Reviewed-by: Geert Uytterhoeven
---
arch/arm64/boot/dts/renesas/r8a7796.dtsi | 70
1
Hello!
On 12/7/2016 7:44 PM, Ulrich Hecht wrote:
Add the device nodes for all R-Car H3 SCIF serial ports, incl. clocks
and clock domain.
Not power domain?
Signed-off-by: Ulrich Hecht
Reviewed-by: Geert Uytterhoeven
---
arch/arm64/boot/dts/renesas/r8a7796.dtsi | 65
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