Re: [PATCH v4 1/9] drm: bridge: dw-hdmi: Remove unused functions

Hi Laurent, 在 2017年03月02日 06:39, Laurent Pinchart 写道: Most of the hdmi_phy_test_*() functions are unused. Remove them. Signed-off-by: Laurent Pinchart Tested-by: Nickey Yang Best regards, Nickey Yang ---

Re: [RFC PATCH 3/3] drm: rcar-du: Register a completion callback with VSP1

Hi Kieran, Thank you for the patch. On Wednesday 01 Mar 2017 13:12:56 Kieran Bingham wrote: > Updating the state in a running VSP1 requires two interrupts from the > VSP. Initially, the updated state will be committed - but only after the > VSP1 has completed processing it's current frame will

Re: [RFC PATCH 2/3] v4l: vsp1: extend VSP1 module API to allow DRM callback registration

Hi Kieran, Thank you for the patch. On Wednesday 01 Mar 2017 13:12:55 Kieran Bingham wrote: > To be able to perform page flips in DRM without flicker we need to be > able to notify the rcar-du module when the VSP has completed its > processing. > > To synchronise the page flip events for

Re: [RFC PATCH 1/3] v4l: vsp1: Register pipe with output WPF

Hi Kieran, Thank you for the patch. On Wednesday 01 Mar 2017 13:12:54 Kieran Bingham wrote: > The DRM object does not register the pipe with the WPF object. This is > used internally throughout the driver as a means of accessing the pipe. > As such this breaks operations which require access to

RE: [PATCH v4 1/3] watchdog: add rza_wdt driver

Hello Guenter, Thank you for your review! On Thursday, March 02, 2017, Guenter Roeck wrote: > > +/* > > + * Renesas RZ/A Series WDT Driver > > + * > > + * Copyright (C) 2017 Renesas Electronics America, Inc. > > + * Copyright (C) 2017 Chris Brandt > > + * > > + * This file is subject to the

RE: [PATCH 4/7] arm: dts: r7s72100: Add pin controller node

Hi Jacopo, On Tuesday, February 21, 2017, jacopo mondi wrote: > > + gpio-controller; > > + #gpio-cells = <2>; > > + gpio-ranges = < 0 0 16>; > > Not all ports have 16 pins available. > This is one of the differences between different RZ/A1

RE: Renesas RZ/A1 pin and gpio controller

Hi Jacopo, On Monday, February 20, 2017, Jacopo Mondi wrote: > Hello, >this is the first submission of combined GPIO and pin controller driver > for Renesas RZ/A1 SoC. > > Compared to my RFC series on the same subject, this new implementation > supports a single SoC. If more devices with a

RE: [PATCH v4 1/3] watchdog: add rza_wdt driver

On Thursday, March 02, 2017, Guenter Roeck worte: > > > The above two lines are unnecessary. > > > > OK. > > > > #I'll assume you mean take out just the last sentence (2 lines), not > > both sentences (all 3 lines). > > > The two empty lines. Ooops! That makes more sense. > > > > + rate =

Re: [PATCH v4 1/3] watchdog: add rza_wdt driver

On Thu, Mar 02, 2017 at 06:22:17PM +, Chris Brandt wrote: > On Thursday, March 02, 2017, Guenter Roeck wrote: > > > > > > The rate check should probably be here to avoid situations where > > > > > > rate < 16384. > > > > > > > > > > Do I need that if it's technically not possible to have a

[PATCH v4 1/4] devicetree/bindings: display: bridge: Add LVDS encoder DT bindings

The DT bindings support parallel to LVDS encoders that don't require any configuration, similarly to the dumb VGA DAC DT bindings. Signed-off-by: Laurent Pinchart Acked-by: Rob Herring ---

Re: [PATCH v4 8/9] drm: bridge: dw-hdmi: Remove device type from platform data

Hi Laurent, On 01-03-2017 22:39, Laurent Pinchart wrote: > From: Kieran Bingham > > The device type isn't used anymore now that workarounds and PHY-specific > operations are performed based on version information read at runtime. > Remove it. > >

Re: [PATCH v4 1/3] watchdog: add rza_wdt driver

On Thu, Mar 02, 2017 at 03:38:07PM +, Chris Brandt wrote: > Hello Guenter, > > Thank you for your review! > > > On Thursday, March 02, 2017, Guenter Roeck wrote: > > > +/* > > > + * Renesas RZ/A Series WDT Driver > > > + * > > > + * Copyright (C) 2017 Renesas Electronics America, Inc. > > >

Re: [PATCH v4 1/3] watchdog: add rza_wdt driver

On Thu, Mar 02, 2017 at 05:31:18PM +, Chris Brandt wrote: > On Thursday, March 02, 2017, Guenter Roeck worte: > > > > The above two lines are unnecessary. > > > > > > OK. > > > > > > #I'll assume you mean take out just the last sentence (2 lines), not > > > both sentences (all 3 lines). > > >

Re: [PATCH v2 0/2] arm64: dts: renesas: Upgrade to PSCI v1.0 to support Suspend-to-RAM

On Fri, Feb 24, 2017 at 02:49:12PM +0100, Geert Uytterhoeven wrote: > Hi Simon, Magnus, > > This patch series upgrades the version of the PSCI firmware, as > advertised in DT on Renesas R-Car Gen3 systems, from v0.2 to v1.0. > > Note that this series does not have any runtime effects: as

Re: [PATCH v4 7/9] drm: bridge: dw-hdmi: Add support for custom PHY configuration

Hi Jose, On Thursday 02 Mar 2017 14:50:02 Jose Abreu wrote: > On 02-03-2017 13:41, Laurent Pinchart wrote: > >> Hmm, this is kind of confusing. Why do you need a phy_ops and > >> then a separate configure_phy function? Can't we just use phy_ops > >> always? If its external phy then it would need

Re: [PATCH v2 2/3] v4l: Clearly document interactions between formats, controls and buffers

Hi Laurent, On Tue, Feb 28, 2017 at 05:03:19PM +0200, Laurent Pinchart wrote: > V4L2 exposes parameters that influence buffers sizes through the format > ioctls (VIDIOC_G_FMT, VIDIOC_TRY_FMT and VIDIO_S_FMT). Other parameters > not part of the format structure may also influence buffer sizes or >

Re: [PATCH v2 4/4] arm64: renesas: r8a7796: Enable HSCIF DMA

On Fri, Dec 09, 2016 at 10:58:25AM +0100, Geert Uytterhoeven wrote: > On Wed, Dec 7, 2016 at 5:44 PM, Ulrich Hecht > wrote: > > Signed-off-by: Ulrich Hecht > > Reviewed-by: Geert Uytterhoeven Thanks, I

Re: [PATCH v4 0/2] arm64: dts: r8a7795: Add Cortex-A53 CPU cores and PMU

Hi Geert, On Fri, Feb 24, 2017 at 02:59:26PM +0100, Geert Uytterhoeven wrote: > Hi Simon, Magnus, > > This patch series adds the Cortex-A53 CPU cores and PMU on the Renesas > R-Car H3 SoC to its DTS file. > > Note that these patches describes the hardware; actual enabling of the > CPU

Re: [PATCH 0/3] arm64: dts: r8a7796: Add Secondary CPU Cores

On Fri, Feb 17, 2017 at 04:30:32PM +0100, Geert Uytterhoeven wrote: > Hi Simon, Magnus, > > This patch series adds the second Cortex-A57 CPU core, and the > Cortex-A53 L2 cache-controller and CPU nodes on the Renesas R-Car M3-W > SoC to its DTS file. > > Note that these patches add

Re: [PATCH v4 1/3] watchdog: add rza_wdt driver

On 03/02/2017 05:57 AM, Chris Brandt wrote: Adds a watchdog timer driver for the Renesas RZ/A Series SoCs. A reset handler is also included since a WDT overflow is the only method for restarting an RZ/A SoC. Signed-off-by: Chris Brandt --- drivers/watchdog/Kconfig

Re: [PATCH v2 3/3] arm64: renesas: r8a7796: Enable SCIF DMA

On Tue, Feb 21, 2017 at 03:27:25PM +0100, Geert Uytterhoeven wrote: > Hi Simon, > > On Wed, Dec 7, 2016 at 5:44 PM, Ulrich Hecht > wrote: > > Signed-off-by: Ulrich Hecht > > --- > > arch/arm64/boot/dts/renesas/r8a7796.dtsi | 13

Re: [PATCH v4 7/9] drm: bridge: dw-hdmi: Add support for custom PHY configuration

Hi Laurent, On 02-03-2017 13:41, Laurent Pinchart wrote: > >> Hmm, this is kind of confusing. Why do you need a phy_ops and >> then a separate configure_phy function? Can't we just use phy_ops >> always? If its external phy then it would need to implement all >> phy_ops functions. > The phy_ops

[PATCH v4 1/3] watchdog: add rza_wdt driver

Adds a watchdog timer driver for the Renesas RZ/A Series SoCs. A reset handler is also included since a WDT overflow is the only method for restarting an RZ/A SoC. Signed-off-by: Chris Brandt --- drivers/watchdog/Kconfig | 8 ++ drivers/watchdog/Makefile | 1 +

[PATCH v4 2/3] watchdog: renesas-wdt: add support for rza

Describe the WDT hardware in the RZ/A series. Signed-off-by: Chris Brandt Reviewed-by: Geert Uytterhoeven Acked-by: Rob Herring --- v3: * Add Acked-by, Reviewed-by. v2: * added to renesas-wdt.txt instead of creating a new file

[PATCH v4 0/3] watchdog: add wdt and reset for renesas r7s72100

Some Renesas SoCs do not have a reset register and the only way to do a SW controlled reset is to use the watchdog timer. So while this series started out by only adding a reset feature, now it's a full watchdog timer driver that includes a reset handler. The longest WDT overflow you can get with

Re: [PATCH v4 7/9] drm: bridge: dw-hdmi: Add support for custom PHY configuration

Hi Jose, On Thursday 02 Mar 2017 12:50:13 Jose Abreu wrote: > On 01-03-2017 22:39, Laurent Pinchart wrote: > > From: Kieran Bingham > > > > The DWC HDMI TX controller interfaces with a companion PHY. While > > Synopsys provides multiple standard PHYs,

RE: [PATCH v3 3/3] ARM: dts: r7s72100: Add watchdog timer

Hello Sergei, On Thursday, March 02, 2017, Sergei Shtylyov wrote: > > diff --git a/arch/arm/boot/dts/r7s72100.dtsi > > b/arch/arm/boot/dts/r7s72100.dtsi index ed62e19..6ecee72 100644 > > --- a/arch/arm/boot/dts/r7s72100.dtsi > > +++ b/arch/arm/boot/dts/r7s72100.dtsi > > @@ -382,6 +382,13 @@ > >

Re: [PATCH v4 7/9] drm: bridge: dw-hdmi: Add support for custom PHY configuration

Hi Laurent, On 01-03-2017 22:39, Laurent Pinchart wrote: > From: Kieran Bingham > > The DWC HDMI TX controller interfaces with a companion PHY. While > Synopsys provides multiple standard PHYs, SoC vendors can also integrate > a custom PHY. > >

Re: [PATCH v4 5/9] drm: bridge: dw-hdmi: Fix the PHY power up sequence

Hi Laurent, On 01-03-2017 22:39, Laurent Pinchart wrote: > When powering the PHY up we need to wait for the PLL to lock. This is > done by polling the TX_PHY_LOCK bit in the HDMI_PHY_STAT0 register > (interrupt-based wait could be implemented as well but is likely > overkill). The bit is

Re: [PATCH v4 6/9] drm: bridge: dw-hdmi: Create PHY operations

Hi Laurent, On 01-03-2017 22:39, Laurent Pinchart wrote: > The HDMI TX controller support different PHYs whose programming > interface can vary significantly, especially with vendor PHYs that are > not provided by Synopsys. To support them, create a PHY operation > structure that can be provided

Re: [PATCH v4 4/9] drm: bridge: dw-hdmi: Fix the PHY power down sequence

Hi Laurent, On 01-03-2017 22:39, Laurent Pinchart wrote: > The PHY requires us to wait for the PHY to switch to low power mode > after deasserting TXPWRON and before asserting PDDQ in the power down > sequence, otherwise power down will fail. > > The PHY power down can be monitored though the

Re: [PATCH v4 0/9] drm: bridge: dw-hdmi: Refactor PHY support

On 03/01/2017 11:39 PM, Laurent Pinchart wrote: > Hello, > > This patch series refactors all the PHY handling code in order to allow > support of vendor PHYs and Synopsys DWC HDMI 2.0 TX PHYs. > > The series starts with a few cleanups and small fixes. Patch 1/9 just removes > unused code, patch

Re: [PATCH v4 0/9] drm: bridge: dw-hdmi: Refactor PHY support

Hi Neil, On Thursday 02 Mar 2017 12:27:52 Neil Armstrong wrote: > On 03/01/2017 11:39 PM, Laurent Pinchart wrote: > > Hello, > > > > This patch series refactors all the PHY handling code in order to allow > > support of vendor PHYs and Synopsys DWC HDMI 2.0 TX PHYs. > > > > The series starts

Re: [PATCH v4 1/9] drm: bridge: dw-hdmi: Remove unused functions

Hi Laurent, On 01-03-2017 22:39, Laurent Pinchart wrote: > Most of the hdmi_phy_test_*() functions are unused. Remove them. > > Signed-off-by: Laurent Pinchart Reviewed-by: Jose Abreu Best regards, Jose Miguel Abreu > --- >

Re: [PATCH v4 2/9] drm: bridge: dw-hdmi: Move CSC configuration out of PHY code

Hi Laurent, On 01-03-2017 22:39, Laurent Pinchart wrote: > The color space converter isn't part of the PHY, move its configuration > out of PHY code. > > Signed-off-by: Laurent Pinchart Reviewed-by: Jose Abreu Best regards,

[PATCH v4 0/4] drm: bridge: New LVDS encoder driver

next-lvds-encoder-v4-20170302 Archit, would you be able to do a final review of the driver code and merge it if everything looks good to you ? Laurent Pinchart (4): devicetree/bindings: display: bridge: Add LVDS encoder DT bindings drm: bridge: Add LVDS encoder driver drm: bridge: vga-dac: Add ad

[PATCH v4 3/4] drm: bridge: vga-dac: Add adi,adv7123 compatible string

The ADV7123 is a transparent VGA DAC. Unlike dumb VGA DACs it can be controlled through a power save pin, and requires a power supply. However, on most boards where the device is used neither the power save signal nor the power supply are controllable. To avoid developing a separate

[PATCH v4 2/4] drm: bridge: Add LVDS encoder driver

The LVDS encoder driver is a DRM bridge driver that supports the parallel to LVDS encoders that don't require any configuration. The driver thus doesn't interact with the device, but creates an LVDS connector for the panel and exposes its size and timing based on information retrieved from DT.

[PATCH v4 4/4] drm: bridge: lvds-encoder: Add thine,thc63lvdm83d compatible string

The THC63LVDM83D is a transparent LVDS encoder. Unlike dumb LVDS encoders it can be controlled through a few pins (power down, LVDS swing, clock edge selection) and requires power supplies. However, on several boards where the device is used neither the control pins nor the power supply are

Re: [PATCH v3 3/3] ARM: dts: r7s72100: Add watchdog timer

Hello! On 3/2/2017 1:54 AM, Chris Brandt wrote: Add watchdog timer support for RZ/A1. For the RZ/A1, the only way to do a reset is to overflow the WDT, so this is useful even if you don't need the watchdog functionality. Signed-off-by: Chris Brandt Reviewed-by:

Re: [PATCH] v4l: vsp1: Disable HSV formats on Gen3 hardware

Hi Laurent, LGTM! :-) On 28/02/17 23:08, Laurent Pinchart wrote: > While all VSP instances can process HSV internally, on Gen3 hardware > reading or writing HSV24 or HSV32 from/to memory causes the device to > hang. Disable those pixel formats on Gen3 hardware. > > Signed-off-by: Laurent