The page flip event is armed in the atomic begin handler, creating a
race condition with the frame end interrupt that could send the event
before the atomic operation actually completes. To avoid that, arm the
event in the atomic flush handler after queuing the page flip.
This change doesn't
Hi Kieran,
Thank you for the patch.
On Saturday 04 Mar 2017 02:01:18 Kieran Bingham wrote:
> If we try to commit the display list while an update is pending, we have
> missed our opportunity. The display list manager will hold the commit
> until the next interrupt.
>
> In this event, we inform
The field is a left-over from the switch to the atomic commit helper.
It's unused, remove it.
Signed-off-by: Laurent Pinchart
---
drivers/gpu/drm/rcar-du/rcar_du_drv.c | 2 --
drivers/gpu/drm/rcar-du/rcar_du_drv.h | 5 -
2 files changed, 7
Hi Kieran,
Thank you for the patch.
On Saturday 04 Mar 2017 02:01:17 Kieran Bingham wrote:
> To be able to perform page flips in DRM without flicker we need to be
> able to notify the rcar-du module when the VSP has completed its
> processing.
>
> We must not have bidirectional dependencies on
Hi Kieran,
On Saturday 04 Mar 2017 15:07:09 Laurent Pinchart wrote:
> On Saturday 04 Mar 2017 02:01:19 Kieran Bingham wrote:
> > Currently we process page flip events on every display interrupt,
> > however this does not take into consideration the processing time needed
> > by the VSP1 utilised
Adds a watchdog timer driver for the Renesas RZ/A Series SoCs. A reset
handler is also included since a WDT overflow is the only method for
restarting an RZ/A SoC.
Signed-off-by: Chris Brandt
---
v3:
* added #include
* alphabetized #include list
* removed call to
Some Renesas SoCs do not have a reset register and the only way to do a SW
controlled reset is to use the watchdog timer. So while this series started
out by only adding a reset feature, now it's a full watchdog timer driver that
includes a reset handler.
The longest WDT overflow you can get with
Add watchdog timer support for RZ/A1.
For the RZ/A1, the only way to do a reset is to overflow the WDT, so this
is useful even if you don't need the watchdog functionality.
Signed-off-by: Chris Brandt
Reviewed-by: Geert Uytterhoeven
---
v4:
*
Describe the WDT hardware in the RZ/A series.
Signed-off-by: Chris Brandt
Reviewed-by: Geert Uytterhoeven
Acked-by: Rob Herring
---
v3:
* Add Acked-by, Reviewed-by.
v2:
* added to renesas-wdt.txt instead of creating a new file
On Saturday, March 04, 2017, Guenter Roeck wrote:
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +
>
> Also needs to include . While at it, please order include
> files alphabetically.
OK.
> > + platform_set_drvdata(pdev, priv);
>
> This is now
On 03/03/2017 09:31 AM, Chris Brandt wrote:
Adds a watchdog timer driver for the Renesas RZ/A Series SoCs. A reset
handler is also included since a WDT overflow is the only method for
restarting an RZ/A SoC.
Signed-off-by: Chris Brandt
---
v2:
* removed extra lines
Hi Hans (and Laurent).
On Sat, Mar 04, 2017 at 11:53:45AM +0100, Hans Verkuil wrote:
> Hi Laurent,
>
> Here is my review:
>
> On 28/02/17 16:03, Laurent Pinchart wrote:
> >V4L2 exposes parameters that influence buffers sizes through the format
> >ioctls (VIDIOC_G_FMT, VIDIOC_TRY_FMT and
Hi Hans,
On Sat, Mar 04, 2017 at 11:57:32AM +0100, Hans Verkuil wrote:
...
> >>+To simplify their implementation, drivers may also require buffers to be
> >>+reallocated in order to change formats or controls that influence the
> >>buffer
> >>+size. In that case, to perform such changes,
The page flip event is armed in the atomic begin handler, creating a
race condition with the frame end interrupt that could send the event
before the atomic operation actually completes. To avoid that, arm the
event in the atomic flush handler after queuing the page flip.
This change doesn't
Hi Kieran,
Thank you for the patch.
On Saturday 04 Mar 2017 02:01:19 Kieran Bingham wrote:
> Currently we process page flip events on every display interrupt,
> however this does not take into consideration the processing time needed
> by the VSP1 utilised in the pipeline.
>
> Register a
On 02/03/17 16:37, Sakari Ailus wrote:
Hi Laurent,
On Tue, Feb 28, 2017 at 05:03:19PM +0200, Laurent Pinchart wrote:
V4L2 exposes parameters that influence buffers sizes through the format
ioctls (VIDIOC_G_FMT, VIDIOC_TRY_FMT and VIDIO_S_FMT). Other parameters
not part of the format structure
Hi Laurent,
Here is my review:
On 28/02/17 16:03, Laurent Pinchart wrote:
V4L2 exposes parameters that influence buffers sizes through the format
ioctls (VIDIOC_G_FMT, VIDIOC_TRY_FMT and VIDIO_S_FMT). Other parameters
S_SELECTION should be mentioned here as well (more about that later).
17 matches
Mail list logo