Hi,
> -Original Message-
> From: Rob Herring
> Sent: Saturday, June 24, 2017 3:21 AM
>
> On Thu, Jun 15, 2017 at 08:34:22PM +0900, Yoshihiro Shimoda wrote:
> > USB 2.0 PHY of R-Car Gen3 can change the clock source from an oscillator
> > to an external clock via a register. So, this patch
On Fri, Jun 23, 2017 at 11:25 AM, Ramesh Shanmugasundaram
wrote:
> Add r8a7796 DRIF bindings.
>
> Signed-off-by: Ramesh Shanmugasundaram
>
Acked-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-
On Fri, Jun 23, 2017 at 11:29 AM, Arvind Yadav
wrote:
> of_device_ids are not supposed to change at runtime. All functions
> working with of_device_ids provided by work with const
> of_device_ids. So mark the non-const structs as const.
>
> Signed-off-by: Arvind Yadav
Acked-by: Geert Uytterhoev
On Wed, Jun 21, 2017 at 4:27 PM, Biju Das wrote:
> Renesas RZ/G1M (R8A7743) SoC GPIO blocks are identical to the R-Car Gen2
> family. Add support for its GPIO controllers.
>
> Signed-off-by: Biju Das
> Reviewed-by: Chris Paterson
Acked-by: Geert Uytterhoeven
Although I think the time has come
On Sat, Jun 24, 2017 at 12:18 PM, Laurent Pinchart
wrote:
> Add pinctrl support for the PWM[0-6] pins.
>
> Signed-off-by: Laurent Pinchart
Reviewed-by: Geert Uytterhoeven
i.e. queuing in sh-pfc-for-v4.13.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots
Hi Linus,
On Thu, Jun 22, 2017 at 4:54 PM, Jacopo Mondi wrote:
>this is 6th round of RZ/A1 pin controller patch series.
>
> Where did we stop: discussion from pin controller driver shifted toward two
> new generic pin configuration properties I added to the previous series
> (bi-directional a
Hi Mark, Lars-Peter
These are v2 of platform replace patch-set.
Big difference is that from version, rtd can have component list.
As you know, current rtd has platform, codec, and this patch
replace rtd->platform into component list.
We can replace codec in same style in the future.
This patch-s
ALSA SoC platform/codec will be replaced to component soon.
This means 1 device might have multiple components. But current
unregister component function only checks "dev" to find it.
This means, unexpected component might be unregistered by current
function.
But, it is no problem if driver registe
Now, we have snd_soc_unregister_component_exp() which can check
registered device and driver.
Let's use it on devm_component_release()
Signed-off-by: Kuninori Morimoto
---
sound/soc/soc-devres.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/sound/soc/soc-devres.c b/so
snd_soc_platform_driver has snd_pcm_ops,
and it will be replaced into snd_soc_component_driver in the future.
To prepare it, component driver has it.
After this patch, rtd->platfrom is no longer mandatory
Signed-off-by: Kuninori Morimoto
---
include/sound/soc.h | 4 +-
sound/soc/soc-core.c |
Current snd_soc_pcm_runtime has platform / codec pointers, and we could
use these specific pointer. But these will be replaced to more generic
"component" soon, and will need more generic method to get each
connected component pointer from rtd.
This patch adds new snd_soc_rtdcom_xxx() to connect/d
snd_soc_platform_driver has snd_compr_ops,
and it will be replaced into snd_soc_component_driver in the future.
To prepare it, component driver has it.
After this patch, rtd->platform is no longer mandatory
Signed-off-by: Kuninori Morimoto
---
include/sound/soc.h | 1 +
sound/soc/soc-com
Now platform can be replaced to component, let's do it.
Signed-off-by: Kuninori Morimoto
---
sound/soc/sh/rcar/core.c | 20 +++-
1 file changed, 3 insertions(+), 17 deletions(-)
diff --git a/sound/soc/sh/rcar/core.c b/sound/soc/sh/rcar/core.c
index 409bac3..8dcf1a8 100644
--- a/
Now platform can be replaced to component, let's do it.
Signed-off-by: Kuninori Morimoto
---
sound/soc/soc-utils.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/sound/soc/soc-utils.c b/sound/soc/soc-utils.c
index 644d9a9..b7bf63d 100644
--- a/sound/soc/soc-utils.c
+++
Now, all platform are replaced to component.
This patch removes all platform code.
platform_list_read_file() is replaced to component_list_read_file()
Signed-off-by: Kuninori Morimoto
---
include/sound/soc.h | 101 -
sound/soc/soc-compress.c | 123 --
Now platform can be replaced to component, let's do it.
Signed-off-by: Kuninori Morimoto
---
include/sound/dmaengine_pcm.h | 2 ++
sound/soc/soc-generic-dmaengine-pcm.c | 54 +--
2 files changed, 34 insertions(+), 22 deletions(-)
diff --git a/include/sou
Hi Kieran and Geert,
On 2017-06-16 11:30:23 +0100, Kieran Bingham wrote:
> Hi Geert, Niklas,
>
> On 16/06/17 09:57, Geert Uytterhoeven wrote:
> > Hi Kieran,
> >
> > On Wed, Jun 14, 2017 at 10:23 PM, Kieran Bingham
> > wrote:
> >> Please consider this pull request for the next renesas-drivers r
Hi Niklas, Kieran,
On Mon, Jun 26, 2017 at 11:20 AM, Niklas Söderlund
wrote:
> On 2017-06-16 11:30:23 +0100, Kieran Bingham wrote:
>> On 16/06/17 09:57, Geert Uytterhoeven wrote:
> > On Wed, Jun 14, 2017 at 10:23 PM, Kieran Bingham
> > wrote:
>> >> Please consider this pull request for the next
Thanks Rob,
Comments addressed, and a new version 6 to be posted soon.
On 22/06/17 22:34, Rob Herring wrote:
> On Wed, Jun 14, 2017 at 08:58:12PM +0100, Kieran Bingham wrote:
>> From: Kieran Bingham
>>
>> Provide support for the ADV7481 and ADV7482.
>>
>> The driver is modelled with 4 subdevices
With commit 72f5df2c2bbb6 ("clk: renesas: cpg-mssr: Migrate to
CLK_IS_CRITICAL") we are able to handle critical module clocks.
Introduce the same logic for critical core clocks.
Signed-off-by: Dirk Behme
---
Commit
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/drivers
On Wed, Jun 21, 2017 at 2:17 PM, Laurent Pinchart
wrote:
> Add the HDMI encoder to the R8A7796 DT in disabled state.
>
> Signed-off-by: Laurent Pinchart
Reviewed-by: Geert Uytterhoeven
(disclaimer: I'm no ports/endpoint expert).
Gr{oetje,eeting}s,
Geert
--
Geert Uytt
Hi Laurent,
On Tue, Jun 20, 2017 at 10:48:21AM +0300, Laurent Pinchart wrote:
> Hi Jacopo,
>
> Thank you for the patch.
>
> On Monday 19 Jun 2017 19:04:40 Jacopo Mondi wrote:
> > Reads of chip identification code (both on registers 0x00 and 0xff)
> > always return 0x00.
>
> This shouldn't be the c
On 26/06/17 17:14, Kieran Bingham wrote:
> Hi Hans,
>
> Thankyou for your review, and apologies for the delay - I was OoO last week.
>
>
> On 19/06/17 10:13, Hans Verkuil wrote:
>> On 06/13/2017 02:35 AM, Kieran Bingham wrote:
>>> From: Kieran Bingham
>>>
>>> Provide support for the ADV7481 and
On Wed, Jun 21, 2017 at 12:31:27PM +0300, Laurent Pinchart wrote:
> The M3-W HDMI TX controller seems to be compatible for the H3. No
> extension to the DT bindings are needed, add an SoC-specific compatible
> string in case differences between the IP versions are found later and
> require model-sp
[snip]
On Monday 26 Jun 2017 16:14:47 Kieran Bingham wrote:
> >> +int adv748x_txa_power(struct adv748x_state *state, bool on)
> >> +{
> >> +int val;
> >> +
> >> +val = txa_read(state, ADV748X_CSI_FS_AS_LS);
> >> +if (val < 0)
> >> +return val;
> >> +
> >> +/*
> >> + * T
Hello,
This patch series enable DU support in DT for the R-Car H3 ES2.0 Salvator-X
board. Patch 1/2 extends the DT bindings as needed, and patch 2/2 then enables
DU in the SoC DT.
The patches are based on top of Simon's arm64-dt-for-v4.14 branch.
Compared to v1
- the VSP DT bindings have been e
Add a compatible string and VSP links to the DU node. The H3 ES1.x and
H3 ES2.0 are compatible save for the links to the VSPs that are
described explicitly in DT, so there's no need for a new ES2-specific
compatible string.
Signed-off-by: Laurent Pinchart
Reviewed-by: Geert Uytterhoeven
---
arc
On some R-Car SoCs a single VSP can serve multiple DU channels through
multiple LIF instances in the VSP. The current DT bindings don't support
specifying that kind of SoC integration scheme. Extend them with a VSP
channel index.
Backward compatibility can be ensured in drivers by checking the len
Hi Laurent,
On Mon, Jun 26, 2017 at 6:29 PM, Laurent Pinchart
wrote:
> On some R-Car SoCs a single VSP can serve multiple DU channels through
> multiple LIF instances in the VSP. The current DT bindings don't support
> specifying that kind of SoC integration scheme. Extend them with a VSP
> chann
Hi Geert,
On Monday 26 Jun 2017 18:36:14 Geert Uytterhoeven wrote:
> On Mon, Jun 26, 2017 at 6:29 PM, Laurent Pinchart wrote:
> > On some R-Car SoCs a single VSP can serve multiple DU channels through
> > multiple LIF instances in the VSP. The current DT bindings don't support
> > specifying that
Signed-off-by: Laurent Pinchart
---
drivers/clk/renesas/r8a7796-cpg-mssr.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/renesas/r8a7796-cpg-mssr.c
b/drivers/clk/renesas/r8a7796-cpg-mssr.c
index 1d8c5c2b6174..30583cdc1350 100644
--- a/drivers/clk/renesas/r8a7796-cpg-mssr.c
+++
On Mon, Jun 26, 2017 at 7:26 PM, Laurent Pinchart
wrote:
> --- a/drivers/clk/renesas/r8a7796-cpg-mssr.c
> +++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c
> @@ -152,6 +152,7 @@ static const struct mssr_mod_clk r8a7796_mod_clks[]
> __initconst = {
> DEF_MOD("hscif1",519, R8A7
On Mon, Jun 26, 2017 at 10:13:00AM +0200, Geert Uytterhoeven wrote:
> On Wed, Jun 21, 2017 at 4:27 PM, Biju Das wrote:
> > Renesas RZ/G1M (R8A7743) SoC GPIO blocks are identical to the R-Car Gen2
> > family. Add support for its GPIO controllers.
> >
> > Signed-off-by: Biju Das
> > Reviewed-by: Ch
On Mon, Jun 26, 2017 at 10:45:22AM +0200, Geert Uytterhoeven wrote:
> Hi Linus,
>
> On Thu, Jun 22, 2017 at 4:54 PM, Jacopo Mondi
> wrote:
> >this is 6th round of RZ/A1 pin controller patch series.
> >
> > Where did we stop: discussion from pin controller driver shifted toward two
> > new ge
On Wed, Jun 21, 2017 at 03:27:09PM +0100, Biju Das wrote:
> Renesas RZ/G1M (R8A7743) SoC GPIO blocks are identical to the R-Car Gen2
> family. Add support for its GPIO controllers.
>
> Signed-off-by: Biju Das
> Reviewed-by: Chris Paterson
> ---
> v1->v2
> * Modified the text "RZ-G1M" to "RZ/G1M"
When the display start interrupt occurs, we know that the hardware has
finished loading the active display list. The driver then proceeds to
recycle the list, assuming it won't be needed anymore.
This assumption holds true for headerless display lists, as the VSP
doesn't reload the list for the ne
The sink pointer is used to configure routing inside the VSP, and as
such must point to the next VSP entity in the pipeline. The WPF being a
pipeline terminal sink, its output route can't be configured. The
routing configuration code already handles this correctly without
referring to the sink poin
The Blend/ROP Sub Unit (BRS) is a stripped-down version of the BRU found
in several VSP2 instances. Compared to a regular BRU, it supports two
inputs only, and thus has no ROP unit.
Add support for the BRS by modeling it as a new entity type, but reuse
the vsp1_bru object underneath. Chaining the
2.0 Salvator-X: Enable DU support in DT"
patch series
For convenience, a branch merging this series with all dependencies is
available from
git://linuxtv.org/pinchartl/media.git drm/next/h3-es2/merged
with the DT and driver series split in two branches respectively tagged
drm-h3-es2-
The VSP2-DL instance (present in the H3 ES2.0 and M3-N SoCs) has two LIF
instances. Adapt the driver infrastructure to support multiple LIFs.
Support for multiple display pipelines will be added separately.
The change to the entity routing table removes the ability to connect
the LIF output to the
In the H3 ES2.0 SoC the VSP2-DL instance has two connections to DU
channels that need to be configured independently. Extend the VSP-DU API
with a pipeline index to identify which pipeline the caller wants to
operate on.
Signed-off-by: Laurent Pinchart
---
drivers/gpu/drm/rcar-du/rcar_du_vsp.c
The H3 ES1.x exhibits dot clock duty cycle stability issues. We can work
around them by configuring the DPLL to twice the desired frequency,
coupled with a /2 post-divider. This isn't needed on other SoCs and
breaks HDMI output on M3-W for a currently unknown reason, so restrict
the workaround to H
On Gen3 SoCs DPAD0 routing is configured through the last CRTC group,
unlike on Gen2 where it is configured through the first CRTC group. Fix
the driver accordingly.
Fixes: 2427b3037710 ("drm: rcar-du: Add R8A7795 device support")
Signed-off-by: Laurent Pinchart
---
drivers/gpu/drm/rcar-du/rcar_
The VSP supports both header and headerless display lists. The latter is
easier to use when the VSP feeds data directly to the DU in continuous
mode, and the driver thus uses headerless display lists for DU operation
and header display lists otherwise.
Headerless display lists are only available o
The internal VSP entity source and sink pointers are stored as
media_entity pointers, which are then cast to a vsp1_entity. As all
sources and sinks are vsp1_entity instances, we can store the
vsp1_entity pointers directly.
Signed-off-by: Laurent Pinchart
---
drivers/media/platform/vsp1/vsp1_drm
When the VSP1 is used in a DRM pipeline the driver doesn't register the
media device. Links between entities are not exposed to userspace, but
are still used internally for the sole purpose of setting up internal
source to sink pointers through the link setup handler.
Instead of going through this
On R-Car H3 ES2.0, DU channels 0 and 3 are served by two separate
pipelines from the same VSP. Support this in the DU driver.
Signed-off-by: Laurent Pinchart
---
drivers/gpu/drm/rcar-du/rcar_du_crtc.c | 2 +-
drivers/gpu/drm/rcar-du/rcar_du_crtc.h | 3 ++
drivers/gpu/drm/rcar-du/rcar_du_kms.c
New Gen3 SoCs come with two new VSP2 variants names VSP2-BS and VSP2-DL,
as well as a new VSP2-D variant on V3M and V3H SoCs. Add new entries for
them in the VSP device info table.
Signed-off-by: Laurent Pinchart
---
drivers/media/platform/vsp1/vsp1_drv.c | 24
drivers/
The display list headers are filled using information from the display
list only. Lower the display list manager spinlock contention by filling
the headers without holding the lock.
Signed-off-by: Laurent Pinchart
---
drivers/media/platform/vsp1/vsp1_dl.c | 6 --
1 file changed, 4 insertions
The R-Car H3 ES2.0 VSP-DL instance has two LIF entities and can drive
two display pipelines at the same time. Refactor the VSP DRM code to
support that by introducing a vsp_drm_pipeline object that models one
display pipeline.
Signed-off-by: Laurent Pinchart
---
drivers/media/platform/vsp1/vsp1_
Hi Geert,
On Monday 26 Jun 2017 19:38:58 Geert Uytterhoeven wrote:
> On Mon, Jun 26, 2017 at 7:26 PM, Laurent Pinchart wrote:
> > --- a/drivers/clk/renesas/r8a7796-cpg-mssr.c
> > +++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c
> > @@ -152,6 +152,7 @@ static const struct mssr_mod_clk r8a7796_mod_clks[
On Thu, Jun 22, 2017 at 12:00:58PM +0200, Jacopo Mondi wrote:
> Add output-enable generic pin configuration property.
> This properties allows enabling/disabling pin's output capabilities
> without actually driving any value on the line.
>
> ---
> v1->v2:
> - Expand the property description as su
Hi Geert,
The following changes implement display support for the R-Car H3 ES2.0. They
have been split in two distinct branches:
- tags/drm-h3-es2-dt-20170626 contains the DT changes and is based on top of
arm64-dt-for-v4.14
The following changes since commit
On Fri, Jun 23, 2017 at 10:25:02AM +0100, Ramesh Shanmugasundaram wrote:
> Add r8a7796 DRIF bindings.
>
> Signed-off-by: Ramesh Shanmugasundaram
>
> ---
> Hi DT & Media maintainers, All,
>
>This patch adds DRIF bindings for R8A7796 SoC.
>It is based on media_tree - commit 76724b30f222
>
Hi Laurent,
On Wed, Jun 21, 2017 at 11:04 AM, Laurent Pinchart
wrote:
> --- a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
> +++ b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
> @@ -158,6 +157,11 @@ static void rcar_du_dpll_divider(struct rcar_du_crtc
> *rcrtc,
> best_diff);
> }
>
> +stati
On Fri, Jun 23, 2017 at 11:34:44PM +0300, Sergei Shtylyov wrote:
> From: Konstantin Kozhevnikov
>
> The image renderer, or the distortion correction engine, is a drawing
> processor with a simple instruction system capable of referencing video
> capture data or data in an external memory as the 2
Hello!
On 06/26/2017 10:49 PM, Rob Herring wrote:
From: Konstantin Kozhevnikov
The image renderer, or the distortion correction engine, is a drawing
processor with a simple instruction system capable of referencing video
capture data or data in an external memory as the 2D texture data and
pe
Hi Sergei,
On Mon, Jun 26, 2017 at 9:56 PM, Sergei Shtylyov
wrote:
> On 06/26/2017 10:49 PM, Rob Herring wrote:
>>> From: Konstantin Kozhevnikov
>>>
>>> The image renderer, or the distortion correction engine, is a drawing
>>> processor with a simple instruction system capable of referencing vid
> this series adds support for the internal DMAC used by r8a779[56] SoCs.
> This is achieved by adding a new variant of the SDHI driver for this
> DMA controller with compat strings for the r8a779[56] SoCs.
> Compat strings for these SoCs are also removed from the existing SYS DMAC
> variant of th
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