On Fri, Jul 14, 2017 at 3:09 PM, Dan Carpenter wrote:
> On Fri, Jul 14, 2017 at 03:55:26PM +0300, Dan Carpenter wrote:
>> I don't agree with it as a static analysis dev...
>
> What I mean is if it's a macro that returns -ENODEV or a function that
> returns -ENODEV, they should both be treated the
Adapt the LUT to allocate a fragment pool for passing the table updates
to hardware.
Two bodies are pre-allocated in the pool to manage a userspace update
before the hardware has taken a previous set of tables.
Signed-off-by: Kieran Bingham
---
drivers/media/platform/vsp1/vsp1_lut.c | 23 ++
Adapt the CLU to allocate a fragment pool for passing the table updates
to hardware.
Two bodies are pre-allocated in the pool to manage a userspace update
before the hardware has taken a previous set of tables.
Signed-off-by: Kieran Bingham
---
drivers/media/platform/vsp1/vsp1_clu.c | 18 ++
Each display list currently allocates an area of DMA memory to store register
settings for the VSP1 to process. Each of these allocations adds pressure to
the IPMMU TLB entries.
We can reduce the pressure by pre-allocating larger areas and dividing the area
across multiple bodies represented as a
The fragment write function relies on the code never asking it to
write more than the entries available in the list.
Currently with each list body containing 256 entries, this is fine,
but we can reduce this number greatly saving memory.
In preparation of this - add a level of protection to catch
Fragments are no longer 'freed' in interrupt context, but instead released back
to their respective pools.
This allows us to remove the garbage collector in the DLM.
Signed-off-by: Kieran Bingham
---
drivers/media/platform/vsp1/vsp1_dl.c | 151 ++-
1 file changed, 14 ins
Each display list allocates a body to store register values in a dma
accessible buffer from a dma_alloc_wc() allocation. Each of these
results in an entry in the TLB, and a large number of display list
allocations adds pressure to this resource.
Reduce TLB pressure on the IPMMUs by allocating mult
Adapt the dl->body0 object to use an object from the fragment pool.
This greatly reduces the pressure on the TLB for IPMMU use cases, as
all of the lists use a single allocation for the main body
Signed-off-by: Kieran Bingham
---
drivers/media/platform/vsp1/vsp1_dl.c | 68 +++
On Tue, Jul 11, 2017 at 01:44:20PM +0200, Simon Horman wrote:
> Add fallback compatibility string for R-Car Gen 2 and 3.
>
> In the case of Renesas R-Car hardware we know that there are generations of
> SoCs, e.g. Gen 1 and 2. But beyond that its not clear what the relationship
> between IP blocks
Provide register definitions required for UDS phase and partition
algorithm support.
These registers are applicable to Gen3 hardware only.
Signed-off-by: Kieran Bingham
Reviewed-by: Laurent Pinchart
---
drivers/media/platform/vsp1/vsp1_regs.h | 14 ++
1 file changed, 14 insertions(
As we develop the partition algorithm, we need to store more information
per partition to describe the phase and other parameters.
To keep this data together, further abstract the existing v4l2_rect
into a partition specific structure
When generating the partition windows, operate directly on the
The vsp1_pipe object context variables for div_size and
current_partition allowed state to be maintained through processing the
partitions during processing.
Now that the partition tables are calculated during stream on, there is
no requirement to store these variables in the pipe object.
Utilise
The configuration of the pipeline and entities directly affects the
inputs required to each entity for the partition algorithm. Thus it
makes sense to involve those entities in the decision making process.
Extend the entity ops API to provide an optional '.partition' operation.
This allows entitie
Previously the active window and partition sizes for each partition were
calculated for each partition every frame. This data is constant and
only needs to be calculated once at the start of the stream.
Extend the vsp1_pipe object to dynamically store the number of partitions
required and pre-calc
Separate the code change from the function move so that code changes can
be clearly identified. This commit has no functional change.
The partition algorithm functions will be changed, and
vsp1_video_pipeline_setup_partitions() will call vsp1_video_partition().
To prepare for that, move the functi
Some updates and initial improvements for the VSP1 partition algorithm that
remove redundant processing and variables, reducing the processing done in
interrupt context slightly.
Patches 1, 2 and 3 clean up the calculation of the partition windows such that
they are only calculated once at streamo
On Thu, Apr 20, 2017 at 02:46:33AM +0900, Yoshihiro Kaneko wrote:
> From: Takeshi Kihara
>
> In .recalc_rate of struct clk_ops, it is desirable to return 0 if an
> error occurs, but -EINVAL is returned. This patch fixes it.
>
> Fixes: 5b1defde7054 ("clk: renesas: cpg-mssr: Extract common R-Car G
On Thu, Jul 13, 2017 at 11:06:56PM +0200, Wolfram Sang wrote:
> From: Takeshi Kihara
>
> In .recalc_rate of struct clk_ops, it is desirable to return 0 if an
> error occurs, but -EINVAL is returned. This patch fixes it.
>
> Fixes: 5b1defde7054 ("clk: renesas: cpg-mssr: Extract common R-Car Gen3
On Fri, Jul 14, 2017 at 03:55:26PM +0300, Dan Carpenter wrote:
> I don't agree with it as a static analysis dev...
What I mean is if it's a macro that returns -ENODEV or a function that
returns -ENODEV, they should both be treated the same. The other
warnings this check prints are quite clever.
Ah... I see why it's complaining about these ones in particular...
I don't agree with it as a static analysis dev, and I don't like the
changes too much. But since it's only generating a hand full of
warnings then I don't care.
regards,
dan carpenter
On Fri, Jul 14, 2017 at 11:36:56AM +0200, Arnd Bergmann wrote:
> @@ -1158,7 +1158,8 @@ static void ccdc_configure(struct isp_ccdc_device *ccdc)
>*/
> fmt_src.pad = pad->index;
> fmt_src.which = V4L2_SUBDEV_FORMAT_ACTIVE;
> - if (!v4l2_subdev_call(sensor, pad, get_fmt, NULL,
On Fri, Jul 14, 2017 at 2:05 PM, Dan Carpenter wrote:
> Changing:
>
> - if (!frob()) {
> + if (frob() == 0) {
>
> is a totally pointless change. They're both bad, because they're doing
> success testing instead of failure testing, but probably the second one
> is slightly worse.
>
> This warning
Changing:
- if (!frob()) {
+ if (frob() == 0) {
is a totally pointless change. They're both bad, because they're doing
success testing instead of failure testing, but probably the second one
is slightly worse.
This warning seems dumb. I can't imagine it has even a 10% success rate
at finding r
v4l2_subdev_call is a macro returning whatever the callback return
type is, usually 'int'. With gcc-7 and ccache, this can lead to
many wanings like:
media/platform/pxa_camera.c: In function 'pxa_mbus_build_fmts_xlate':
media/platform/pxa_camera.c:766:27: error: ?: using integer constants in
bool
Hi,
On Thu, Jul 13, 2017 at 10:41 PM, Maxime Ripard
wrote:
> In the earlier display engine designs, any register access while a commit
> is pending is forbidden.
>
> One of the symptoms is that reading a register will return another, random,
> register value which can lead to register corruptions
From: Vladimir Barinov
Correct order of sound clock frequencies for ULCB boards
used with r8a7795 and r8a7796 SoCs.
These sounds clock frequencies are used as the ADG clock (output clocks
for audio module) initial setting and sound codec's initial system clock
which needs the maximum clock frequ
Hi Olof, Hi Kevin, Hi Arnd,
Please consider these second round of Renesas ARM based SoC fixes for v4.13.
This pull request is based on the previous round of
such requests, tagged as renesas-fixes-for-v4.13,
which I have already sent a pull-request for.
That pull request provides the same fix as t
On 14/07/17 00:31, Laurent Pinchart wrote:
> Hi Kieran,
>
> On Thursday 13 Jul 2017 18:49:19 Kieran Bingham wrote:
>> On 26/06/17 19:12, Laurent Pinchart wrote:
>>> New Gen3 SoCs come with two new VSP2 variants names VSP2-BS and VSP2-DL,
>>> as well as a new VSP2-D variant on V3M and V3H SoCs. Add
On Thu, Jul 13, 2017 at 06:31:33PM +0200, Geert Uytterhoeven wrote:
> On Thu, Jul 13, 2017 at 5:39 PM, Chris Paterson
> wrote:
> > Define the iwg20m board dependent part of the MMCIF0 device node.
> >
> > Signed-off-by: Chris Paterson
>
> Reviewed-by: Geert Uytterhoeven
Thanks, applied for v4.
On Thu, Jul 13, 2017 at 01:19:12PM +0200, Geert Uytterhoeven wrote:
> On Thu, Jul 13, 2017 at 1:06 PM, Laurent Pinchart
> wrote:
> > The VC6 is an I2C-controlled programmable clock generator, used on the
> > board to provide a display dot clock. Add it to DT.
> >
> > Signed-off-by: Laurent Pinchar
On Thu, Jul 13, 2017 at 01:20:16PM +0200, Geert Uytterhoeven wrote:
> On Thu, Jul 13, 2017 at 1:09 PM, Laurent Pinchart
> wrote:
> > The DU dot clocks 0 and 3 are provided by the programmable VC6 clock
> > generator. Connect them to the clock source node.
> >
> > Signed-off-by: Laurent Pinchart
>
On Fri, Jul 14, 2017 at 09:20:31AM +0200, Simon Horman wrote:
> On Thu, Jul 13, 2017 at 01:17:10PM +0200, Geert Uytterhoeven wrote:
> > On Thu, Jul 13, 2017 at 12:58 PM, Laurent Pinchart
> > wrote:
> > > The VSP nodes are missing the resets property. Add it.
> > >
> > > Fixes: 5a89c826745f ("arm64
On Thu, Jul 13, 2017 at 01:16:19PM +0200, Geert Uytterhoeven wrote:
> On Thu, Jul 13, 2017 at 12:58 PM, Laurent Pinchart
> wrote:
> > The FCP nodes are missing the resets property. Add it.
> >
> > Fixes: 7153c69fb8e1 ("arm64: dts: renesas: r8a7796: Add FCPF and FCPV
> > instances")
> > Signed-off
On Thu, Jul 13, 2017 at 01:17:10PM +0200, Geert Uytterhoeven wrote:
> On Thu, Jul 13, 2017 at 12:58 PM, Laurent Pinchart
> wrote:
> > The VSP nodes are missing the resets property. Add it.
> >
> > Fixes: 5a89c826745f ("arm64: dts: renesas: r8a7796: Add VSP instances")
> > Signed-off-by: Laurent Pi
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