Hi Geert-san,
> -Original Message-
> From: Yoshihiro Shimoda
> Sent: Wednesday, August 30, 2017 10:14 PM
>
> Hi Geert-san,
>
> Sorry, I also missed this email...
>
> > -Original Message-
> > From: Geert Uytterhoeven
> > Sent: Wednesday, August 16, 2017 8:06 PM
> >
> > Hi Shimoda
Hello Geert,
On Wed, Aug 30, 2017 at 10:15 PM, Geert Uytterhoeven
wrote:
> Hi Javier,
>
> On Wed, Aug 30, 2017 at 9:57 PM, Javier Martinez Canillas
> wrote:
>>> I think we should talk about the same case: Let me repeat what I did:
>>>
>>> 1) I added your patch "eeprom: at24: Add OF device ID tab
On Wed, Aug 30, 2017 at 03:41:18PM +0100, Dietmar Eggemann wrote:
> The following 'capacity-dmips-mhz' dt property values are used:
>
> Cortex-A15: 1024, Cortex-A7: 539
>
> They have been derived from the cpu_efficiency values:
>
> Cortex-A15: 3891, Cortex-A7: 2048
>
> by scaling them so that t
Hi Javier,
On Wed, Aug 30, 2017 at 9:57 PM, Javier Martinez Canillas
wrote:
>> I think we should talk about the same case: Let me repeat what I did:
>>
>> 1) I added your patch "eeprom: at24: Add OF device ID table"
>> 2) I added an EEPROM node to an I2C
>>
>> + eeprom@50 {
>> +
>
> I think we should talk about the same case: Let me repeat what I did:
>
> 1) I added your patch "eeprom: at24: Add OF device ID table"
> 2) I added an EEPROM node to an I2C
>
> + eeprom@50 {
> + compatible = "renesas,24c01";
> + reg = <0x50>;
> + };
>
> -
On Thu, Aug 24, 2017 at 10:35:44AM +0100, Biju Das wrote:
> Add internal PCI bridge support for r8a7743/5 SoC. Renesas RZ/G1[ME]
> (R8A7743/5) internal PCI bridge is identical to the R-Car Gen2 family.
>
> Signed-off-by: Biju Das
Applied with Simon's ack to pci/host-rcar, thanks!
> ---
> This p
On Wed, Aug 30, 2017 at 06:19:02PM +0200, Javier Martinez Canillas wrote:
> Hello Wolfram,
>
> On Tue, Aug 29, 2017 at 10:48 AM, Wolfram Sang wrote:
> >
> >> I don't have a DT based system at hand now, but I'll test it again and
> >> let you know probably tomorrow.
> >
> > I will try again today,
Hello Wolfram,
On Tue, Aug 29, 2017 at 10:48 AM, Wolfram Sang wrote:
>
>> I don't have a DT based system at hand now, but I'll test it again and
>> let you know probably tomorrow.
>
> I will try again today, too. Thanks!
>
Ok, I had some time to do some tests again. I used an ARM Chromebook
(Exy
On Wed, Aug 30, 2017 at 01:22:32PM +, Chris Brandt wrote:
> Hi Simon,
>
> On Wednesday, August 30, 2017, Simon Horman wrote:
> > On Fri, Feb 17, 2017 at 11:29:25AM +0100, Geert Uytterhoeven wrote:
> > > On Thu, Feb 16, 2017 at 6:23 PM, Chris Brandt
> > wrote:
> > > > For the RZ/A1, the only w
: Biju Das
Signed-off-by: Chris Paterson
---
This patch is tested against renesas-dev tag 20170830-v4.13-rc7
arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts | 26 ++
1 file changed, 26 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
b/arch/arm/boot
The patch
ASoC: rsnd: Drop unit-addresses without reg properties
has been applied to the asoc tree at
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and
For the series,
On Salvator-XS (with minor kernel change to enable .uapi on VSPD entities)
root@Ubuntu-ARM64:~/vsp-tests# ./vsp-unit-test-0024.sh
Testing BRS in RGB24 with 1 inputs: pass
Testing BRS in RGB24 with 2 inputs: pass
Testing BRS in YUV444M with 1 inputs: pass
Testing BRS in YUV444M wit
Remove the 'cpu_efficiency/clock-frequency dt property' based solution
to set cpu capacity which was only working for Cortex-A15/A7 arm
big.LITTLE systems.
I.e. the 'capacity-dmips-mhz' based solution is now the only one. It is
shared between arm and arm64 and works for every big.LITTLE system no
The following 'capacity-dmips-mhz' dt property values are used:
Cortex-A15: 1024, Cortex-A7: 539
They have been derived from the cpu_efficiency values:
Cortex-A15: 3891, Cortex-A7: 2048
by scaling them so that the Cortex-A15s (big cores) use 1024.
The cpu_efficiency values were originally deri
The following 'capacity-dmips-mhz' dt property values are used:
Cortex-A15: 1024, Cortex-A7: 539
They have been derived form the cpu_efficiency values:
Cortex-A15: 3891, Cortex-A7: 2048
by scaling them so that the Cortex-A15s (big cores) use 1024.
The cpu_efficiency values were originally deri
The following 'capacity-dmips-mhz' dt property values are used:
Cortex-A15: 1024, Cortex-A7: 539
They have been derived form the cpu_efficiency values:
Cortex-A15: 3891, Cortex-A7: 2048
by scaling them so that the Cortex-A15s (big cores) use 1024.
The cpu_efficiency values were originally deri
For Cortex-A15/A7 arm big.LITTLE systems there are currently two ways to
set the cpu capacity.
The first one (commit 06073ee26775 "ARM: 8621/3: parse cpu
capacity-dmips-mhz from DT") is based on dt 'cpu capacity-dmips-mhz'
bindings and the appropriate dt parsing code in
drivers/base/arch_topology.
Hi Kieran,
On Wednesday, 30 August 2017 17:31:11 EEST Kieran Bingham wrote:
> Hi Laurent,
>
> Clearly I hit send too early :-D
>
> On 30/08/17 15:16, Kieran Bingham wrote:
> > Hi Laurent,
> >
> > On 24/08/17 10:30, Laurent Pinchart wrote:
> >> Signed-off-by: Laurent Pinchart
> >
> > Nothing
Hi Laurent,
Clearly I hit send too early :-D
On 30/08/17 15:16, Kieran Bingham wrote:
> Hi Laurent,
>
> On 24/08/17 10:30, Laurent Pinchart wrote:
>> Signed-off-by: Laurent Pinchart
>
> Nothing scary in here. Just pending testing the other patchset/issues, then I
> can run this through as wel
On Wed, Aug 30, 2017 at 10:05 AM, Dirk Behme wrote:
> DRIF support for r8a7795 was initially added with commit 2d775831988
> ("pinctrl: sh-pfc: r8a7795: Add DRIF support") and later dropped from
> the new pfc-r8a7795.c while re-naming the initial pfc-r8a7795.c to
> pfc-r8a7795-es1.c in commit b205
Hi Laurent,
On 24/08/17 10:30, Laurent Pinchart wrote:
> Signed-off-by: Laurent Pinchart
Nothing scary in here. Just pending testing the other patchset/issues, then I
can run this through as well for a tested-by.
Meanwhile:
Reviewed-by: Kieran Bingham
> ---
> tests/vsp-unit-test-0024.sh |
On Tue, Aug 29, 2017 at 5:51 PM, Wolfram Sang
wrote:
> From: Takeshi Kihara
>
> Add SDHI0-3 support for R-Car H3 ES2.0 based on a patch from the Renesas
> BSP. SDHI pin config is identical to H3 ES1.*.
>
> Signed-off-by: Takeshi Kihara
> Signed-off-by: Dirk Behme
> Signed-off-by: Wolfram Sang
Hi Laurent,
Thankyou for the patch
On 24/08/17 10:30, Laurent Pinchart wrote:
> Reuse the BRU code, using the brx generic name to cover both BRU and
> BRS.
>
> Signed-off-by: Laurent Pinchart
This looks good to me:
Reviewed-by: Kieran Bingham
> ---
> scripts/vsp-lib.sh | 63
> +
Describe the PCI USB devices that are behind the PCI bridges, adding
necessary links to the USB PHY device.
Signed-off-by: Biju Das
---
arch/arm/boot/dts/r8a7743.dtsi | 24
1 file changed, 24 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/
Signed-off-by: Biju Das
---
arch/arm/boot/dts/r8a7743-iwg20d-q7.dts | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7743-iwg20d-q7.dts
b/arch/arm/boot/dts/r8a7743-iwg20d-q7.dts
index 63166f9..0136864 100644
--- a/arch/arm/boot/dts/r8a7743-iwg20d-q7.dts
+++ b/arch/arm
Enable internal AHB-PCI bridges for the USB EHCI/OHCI controllers
attached to them.
Signed-off-by: Biju Das
---
arch/arm/boot/dts/r8a7743-iwg20d-q7.dts | 22 ++
1 file changed, 22 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7743-iwg20d-q7.dts
b/arch/arm/boot/dts/r8a7743
Define the r8a7743 generic part of the USB PHY device node.
Signed-off-by: Biju Das
---
arch/arm/boot/dts/r8a7743.dtsi | 22 ++
1 file changed, 22 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
index 3f1faad..a81d70e 100644
--- a/a
Hello,
This series aims to add USB2.0 Host support on iWave RZ/G1M(r8a7743)
based board.
This series has been tested against renesas-dev tag 20170830-v4.13-rc7
This patch has documentation dependency on below patches
* PCI: rcar: Add r8a7743/5 support
https://patchwork.kernel.org/patch/9919697
Add device nodes for the r8a7743 internal PCI bridge devices.
Signed-off-by: Biju Das
---
arch/arm/boot/dts/r8a7743.dtsi | 46 ++
1 file changed, 46 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
index 6dd9b0b..
Hi Simon,
On Wednesday, August 30, 2017, Simon Horman wrote:
> On Fri, Feb 17, 2017 at 11:29:25AM +0100, Geert Uytterhoeven wrote:
> > On Thu, Feb 16, 2017 at 6:23 PM, Chris Brandt
> wrote:
> > > For the RZ/A1, the only way to do a reset is to overflow the WDT.
> > >
> > > Signed-off-by: Chris Br
Hi Geert-san,
Sorry, I also missed this email...
> -Original Message-
> From: Geert Uytterhoeven
> Sent: Wednesday, August 16, 2017 8:06 PM
>
> Hi Shimoda-san, Kihara-san,
>
> On Wed, Aug 9, 2017 at 2:19 PM, Yoshihiro Shimoda
> wrote:
> > From: Takeshi Kihara
> >
> > Signed-off-by: Ta
Hi Geert-san,
I'm sorry. I missed this email...
> From: Geert Uytterhoeven
> Sent: Wednesday, August 16, 2017 8:11 PM
>
> Hi Shimoda-san, Kihara-san,
>
> On Wed, Aug 9, 2017 at 2:19 PM, Yoshihiro Shimoda
> wrote:
> > From: Takeshi Kihara
> >
> > Signed-off-by: Takeshi Kihara
> > Signed-off-b
Hi Jacopo,
Thank you for the quick analysis.
On Wednesday, August 30, 2017, jmondi wrote:
> After some investigations, it turns out some register settings
> performed during pin_reset() are invalid and hang the system BUT only
> when performed on Port_9.
>
> Specifically, setting PMC and PIPC re
Hi Geert, Chris,
On Wed, Aug 30, 2017 at 10:26:30AM +0200, Geert Uytterhoeven wrote:
> CC Timur, LinusW, gpio
>
> On Tue, Aug 29, 2017 at 8:56 PM, Chris Brandt
> wrote:
> > Just FYI,
> >
> > After pulling Geert's new renesas-drivers-2017-08-29-v4.13-rc7, I tried
> > testing RZ/A1 and it hangs du
Hi Laurent,
On Wed, Aug 30, 2017 at 12:10 PM, Laurent Pinchart
wrote:
> On Wednesday, 30 August 2017 12:57:31 EEST Geert Uytterhoeven wrote:
>> Use the preferred generic node name in the example.
>>
>> Signed-off-by: Geert Uytterhoeven
>> ---
>> Documentation/devicetree/bindings/media/renesas,v
Hi Geert,
Thank you for the patch.
On Wednesday, 30 August 2017 13:03:17 EEST Geert Uytterhoeven wrote:
> Node names should not use numerical suffixes if the nodes can be
> distinguished by unit-address.
>
> Signed-off-by: Geert Uytterhoeven
Acked-by: Laurent Pinchart
> ---
> arch/arm64/boo
Hi Geert,
Thank you for the patch.
On Wednesday, 30 August 2017 12:57:31 EEST Geert Uytterhoeven wrote:
> Use the preferred generic node name in the example.
>
> Signed-off-by: Geert Uytterhoeven
> ---
> Documentation/devicetree/bindings/media/renesas,vsp1.txt | 2 +-
> 1 file changed, 1 inser
Hi Geert,
Thank you for the patch.
On Wednesday, 30 August 2017 12:53:01 EEST Geert Uytterhoeven wrote:
> Node names should not use numerical suffixes if the nodes can be
> distinguished by unit-address.
>
> Signed-off-by: Geert Uytterhoeven
Acked-by: Laurent Pinchart
> ---
> Documentation/
Node names should not use numerical suffixes if the nodes can be
distinguished by unit-address.
Signed-off-by: Geert Uytterhoeven
---
arch/arm64/boot/dts/renesas/r8a7795.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
b/arch/
Nodes without reg properties must not have unit addresses:
Warning (unit_address_vs_reg): Node .../rcar_sound,dvc/dvc@0 has a unit
name, but no reg property
Signed-off-by: Geert Uytterhoeven
---
Despite the example, there don't seem to be any DTSes with multiple
"simple-audio-card,cpu" node
Use the preferred generic node name in the example.
Signed-off-by: Geert Uytterhoeven
---
Documentation/devicetree/bindings/media/renesas,vsp1.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/media/renesas,vsp1.txt
b/Documentation/devicet
Use the preferred generic node name in the example.
Signed-off-by: Geert Uytterhoeven
---
Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt
b/Doc
Node names should not use numerical suffixes if the nodes can be
distinguished by unit-address.
Signed-off-by: Geert Uytterhoeven
---
Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
a/Documentation/devicetree
Hi Laurent,
Thanks for the patch.
On 24/08/17 10:30, Laurent Pinchart wrote:
> Use the media device under test, not the default media0.
>
> Signed-off-by: Laurent Pinchart
Looks good, and looks like this is the only use of media-ctl directly.
Reviewed-by: Kieran Bingham
> ---
> scripts/vsp
On Wed, Aug 30, 2017 at 10:08:24AM +0200, Niklas Söderlund wrote:
> Hi Simon,
>
> On 2017-08-30 09:36:37 +0200, Simon Horman wrote:
> > On Fri, Aug 11, 2017 at 11:57:03AM +0200, Niklas Söderlund wrote:
> > > In order to test Virtual Channels use VC1 for CVBS input from the
> > > adv748x.
> > >
>
On Wed, Aug 30, 2017 at 10:21:46AM +0200, Geert Uytterhoeven wrote:
> Hi Simon,
>
> On Wed, Aug 30, 2017 at 9:26 AM, Simon Horman wrote:
> > On Mon, Aug 28, 2017 at 09:44:54AM +0200, Simon Horman wrote:
> >> On Fri, Aug 25, 2017 at 02:56:48PM +0200, Geert Uytterhoeven wrote:
> >> > This patch ser
On Wed, Aug 30, 2017 at 09:35:28AM +0200, jmondi wrote:
> Hi Simon,
>
> On Wed, Aug 30, 2017 at 09:25:42AM +0200, Simon Horman wrote:
> > On Thu, Aug 24, 2017 at 02:53:59PM +0200, jmondi wrote:
> > > Thanks Geert,
> > >
> > > On Thu, Aug 24, 2017 at 01:56:16PM +0200, Geert Uytterhoeven wrote:
> >
On Wed, Aug 30, 2017 at 11:09:44AM +0200, Geert Uytterhoeven wrote:
> Hi Dirk,
>
> On Tue, Aug 29, 2017 at 12:36 PM, Dirk Behme wrote:
> > On 29.08.2017 11:44, Geert Uytterhoeven wrote:
> >> On Tue, Aug 29, 2017 at 11:15 AM, Dirk Behme
> >> wrote:
> >>>
> >>> But ZG and with this module clock #1
Hi Dirk,
On Tue, Aug 29, 2017 at 12:36 PM, Dirk Behme wrote:
> On 29.08.2017 11:44, Geert Uytterhoeven wrote:
>> On Tue, Aug 29, 2017 at 11:15 AM, Dirk Behme
>> wrote:
>>>
>>> But ZG and with this module clock #112 is still missing, no?
>>>
>>> https://git.kernel.org/pub/scm/linux/kernel/git/hor
On Fri, Dec 09, 2016 at 01:35:06PM +0100, Ulrich Hecht wrote:
> Hi!
>
> This is a slightly updated version of Laurent's series that adds the fix
> suggested by Magnus Damm and connects the FCP devices on M3-W to their
> IPMMU. It also drops the patches that have already been picked up in the
> med
On Fri, Feb 17, 2017 at 11:29:25AM +0100, Geert Uytterhoeven wrote:
> On Thu, Feb 16, 2017 at 6:23 PM, Chris Brandt
> wrote:
> > For the RZ/A1, the only way to do a reset is to overflow the WDT.
> >
> > Signed-off-by: Chris Brandt
>
> Reviewed-by: Geert Uytterhoeven
Hi Chris,
while going thr
CC Timur, LinusW, gpio
On Tue, Aug 29, 2017 at 8:56 PM, Chris Brandt wrote:
> Just FYI,
>
> After pulling Geert's new renesas-drivers-2017-08-29-v4.13-rc7, I tried
> testing RZ/A1 and it hangs during boot.
>
> Basically...
>
> [ 110.329579] pinctrl-rza1 fcfe3000.pin-controller: Parsed gpiochip g
Hi Simon,
On Wed, Aug 30, 2017 at 9:26 AM, Simon Horman wrote:
> On Mon, Aug 28, 2017 at 09:44:54AM +0200, Simon Horman wrote:
>> On Fri, Aug 25, 2017 at 02:56:48PM +0200, Geert Uytterhoeven wrote:
>> > This patch series adds initial R-Car V3M infrastructure:
>> > 1. SoC DT bindings,
>> > 2.
On Mon, Mar 20, 2017 at 05:35:18PM +0900, Magnus Damm wrote:
> arm64: dts: r8a7795: IPMMU upstream integration V3
>
> [PATCH v3 01/09] arm64: dts: r8a7795: Add IPMMU device nodes
> [PATCH v3 02/09] arm64: dts: r8a7795: Tie Audio/SYS-DMAC to IPMMU-DS0/1 and
> MP1
> [PATCH v3 03/09] arm64: dts: r8a
On Wed, Aug 30, 2017 at 10:06:30AM +0200, Simon Horman wrote:
> On Thu, Apr 27, 2017 at 05:40:51PM +0300, Laurent Pinchart wrote:
> > Hi Ulrich,
> >
> > Thank you for the patch.
> >
> > On Thursday 27 Apr 2017 16:37:42 Ulrich Hecht wrote:
> > > From: Takeshi Kihara
> > >
> > > This patch enable
Hi Simon,
On 2017-08-30 09:36:37 +0200, Simon Horman wrote:
> On Fri, Aug 11, 2017 at 11:57:03AM +0200, Niklas Söderlund wrote:
> > In order to test Virtual Channels use VC1 for CVBS input from the
> > adv748x.
> >
> > Signed-off-by: Niklas Söderlund
> > ---
> > arch/arm64/boot/dts/renesas/salv
On Thu, Apr 27, 2017 at 05:40:51PM +0300, Laurent Pinchart wrote:
> Hi Ulrich,
>
> Thank you for the patch.
>
> On Thursday 27 Apr 2017 16:37:42 Ulrich Hecht wrote:
> > From: Takeshi Kihara
> >
> > This patch enables PWM2 for Salvator-X board on R8A7795 SoC.
> >
> > Signed-off-by: Takeshi Kiha
DRIF support for r8a7795 was initially added with commit 2d775831988
("pinctrl: sh-pfc: r8a7795: Add DRIF support") and later dropped from
the new pfc-r8a7795.c while re-naming the initial pfc-r8a7795.c to
pfc-r8a7795-es1.c in commit b205914c8f8 ("pinctrl: sh-pfc: r8a7795:
Add support for R-Car H3
On Tue, Jul 18, 2017 at 04:26:25PM +0200, Geert Uytterhoeven wrote:
> provides *_MODE definitions for the various processor
> modes, but monitor mode was missing.
>
> Add MON_MODE to avoid code using the hardcoded value.
>
> Suggested-by: Marc Zyngier
> Signed-off-by: Geert Uytterhoeven
> ---
> From: Simon Horman [mailto:ho...@verge.net.au]
> Sent: 30 August 2017 08:32
>
> On Tue, Aug 22, 2017 at 03:23:39PM +0300, Sergei Shtylyov wrote:
> > On 08/22/2017 12:10 PM, Chris Paterson wrote:
> >
> > >>From: Biju Das [mailto:biju@bp.renesas.com]
> > >>Sent: 14 August 2017 10:53
> > >>
>
On Fri, Aug 11, 2017 at 11:57:03AM +0200, Niklas Söderlund wrote:
> In order to test Virtual Channels use VC1 for CVBS input from the
> adv748x.
>
> Signed-off-by: Niklas Söderlund
> ---
> arch/arm64/boot/dts/renesas/salvator-common.dtsi | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
Hi Simon,
On Wed, Aug 30, 2017 at 09:25:42AM +0200, Simon Horman wrote:
> On Thu, Aug 24, 2017 at 02:53:59PM +0200, jmondi wrote:
> > Thanks Geert,
> >
> > On Thu, Aug 24, 2017 at 01:56:16PM +0200, Geert Uytterhoeven wrote:
> > > Hi Jacopo,
> > >
> >
> > [snip]
> >
> > > > I haven't find any menti
On Tue, Aug 22, 2017 at 03:23:39PM +0300, Sergei Shtylyov wrote:
> On 08/22/2017 12:10 PM, Chris Paterson wrote:
>
> >>From: Biju Das [mailto:biju@bp.renesas.com]
> >>Sent: 14 August 2017 10:53
> >>
> >>Signed-off-by: Biju Das
> >>---
> >>v1-->v2
> >>Corrected the resets property for i2c6
On Thu, Aug 17, 2017 at 04:09:09PM +0100, Biju Das wrote:
> Adding pinctrl support for scif4 interface.
>
> Signed-off-by: Biju Das
> ---
> This patch depends upon the below patch series
> [PATCH 0/2] ARM: dts: Add iWave RZ/G1E board support
> http://www.spinics.net/lists/devicetree/msg190513.ht
On Tue, Aug 22, 2017 at 05:23:26PM +0300, Laurent Pinchart wrote:
> The DU is already wired up to the HDMI encoder, all we need to do is
> enable it.
>
> Signed-off-by: Laurent Pinchart
> ---
> arch/arm64/boot/dts/renesas/ulcb.dtsi | 4
> 1 file changed, 4 insertions(+)
>
> This patch has
On Mon, Aug 28, 2017 at 09:44:54AM +0200, Simon Horman wrote:
> On Fri, Aug 25, 2017 at 02:56:48PM +0200, Geert Uytterhoeven wrote:
> > Hi all,
> >
> > This patch series adds initial R-Car V3M infrastructure:
> > 1. SoC DT bindings,
> > 2. Main Kconfig symbol.
> >
> > Both follow the exam
On Thu, Aug 24, 2017 at 02:53:59PM +0200, jmondi wrote:
> Thanks Geert,
>
> On Thu, Aug 24, 2017 at 01:56:16PM +0200, Geert Uytterhoeven wrote:
> > Hi Jacopo,
> >
>
> [snip]
>
> > > I haven't find any mention in device tree bindings documentation of a
> > > "reset-gpio" property for sh_eth, in t
On Tue, Aug 29, 2017 at 03:05:53PM +, Chris Paterson wrote:
>
>
> > From: Wolfram Sang [mailto:w...@the-dreams.de]
> > Sent: 29 August 2017 15:59
> >
> > On Tue, Aug 29, 2017 at 02:52:06PM +0100, Biju Das wrote:
> > > Add support for r8a7743/5 SoC.Renesas RZ/G1[ME] (R8A7743/5) SDHI is
> > >
On Tue, Aug 29, 2017 at 02:52:06PM +0100, Biju Das wrote:
> Add support for r8a7743/5 SoC.Renesas RZ/G1[ME] (R8A7743/5) SDHI
> is identical to the R-Car Gen2 family.
>
> Signed-off-by: Biju Das
Acked-by: Simon Horman
> ---
> DT binding patch for r8a7743/5 SoC is applied for mmc next. But the d
On Tue, Aug 29, 2017 at 10:56:21AM +0100, Biju Das wrote:
> Hello,
>
> Resending this patches because of the previous merge issues.
>
> This series has been tested against renesas dev tag
> renesas-devel-20170828-v4.13-rc7.
>
> Biju Das (2):
> ARM: dts: iwg20d-q7: Add chosen node
> ARM: dt
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