Hi Kieran,
On Monday, 11 September 2017 23:27:39 EEST Kieran Bingham wrote:
> On 17/08/17 13:13, Laurent Pinchart wrote:
> > On Monday 14 Aug 2017 16:13:26 Kieran Bingham wrote:
> >> Adapt the dl->body0 object to use an object from the fragment pool.
> >> This greatly reduces the pressure on the
Hi Kieran,
On Monday, 11 September 2017 23:30:25 EEST Kieran Bingham wrote:
> On 17/08/17 13:13, Laurent Pinchart wrote:
> > On Monday 14 Aug 2017 16:13:25 Kieran Bingham wrote:
> >> Each display list allocates a body to store register values in a dma
> >> accessible buffer from a dma_alloc_wc()
Hi,
I am trying to port from 3.4.11 kernel to 3.10.107 based on my sh7757/58
processor hardware and running into some odd behavior with user land
applications. I pretty much got the kernel up and running but some of the
applications in user land won't launch and are crashing with the below
On 09/12/2017 11:37 PM, Sergei Shtylyov wrote:
Define the Eagle board dependent part of the EtherAVB device node.
Enable DHCP and NFS root for the kernel booting.
Based on the original (and large) patch by Vladimir Barinov.
Signed-off-by: Vladimir Barinov
Define the generic R8A77970 part of the EtherAVB device node.
Based on the original (and large) patch by Daisuke Matsushita
.
Signed-off-by: Vladimir Barinov
Signed-off-by: Sergei Shtylyov
Describe [H]SCIF ports in the R8A77970 device tree.
Based on the original (and large) patch by Daisuke Matsushita
.
Signed-off-by: Vladimir Barinov
Signed-off-by: Sergei Shtylyov
---
Add the initial device tree for the R8A77970 SoC based Eagle board.
The board has 1 debug serial port (SCIF0); include support for it,
so that the serial console can work.
Based on the original (and large) patch by Vladimir Barinov
.
Signed-off-by: Vladimir
Define the Eagle board dependent part of the EtherAVB device node.
Enable DHCP and NFS root for the kernel booting.
Based on the original (and large) patch by Vladimir Barinov.
Signed-off-by: Vladimir Barinov
Signed-off-by: Sergei Shtylyov
Add support for R-Car V3M (R8A77970) SoC power areas to the R-Car SYSC
driver.
Based on the original (and large) patch by Daisuke Matsushita
.
Signed-off-by: Vladimir Barinov
Signed-off-by: Sergei Shtylyov
Hello.
Here's the set of 11 patches against Simon Horman's 'renesas.git' repo's
'renesas-devel-20170911v2-v4.13' tag. I'm adding the device tree support for
the R8A77970-based Eagle board. The necessary SYS-DMAC, [H]SCIF, and EtherAVB
bindings updates have been posted earlier.
[01/11] soc:
R-Car V3M (R8A77970) SoC also has the R-Car gen3 compatible EtherAVB
device, so document the SoC specific bindings.
Signed-off-by: Sergei Shtylyov
---
The patch is against DaveM's 'net-next.git' repo but I wouldn't mind if it's
applied to 'net.git' instead.
Hi Kieran,
On Tuesday, 12 September 2017 00:16:50 EEST Kieran Bingham wrote:
> On 17/08/17 19:13, Laurent Pinchart wrote:
> > On Monday 14 Aug 2017 16:13:28 Kieran Bingham wrote:
> >> The entities provide a single .configure operation which configures the
> >> object into the target display list,
Hi Kieran,
On Tuesday, 12 September 2017 00:42:09 EEST Kieran Bingham wrote:
> On 17/08/17 18:58, Laurent Pinchart wrote:
> > On Monday 14 Aug 2017 16:13:29 Kieran Bingham wrote:
> >> Currently the entities store their configurations into a display list.
> >> Adapt this such that the code can be
Hello!
On 09/12/2017 07:47 PM, Rob Herring wrote:
R-Car V3M (R8A77970) SoC also has the R-Car gen3 compatible SCIF and HSCIF
ports, so document the SoC specific bindings.
Signed-off-by: Sergei Shtylyov
---
This patch is against the 'tty-next' branch of
On Sat, Sep 02, 2017 at 01:15:13AM +0300, Sergei Shtylyov wrote:
> R-Car V3M (R8A77970) SoC also has the R-Car gen3 compatible SCIF and HSCIF
> ports, so document the SoC specific bindings.
>
> Signed-off-by: Sergei Shtylyov
>
> ---
> This patch is against
Add support for RX checksum offload. This is enabled by default and
may be disabled and re-enabled using ethtool:
# ethtool -K eth0 rx off
# ethtool -K eth0 rx on
The RAVB provides a simple checksumming scheme which appears to be
completely compatible with CHECKSUM_COMPLETE: a 1's complement
Hi, all.
Gentle reminder.
On 05.09.17 19:52, Oleksandr wrote:
Hi, Magnus, maintainers, all.
On 19.06.17 14:04, Magnus Damm wrote:
iommu/ipmmu-vmsa: r8a7796 support V4
[PATCH v4 1/3] iommu/ipmmu-vmsa: Add r8a7796 DT binding
[PATCH v4 2/3] iommu/ipmmu-vmsa: Increase maximum micro-TLBS to 48
Commit 3810e96056ffddf6 ("sh: modify pinmux for SH7757 2nd cut") renamed
GPIO_PT[JLNQ]7 to GPIO_PT[JLNQ]7_RESV, and removed the existing users
from the pinmux_pins[] array.
However, pinmux_pins[] is initialized through PINMUX_GPIO(), using
designated array initializers, where the GPIO_* enums
On sh7722/Migo-R, pinctrl registration fails with:
sh-pfc pfc-sh7722: pin 0 already registered
sh-pfc pfc-sh7722: error during pin registration
sh-pfc pfc-sh7722: could not register: -22
sh-pfc: probe of pfc-sh7722 failed with error -22
pinmux_pins[] is initialized through
Pinmux_pins[] is initialized through PINMUX_GPIO(), using designated
array initializers, where the GPIO_* enums serve as indices.
If enum values are defined, but never used, pinmux_pins[] contains
(zero-filled) holes. Such entries are treated as pin zero, which was
registered before, thus leading
Hi Andrew,
I'm resending this to you due to unresponsiveness from the SuperH
maintainers (v2 sent before on May 11, pinged on June 30 and August 14).
Magnus Damm reported that on sh7722/Migo-R, pinctrl registration fails
with:
sh-pfc pfc-sh7722: pin 0 already registered
sh-pfc
Pinmux_pins[] is initialized through PINMUX_GPIO(), using designated
array initializers, where the GPIO_* enums serve as indices.
If enum values are defined, but never used, pinmux_pins[] contains
(zero-filled) holes. Such entries are treated as pin zero, which was
registered before, thus leading
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