Hi Liviu,
On Monday, 13 November 2017 13:53:14 EET Liviu Dudau wrote:
> On Mon, Nov 13, 2017 at 12:32:28PM +0200, Laurent Pinchart wrote:
> > When the DU sources its frames from a VSP, it performs no memory access
> > and thus has no requirements on imported dma-buf memory types. In
> > particular
Describe all 6 GPIO controllers in the R8A77970 device tree.
Signed-off-by: Sergei Shtylyov
---
arch/arm64/boot/dts/renesas/r8a77970.dtsi | 90 ++
1 file changed, 90 insertions(+)
Index: renesas/arch/arm64/boot/dts/renesas/r8a77970.dtsi
===
Hello!
Here's the set of 2 patches against Simon Horman's 'renesas.git' repo's
'renesas-devel-20171113-v4.14' tag. We're adding the R8A77970 GPIO nodes
and then describing the PHY IRQ for EtherAVB device declared earlier.
These patches depend on the R8A779
Specify EtherAVB PHY IRQ in the Eagle board's device tree, now that we
have the GPIO support (previously phylib had to resort to polling).
Signed-off-by: Sergei Shtylyov
---
arch/arm64/boot/dts/renesas/r8a77970-eagle.dts |2 ++
1 file changed, 2 insertions(+)
Index: renesas/arch/arm64/bo
Hi Sergei,
On Fri, Nov 10, 2017 at 6:59 PM, Sergei Shtylyov
wrote:
> Add the PFC support for the R8A77970 SoC including pin groups for some
> on-chip devices such as CAN-FD, EtherAVB, [H]SCIF, I2C, INTC-EX, MMC,
> MSIOF, PWM, VIN...
>
> Based on the original (and large) patch by Daisuke Matsushit
Hi Biju,
On Mon, Nov 13, 2017 at 5:37 PM, Biju Das wrote:
> Add support for r8a7743. The Renesas RZ/G1M(R8A7743)PCIe controller
> is identical to the R-Car Gen2 family.
>
> No driver change is needed due to the fallback compatible value
> "renesas,pcie-rcar-gen2".
> Adding the SoC-specific compat
On 11/13/2017 08:03 AM, Simon Horman wrote:
> On Fri, Nov 10, 2017 at 10:58:40PM +0100, Marek Vasut wrote:
>> Just clean up the macros in the RCar PCI driver, no functional change.
>
> Could you describe the cleanup in slightly more detail?
> My reading is 1. Use BIT() macro 2. tidy up whitespace.
Enable PCIe Controller & set PCIe bus clock frequency.
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
---
This patch has dependency on below patch
* ARM: dts: iwg20d-q7-common: Add can0 support to carrier board
https://patchwork.kernel.org/patch/10046879/
arch/arm/boot/dts/iwg20d-q7-com
Hello,
This series aims to add PCIEC support for iWave RZ/G1M (R8A7743) board.
This patch has documentation dependency on below patch
* dt-bindings: PCI: rcar: Add device tree support for r8a7743
https://patchwork.kernel.org/patch/10056407/
This patch series has dependency on below patches
* A
This patch adds a default PCIe bus clock node.
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
---
This patch has dependency on below patch
* ARM: dts: r8a7743: Add CAN[01] SoC support
https://patchwork.kernel.org/patch/10046875/
arch/arm/boot/dts/r8a7743.dtsi | 7 +++
1 file changed
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
---
arch/arm/boot/dts/r8a7743.dtsi | 28
1 file changed, 28 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
index de4b8c6..9e26c40 100644
--- a/arch/arm/boot/dts/r8a7743.
Add support for r8a7743. The Renesas RZ/G1M(R8A7743)PCIe controller
is identical to the R-Car Gen2 family.
No driver change is needed due to the fallback compatible value
"renesas,pcie-rcar-gen2".
Adding the SoC-specific compatible values here has three purposes:
1. Document which SoCs have this h
On 13 November 2017 at 16:46, Ulf Hansson wrote:
> The generic problem this series is trying to solve, is that for some bus types
> and PM domains, it's not sufficient to only check the return value from
> device_may_wakeup(), to fully understand how to treat the device during system
> suspend.
>
For some bus types and PM domains, it's not sufficient to only check the
return value from device_may_wakeup(), to fully understand how to configure
wakeup settings for the device during system suspend.
In particular, sometimes the device may need to remain in its power state,
in case the driver h
Make genpd to take the wakeup_path_in_band status flag into account during
system suspend/resume. More precisely, in case the flag has been set by the
PM core, let's leave the device in full power state and prevent the PM
domain from being powered off.
Signed-off-by: Ulf Hansson
Reviewed-by: Geer
Let's make the code a bit more readable by moving some of the code, which
deals with adjustments for parent devices in __device_suspend(), into its
own function.
Signed-off-by: Ulf Hansson
Reviewed-by: Geert Uytterhoeven
---
Changes in v2:
- Added Geert's Reviewed-by tag.
---
drivers/
The generic problem this series is trying to solve, is that for some bus types
and PM domains, it's not sufficient to only check the return value from
device_may_wakeup(), to fully understand how to treat the device during system
suspend.
One particular case that suffers from this, is the generic
Attn:
I am wondering why You haven't respond to my email for some days now.
reference to my client's contract balance payment of (11.7M,USD)
Kindly get back to me for more details.
Best Regards
Amos Kalonzo
Hi Laurent,
On 13/11/17 10:32, Laurent Pinchart wrote:
> Hello everybody,
>
> This patch series fixes two issues related to dma-buf import for the Renesas
> R-Car DU when the imported buffer is either not physically contiguous or
> located in high memory.
>
> Both cases require the use of an IOM
Hi Daniel,
On Mon, Nov 13, 2017 at 1:42 PM, Daniel Gimpelevich
wrote:
> On Mon, 2017-11-13 at 13:31 +0100, Geert Uytterhoeven wrote:
>> I've seen other use cases, e.g. the extension of the du node's
>> "clocks" and
>> "clock-names" properties from arch/arm64/boot/dts/renesas/r8a7795.dtsi
>> to
>>
On Mon, 2017-11-13 at 13:31 +0100, Geert Uytterhoeven wrote:
> I've seen other use cases, e.g. the extension of the du node's
> "clocks" and
> "clock-names" properties from arch/arm64/boot/dts/renesas/r8a7795.dtsi
> to
> arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts.
>
> To avoid the prolifer
Hi James, Daniel,
On Mon, Nov 13, 2017 at 12:23 PM, James Hogan wrote:
> On Sat, Nov 11, 2017 at 09:19:48AM -0800, Daniel Gimpelevich wrote:
>> There are two uses for this:
>>
>> 1) It may be useful to split a device-specific kernel command line between
>> a .dts file and a .dtsi file, with "boot
Hi Sergei,
On Fri, Nov 10, 2017 at 6:59 PM, Sergei Shtylyov
wrote:
> They follow the style of the existing PORT_GP_CFG_() macros and
> will be used by a follow-up patch for the R8A77970 SoC.
>
> Based on the original (and large) patch by Daisuke Matsushita
> .
>
> Signed-off-by: Vladimir Barinov
Hi Fabrizio,
On Fri, Nov 10, 2017 at 6:16 PM, Fabrizio Castro
wrote:
> This patch adds can_clk function to r8a7743/r8a7791 which is cleaner,
> as it reduces duplication, and allows for independent configuration.
>
> Signed-off-by: Fabrizio Castro
> Reviewed-by: Ramesh Shanmugasundaram
Thanks f
On Fri, Nov 10, 2017 at 2:58 PM, Ramesh Shanmugasundaram
wrote:
> This patch adds CAN FD[0-1] pinmux support for R-Car H3 ES2.0. The pin
> config is identical to H3 ES1.*.
>
> Signed-off-by: Ramesh Shanmugasundaram
>
> Reviewed-by: Fabrizio Castro
Reviewed-by: Geert Uytterhoeven
I.e. will que
On Fri, Nov 10, 2017 at 2:58 PM, Ramesh Shanmugasundaram
wrote:
> This patch adds CAN[0-1] pinmux support for R-Car H3 ES2.0. The pin
> config is identical to H3 ES1.*.
>
> Signed-off-by: Ramesh Shanmugasundaram
>
> Reviewed-by: Fabrizio Castro
Reviewed-by: Geert Uytterhoeven
I.e. will queue
On Mon, Nov 13, 2017 at 12:32:28PM +0200, Laurent Pinchart wrote:
> When the DU sources its frames from a VSP, it performs no memory access
> and thus has no requirements on imported dma-buf memory types. In
> particular the DU could import a physically non-contiguous buffer that
> would later be m
On Mon, Nov 13, 2017 at 12:32:27PM +0200, Laurent Pinchart wrote:
> The DU DMA address space is limited to 32 bits, so the DMA coherent mask
> should be set accordingly. The DMA mapping implementation will
> transparently map high memory buffers to 32-bit addresses through an
> IOMMU when present (
The DU DMA address space is limited to 32 bits, so the DMA coherent mask
should be set accordingly. The DMA mapping implementation will
transparently map high memory buffers to 32-bit addresses through an
IOMMU when present (or through bounce buffers otherwise, which isn't a
supported use case as p
Hello everybody,
This patch series fixes two issues related to dma-buf import for the Renesas
R-Car DU when the imported buffer is either not physically contiguous or
located in high memory.
Both cases require the use of an IOMMU to remap the buffers contiguously and
in 32-bit DMA space. On Gen2
When the DU sources its frames from a VSP, it performs no memory access
and thus has no requirements on imported dma-buf memory types. In
particular the DU could import a physically non-contiguous buffer that
would later be mapped contiguously through the VSP IOMMU.
This use case isn't supported a
This controller on R-Car Gen3 has 6 pipes that included PIPE 0 for
control actually. But, the datasheet has error in writing as it has
31 pipes. (However, the previous code defined 30 pipes wrongly...)
Anyway, this patch fixes it.
Fixes: 746bfe63bba3 ("usb: gadget: renesas_usb3: add support for R
The plane atomic check implementation is identical on Gen2 (DU planes)
and Gen3 (VSP planes), but two separate functions exist as they operate
on different data structures. Refactor the code to share the
implementation.
Signed-off-by: Laurent Pinchart
Tested-by: Kieran Bingham
Reviewed-by: Kiera
Unlike the KMS API, the hardware doesn't support planes exceeding the
screen boundaries or planes being located fully off-screen. We need to
clip plane coordinates to support the use case.
Fortunately the DRM core offers the drm_plane_helper_check_state()
helper that valides the scaling factor and
Hello,
This patch series fixes support for planes that cross the screen boundaries.
The KMS API supports such a configuration, but the DU and VSP hardware
doesn't. This leads to different kind of dispay artifacts or hangs.
The series starts with a bit of refactoring to share existing code and mak
CC DT
On Sat, Nov 11, 2017 at 1:38 AM, Niklas Söderlund
wrote:
> Add the SoC specific information for Renesas r8a7796.
>
> Signed-off-by: Niklas Söderlund
> Reviewed-by: Hans Verkuil
> ---
> .../devicetree/bindings/media/rcar_vin.txt | 1 +
> drivers/media/platform/rcar-vin/rcar-core.
On Fri, Nov 10, 2017 at 10:54 PM, Marek Vasut wrote:
> From: Dien Pham
>
> The controller clock can be switched off during suspend/resume,
> let runtime PM take care of that.
>
> Signed-off-by: Dien Pham
> Signed-off-by: Hien Dang
> Signed-off-by: Marek Vasut
Reviewed-by: Geert Uytterhoeven
Hi Simon,
On Mon, Nov 13, 2017 at 8:00 AM, Simon Horman wrote:
> On Fri, Nov 10, 2017 at 10:53:07PM +0100, Marek Vasut wrote:
>> On 11/10/2017 10:09 AM, Simon Horman wrote:
>> > On Wed, Nov 08, 2017 at 10:28:06AM +0100, Marek Vasut wrote:
>> >> @@ -872,11 +902,25 @@ static const struct irq_domain
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