On 12/15, Geert Uytterhoeven wrote:
> Hi Mike, Stephen,
>
> The following changes since commit 4fbd8d194f06c8a3fd2af1ce560ddb31f7ec8323:
>
> Linux 4.15-rc1 (2017-11-26 16:01:47 -0800)
>
> are available in the git repository at:
>
>
Hi Laurent,
On Tue, Dec 12, 2017 at 12:00:43PM +0200, Laurent Pinchart wrote:
> Hi Jacopo,
>
> Thank you for the patch.
>
> On Wednesday, 15 November 2017 12:55:58 EET Jacopo Mondi wrote:
> > Migo-R platform uses sh_mobile_ceu camera driver, which is now being
> > replaced by a proper V4L2 camera
The LVDCR1 register for the R-Car gen3 SoCs was documented as having the
layout different from the gen2 SoCs in the early R-Car gen3 manuals but
since v0.52 the LVDCR1 layout is described as being the same as on the gen2
SoCs; the old CHn control values are said to be prohibited now (and there
Hi Laurent,
On Mon, Dec 18, 2017 at 05:28:43PM +0200, Laurent Pinchart wrote:
> Hi Jacopo,
>
> On Monday, 18 December 2017 14:25:12 EET jacopo mondi wrote:
> > On Mon, Dec 11, 2017 at 06:15:23PM +0200, Laurent Pinchart wrote:
[snip]
> > >> +/**
> > >> + * ceu_soft_reset() - Software reset the CEU
Hi Sergei,
On Thu, Dec 21, 2017 at 5:07 PM, Sergei Shtylyov
wrote:
> On 12/21/2017 03:25 PM, Geert Uytterhoeven wrote:
>>> --- a/arch/arm64/boot/dts/renesas/salvator-common.dtsi
>>> +++ b/arch/arm64/boot/dts/renesas/salvator-common.dtsi
>>> @@ -338,6 +338,11
Hello!
On 12/21/2017 03:25 PM, Geert Uytterhoeven wrote:
We need to configure its GPIOs later.
Thanks for your patch!
--- a/arch/arm64/boot/dts/renesas/salvator-common.dtsi
+++ b/arch/arm64/boot/dts/renesas/salvator-common.dtsi
@@ -338,6 +338,11 @@
{
status = "okay";
+
On Thu, Dec 7, 2017 at 10:53 AM, Simon Horman
wrote:
>
>
> Renesas ARM64 Based SoC DT Updates for v4.16
>
> * Use r8a77970 (V3M) CPG core clock and SYSC power domain macros
>
> These may be used in
On Wed, Dec 6, 2017 at 11:21 AM, Simon Horman
wrote:
> Hi Olof, Hi Kevin, Hi Arnd,
>
> Please consider these Renesas ARM based SoC updates for v4.16.
>
>
> The following changes since commit 4fbd8d194f06c8a3fd2af1ce560ddb31f7ec8323:
>
> Linux 4.15-rc1 (2017-11-26
On Wed, Dec 6, 2017 at 11:22 AM, Simon Horman
wrote:
> Hi Olof, Hi Kevin, Hi Arnd,
>
> Please consider these Renesas ARM based SoC DT updates for v4.16.
>
>
> The following changes since commit 4fbd8d194f06c8a3fd2af1ce560ddb31f7ec8323:
>
> Linux 4.15-rc1 (2017-11-26
From: Bogdan Mirea
The present change is a bug fix for AVB link iteratively up/down.
Steps to reproduce:
- start AVB TX stream (Using aplay via MSE),
- disconnect+reconnect the eth cable,
- after a reconnection the eth connection goes iteratively up/down
The present change is a bug fix for AVB link iteratively up/down.
Steps to reproduce:
- start AVB TX stream (Using aplay via MSE),
- disconnect+reconnect the eth cable,
- after a reconnection the eth connection goes iteratively up/down
without user interaction,
- this may heal after some
From: Bogdan Mirea
The present change is a bug fix for AVB link iteratively up/down.
Steps to reproduce:
- start AVB TX stream (Using aplay via MSE),
- disconnect+reconnect the eth cable,
- after a reconnection the eth connection goes iteratively up/down
On Wed, Dec 6, 2017 at 11:21 AM, Simon Horman
wrote:
> Hi Olof, Hi Kevin, Hi Arnd,
>
> Please consider these Renesas ARM based SoC DT bindings updates for v4.16.
>
>
> The following changes since commit 4fbd8d194f06c8a3fd2af1ce560ddb31f7ec8323:
>
> Linux 4.15-rc1
On Thu, Dec 21, 2017 at 3:52 PM, Biju Das wrote:
> Add the missing clock to CA7 CPU1 node.
>
> Signed-off-by: Biju Das
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert
> From: Biju Das [mailto:biju@bp.renesas.com]
> Sent: 21 December 2017 14:52
>
> Add the missing clock to CA7 CPU1 node.
>
> Signed-off-by: Biju Das
Reviewed-by: Chris Paterson
Kind regards, Chris
Hi Simon,
On 12/21/2017 01:28 PM, Simon Horman wrote:
> On Wed, Dec 20, 2017 at 03:22:10PM +0200, Vladimir Zapolskiy wrote:
>> The present change is a bug fix for AVB link iteratively up/down.
>
> If this is a bug please consider including Fixes tags in the patches.
>
would you prefer to get
Add the missing clock to CA7 CPU1 node.
Signed-off-by: Biju Das
---
arch/arm/boot/dts/r8a7745.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi
index 835a282..ae918e9 100644
---
On 21 December 2017 at 13:24, Yoshihiro Shimoda
wrote:
>
>> From: Ulf Hansson, Sent: Thursday, December 21, 2017 7:58 PM
>>
>> On 21 December 2017 at 11:33, Yoshihiro Shimoda
>> wrote:
>> > Hi Ulf-san,
>> >
>> >> -Original
On 19 December 2017 at 14:34, Wolfram Sang
wrote:
> Because we started using io*_rep accessors previously because they are
> more widely defined across architectures, let's be consistent and use
> this family for all accessor wrappers.
>
> Signed-off-by: Wolfram
Hi Wolfram,
On Fri, Dec 15, 2017 at 5:02 PM, Wolfram Sang wrote:
> here is a topic branch for renesas-drivers which enables I2C bus
> recovery on i2c-rcar IP cores.
>
> It is based on i2c/for-next + renesas/dt-for-v4.16 +
> renesas/topc/ip-switch-rework-2017.
>
> Please pull.
Hi Wolfram,
On Fri, Dec 15, 2017 at 4:33 PM, Wolfram Sang wrote:
> Here is the the topic branch to add the I2C IP core switcher to all
> busses of Gen2 boards where some kind of switching is possible (mostly
> to/from GPIO).
>
> It is based on v4.15-rc1 + renesas/dt-for-v4.16
Hi Laurent,
On Sun, Dec 17, 2017 at 1:18 AM, Laurent Pinchart
wrote:
> The following changes since commit 9428088c90b6f7d5edd2a1b0d742c75339b36f6e:
>
> drm/qxl: reapply cursor after resetting primary (2017-12-08 13:37:02 +1000)
>
> are available in the git
Hi Laurent,
On Fri, Dec 15, 2017 at 11:12 AM, Laurent Pinchart
wrote:
> The following changes since commit 0f2278cc90181f0e1d938ba9d20928eaf1fd31ce:
>
> Merge branch 'drm/next/base' into vsp1/base (2017-12-14 01:11:25 +0200)
>
> are available in the git
> > Forgot to say, this depends on 8a64e557f399090f5d1917b2f32a065da2b12be1
> > ("gpio: pca953x: fix vendor prefix for PCA9654") which is in
> > gpio/for-next already. I cherry-picked this commit and SATA still works.
>
>It's in Linus' (Torvalds!) tree for quite some time already. :-)
Well,
On 12/21/2017 03:24 PM, Wolfram Sang wrote:
We need to configure its GPIOs later.
Signed-off-by: Wolfram Sang
---
Forgot to say, this depends on 8a64e557f399090f5d1917b2f32a065da2b12be1
("gpio: pca953x: fix vendor prefix for PCA9654") which is in
Hi Wolfram,
On Thu, Dec 21, 2017 at 1:30 PM, Wolfram Sang wrote:
>> Missing gpio-controller, #gpio-cells,
>
> I can fix that...
>
>> and interrupts properties?
>
> ... but this is not tested!
It's hardware description ;-)
Gr{oetje,eeting}s,
Geert
> Missing gpio-controller, #gpio-cells,
I can fix that...
> and interrupts properties?
... but this is not tested!
> Seems like Documentation/devicetree/bindings/gpio/gpio-pca953x.txt
> can use some updates...
Heh, I was relying on that. I can fix it, too.
signature.asc
Description: PGP
Hi Wolfram,
On Thu, Dec 21, 2017 at 12:54 PM, Wolfram Sang
wrote:
> We need to configure its GPIOs later.
Thanks for your patch!
> --- a/arch/arm64/boot/dts/renesas/salvator-common.dtsi
> +++ b/arch/arm64/boot/dts/renesas/salvator-common.dtsi
> @@ -338,6
> From: Ulf Hansson, Sent: Thursday, December 21, 2017 7:58 PM
>
> On 21 December 2017 at 11:33, Yoshihiro Shimoda
> wrote:
> > Hi Ulf-san,
> >
> >> -Original Message-
> >> From: Ulf Hansson, Sent: Wednesday, December 20, 2017 11:09 PM
> >
> >> diff
On Thu, Dec 21, 2017 at 01:21:36PM +0100, Wolfram Sang wrote:
> We need to configure its GPIOs later.
>
> Signed-off-by: Wolfram Sang
> ---
Forgot to say, this depends on 8a64e557f399090f5d1917b2f32a065da2b12be1
("gpio: pca953x: fix vendor prefix for PCA9654")
> > + pca9654: gpio@20 {
> > + compatible = "onsemi,pca9654";
>
>The registered vendor prefix is "onnn", not "onsemi". The GPIO driver no
> longer recognizes "onsemi,pca9654", I've fixed it.
Now, that's a cool vendor prefix. I'll definately use that! Onnn...
signature.asc
Signed-off-by: Wolfram Sang
---
Do you actually want patches for renesas_defconfig?
arch/arm64/configs/renesas_defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/configs/renesas_defconfig
b/arch/arm64/configs/renesas_defconfig
index
Declaration of of_usb_get_dr_mode_by_phy only depends on CONFIG_OF
and not on CONFIG_USB_SUPPORT, which actually defines it. This can
break the build like below, if USB_SUPPORT is not selected :
drivers/phy/renesas/phy-rcar-gen3-usb2.o: In function
`rcar_gen3_phy_usb2_probe':
On 12/21/2017 02:54 PM, Wolfram Sang wrote:
We need to configure its GPIOs later.
Signed-off-by: Wolfram Sang
---
arch/arm64/boot/dts/renesas/salvator-common.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git
Needs this GPIO hog, so is probably an overlay?
Signed-off-by: Wolfram Sang
---
So, this makes SATA work without any user interaction. But as said above, this
should probably be an overlay? Or any other way to deal with it? Also, we don't
have any way to check
We need to configure its GPIOs later.
Signed-off-by: Wolfram Sang
---
arch/arm64/boot/dts/renesas/salvator-common.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/salvator-common.dtsi
Hi Geert,
> Reviewed-by: Geert Uytterhoeven
> i.e. will queue in sh-pfc-for-v4.16.
Thanks for the fast review!
>
> > Note: To repeat the test you must:
> > a) switch pin7 from SW12 to OFF
>
> Funny how the relation of MD12 to SATA is mentioned only in the Salvator-XS
On Wed, Dec 20, 2017 at 03:22:10PM +0200, Vladimir Zapolskiy wrote:
> The present change is a bug fix for AVB link iteratively up/down.
If this is a bug please consider including Fixes tags in the patches.
> Steps to reproduce:
> - start AVB TX stream (Using aplay via MSE),
> -
On Wed, Dec 20, 2017 at 08:01:56PM +, Biju Das wrote:
> This series aims to add sound support for iWave RZ/G1E board.
>
> Biju Das (9):
> ARM: dts: r8a7745: Add audio clocks
> ARM: dts: r8a7745: Add audio DMAC support
> ARM: dts: r8a7745: Add sound support
> ARM: dts: iwg22d-sodimm:
On Thu, Dec 21, 2017 at 11:01:28AM +, Biju Das wrote:
> Hi Simon,
>
> > -Original Message-
> > From: Simon Horman [mailto:ho...@verge.net.au]
> > Sent: 21 December 2017 10:45
> > To: Biju Das
> > Cc: Rob Herring ; Mark Rutland
> >
Hi Simon,
> -Original Message-
> From: Simon Horman [mailto:ho...@verge.net.au]
> Sent: 21 December 2017 10:45
> To: Biju Das
> Cc: Rob Herring ; Mark Rutland
> ; Magnus Damm ;
> Chris Paterson
On 21 December 2017 at 02:39, Rafael J. Wysocki wrote:
> On Wed, Dec 20, 2017 at 3:09 PM, Ulf Hansson wrote:
>> The runtime PM deployment in the phy core is deployed using the phy core
>> device, which is created by the phy core and assigned as a child
On Wed, Dec 20, 2017 at 08:02:04PM +, Biju Das wrote:
> DMA transfer to/from SRC
>
> DMA DMApp
> [MEM] -> [SRC] -> [SSIU] -> [SSI]
>
> DMA DMApp
> [MEM] <- [SRC] <- [SSIU] <- [SSI]
>
> Current sound driver is supporting SSI/SRC random connection.
> So, this patch is
Hi Ulf-san,
> -Original Message-
> From: Ulf Hansson, Sent: Wednesday, December 20, 2017 11:09 PM
> diff --git a/include/linux/phy/phy.h b/include/linux/phy/phy.h
> index b4298a1..050b620 100644
> --- a/include/linux/phy/phy.h
> +++ b/include/linux/phy/phy.h
> @@ -17,7 +17,6 @@
>
On 21 December 2017 at 02:43, Rafael J. Wysocki wrote:
> On Fri, Dec 15, 2017 at 4:56 PM, Ulf Hansson wrote:
>> The PM core in the device_prepare() phase, resets the wakeup_path status
>> flag to the value of device_may_wakeup(). This means if a
On Wed, Dec 20, 2017 at 9:01 PM, Biju Das wrote:
> Define the generic r8a7745(RZ/G1E) part of the sound device node.
>
> This patch is based on the r8a7794 sound work by Sergei Shtylyov.
>
> Signed-off-by: Biju Das
> Reviewed-by: Fabrizio Castro
On Wed, Dec 20, 2017 at 9:02 PM, Biju Das wrote:
> This patch enables SGTL5000 audio codec on the carrier board.
>
> Signed-off-by: Biju Das
> Reviewed-by: Fabrizio Castro
Reviewed-by: Geert Uytterhoeven
On Tue, Dec 19, 2017 at 5:03 PM, Geert Uytterhoeven
wrote:
> R8A7778 is R-Car (not R-Mobile) M1.
>
> Signed-off-by: Geert Uytterhoeven
Patch applied with the ACKs.
Yours,
Linus Walleij
On Wed, Dec 20, 2017 at 9:01 PM, Biju Das wrote:
> Instantiate the audio DMA controller on the r8a7745 device tree.
>
> Signed-off-by: Biju Das
> Reviewed-by: Fabrizio Castro
Reviewed-by: Geert Uytterhoeven
On Wed, Dec 20, 2017 at 9:01 PM, Biju Das wrote:
> Describe the external audio clocks required by the sound driver.
> Boards that provide audio clocks need to override the clock frequencies.
>
> Signed-off-by: Biju Das
> Reviewed-by: Fabrizio
On Wed, Dec 20, 2017 at 09:23:07AM +0100, Simon Horman wrote:
> On Tue, Dec 19, 2017 at 05:02:05PM +0100, Geert Uytterhoeven wrote:
> > The Timer Pulse Unit has registers that lie outside the declared
> > register block. Enlarge the register block size to fix this.
> >
> > Signed-off-by: Geert
On Wed, Dec 20, 2017 at 12:02:44PM -0700, Alex Williamson wrote:
> On Fri, 24 Nov 2017 10:58:02 +
> Simon Horman wrote:
>
> > Update the IPMMU DT binding documentation to include r8a7796 (R-Car M3-W),
> > r8a77970 (R-Car V3M) and r8a77995 (R-Car D3) compat
Hi Wolfram,
On Wed, Dec 20, 2017 at 10:59 PM, Wolfram Sang
wrote:
> Tested with a Salvator-XS and H3 ES2.0.
Thanks for your patch!
> Signed-off-by: Wolfram Sang
Reviewed-by: Geert Uytterhoeven
i.e.
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