Re: [PATCH 5/9] input: ati_remote2: fix typo 'can by' to 'can be'

On Sun, May 06, 2018 at 01:23:49PM +0200, Wolfram Sang wrote: > Signed-off-by: Wolfram Sang Applied, thank you. > --- > drivers/input/misc/ati_remote2.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/input/misc/ati_remote2.c

Re: [PATCH] i2c: busses: remove superfluous ignoring of children for RPM

On Sun, Apr 29, 2018 at 08:41:04PM +0200, Wolfram Sang wrote: > These days, the I2C core ensures that the embedded adapter device > ignores the PM states of its children already. Because the adapter > device is an opaque logical device, there is no need for drivers to > repeat that again. > >

Re: [PATCH] arm64: dts: renesas: r8a77970: add SMP support

On 05/08/2018 09:40 PM, Geert Uytterhoeven wrote: >> Add the device node for the second Cortex-A53 CPU core. >> >> Based on the original (and large) patch by Daisuke Matsushita >> . >> >> Signed-off-by: Vladimir Barinov >>

Re: [PATCH] arm64: dts: renesas: r8a77970: add SMP support

Hi Sergei, On Tue, May 8, 2018 at 6:39 PM, Sergei Shtylyov wrote: > Add the device node for the second Cortex-A53 CPU core. > > Based on the original (and large) patch by Daisuke Matsushita > . > > Signed-off-by: Vladimir

Re: [PATCH v9 00/12] Sunxi: Add SMP support on A83T

On 05/08/2018 06:19 AM, Maxime Ripard wrote: > Hi, > > On Fri, May 04, 2018 at 09:05:33PM +0200, Mylène Josserand wrote: >> Hello everyone, >> >> This is a V9 of my series that adds SMP support for Allwinner sun8i-a83t. >> Based on sunxi's tree, sunxi/for-next branch. >> Depends on a patch from

[PATCH] arm64: dts: renesas: r8a77970: add SMP support

entembedded.com> --- This patch is against the 'renesas-devel-20180508-v4.17-rc4' tag of Simon Horman's 'renesas.git' repo. arch/arm64/boot/dts/renesas/r8a77970.dtsi | 10 ++ 1 file changed, 10 insertions(+) Index: renesas/arch/arm64/boot/dts/ren

Re: [PATCH igt 0/8] Non-Intel test suite fixes

On Fri, Apr 27, 2018 at 6:03 PM, Laurent Pinchart wrote: > Hi Ulrich, > > On Thursday, 15 March 2018 16:45:36 EEST Ulrich Hecht wrote: >> Hi! >> >> I have run the tests on a Renesas R-Car M3-W's DU device, and have found a >> number of false negatives that

Re: [PATCH 0/2] ARM: dts: renesas: Add missing interrupt-affinity to PMU

On Mon, May 07, 2018 at 03:40:03PM +0200, Geert Uytterhoeven wrote: > Hi Simon, Magnus, > > The Cortex-A9 PMU nodes on SH-Mobile AG5 and Emma Mobile EV2 reference > two interrupts, but lack interrupt-affinity properties, leading to: > > hw perfevents: no interrupt-affinity property for

Re: [PATCH v3 0/2] ARM: dts: renesas: Correct mask for GIC PPI interrupts

On Mon, May 07, 2018 at 03:19:51PM +0200, Geert Uytterhoeven wrote: > Hi Simon, Magnus, > > R-Car H2 and R-Mobile APE6 contain four Cortex-A15 and four Cortex-A7 > cores, hence the second interrupt specifier cell for Private Peripheral > Interrupts should use "GIC_CPU_MASK_SIMPLE(8)", to

Re: [PATCH v2 2/2] ARM: dts: r8a7740: Add CEU0

On Thu, Apr 26, 2018 at 08:24:43PM +0200, Jacopo Mondi wrote: > Describe CEU0 peripheral for Renesas R-Mobile A1 R8A7740 Soc. > > Reported-by: Geert Uytterhoeven > Signed-off-by: Jacopo Mondi Thanks, applied.

Re: [PATCH] ARM: shmobile: r8a7794: alt: add EEPROM to DTS

On Tue, May 08, 2018 at 01:14:25PM +0200, Geert Uytterhoeven wrote: > On Mon, May 7, 2018 at 2:40 PM, Wolfram Sang > wrote: > > Same EEPROM as on Koelsch, et al. > > > > Signed-off-by: Wolfram Sang > > Reviewed-by: Geert

Re: [PATCH v9 00/12] Sunxi: Add SMP support on A83T

Hi, On Fri, May 04, 2018 at 09:05:33PM +0200, Mylène Josserand wrote: > Hello everyone, > > This is a V9 of my series that adds SMP support for Allwinner sun8i-a83t. > Based on sunxi's tree, sunxi/for-next branch. > Depends on a patch from Doug Berger that allows to include the "cpu-type" >

Re: [PATCH v9 01/12] ARM: Allow this header to be included by assembly files

On Fri, May 04, 2018 at 09:05:34PM +0200, Mylène Josserand wrote: > From: Doug Berger > > The constants defined in this file are equally useful in assembly and C > source files. The arm64 architecture version of this file allows > inclusion in both assembly and C source files,

Re: [PATCH] PCI: rcar: Reuse generic pci_parse_request_of_pci_ranges() function

On Wed, Apr 25, 2018 at 06:21:25PM +0300, Vladimir Zapolskiy wrote: > The non-functional change removes a custom function to parse and > allocate PCI resources in favour of pci_parse_request_of_pci_ranges(). > > Signed-off-by: Vladimir Zapolskiy > --- >

Re: [PATCH] ARM: shmobile: r8a7794: alt: add EEPROM to DTS

On Mon, May 7, 2018 at 2:40 PM, Wolfram Sang wrote: > Same EEPROM as on Koelsch, et al. > > Signed-off-by: Wolfram Sang Reviewed-by: Geert Uytterhoeven Gr{oetje,eeting}s,

Re: [PATCH v7 05/11] ARM: smp: Add initialization of CNTVOFF

On Fri, Apr 20, 2018 at 11:10:16PM +0200, Mylène Josserand wrote: > The CNTVOFF register from arch timer is uninitialized. > It should be done by the bootloader but it is currently not the case, > even for boot CPU because this SoC is booting in secure mode. > It leads to an random offset value

Re: [PATCH v2 26/26] drm/bridge: establish a link between the bridge supplier and consumer

On 07.05.2018 15:43, Peter Rosin wrote: > On 2018-05-07 14:59, Andrzej Hajda wrote: >> On 04.05.2018 15:52, Peter Rosin wrote: >>> If the bridge supplier is unbound, this will bring the bridge consumer >>> down along with the bridge. Thus, there will no longer linger any >>> dangling pointers from

Re: [PATCH v9 07/12] ARM: sunxi: Add initialization of CNTVOFF

On 04/05/18 20:05, Mylène Josserand wrote: > Add the initialization of CNTVOFF for sun8i-a83t. > > For boot CPU, create a new machine that handles this > function's call in an "init_early" callback. We need to initialize > CNTVOFF before the arch timer's initialization otherwise, it will > not be

Re: [PATCH v9 06/12] ARM: smp: Add initialization of CNTVOFF

On 04/05/18 20:05, Mylène Josserand wrote: > The CNTVOFF register from arch timer is uninitialized. > It should be done by the bootloader but it is currently not the case, > even for boot CPU because this SoC is booting in secure mode. > It leads to an random offset value meaning that each CPU

Re: [PATCH v2 26/26] drm/bridge: establish a link between the bridge supplier and consumer

On 07.05.2018 15:53, Daniel Vetter wrote: > On Mon, May 07, 2018 at 02:59:45PM +0200, Andrzej Hajda wrote: >> On 04.05.2018 15:52, Peter Rosin wrote: >>> If the bridge supplier is unbound, this will bring the bridge consumer >>> down along with the bridge. Thus, there will no longer linger any >>>