Re: [PATCH] pinctrl: sh-pfc: fix a null pointer dereference of drive strength information

Hi Niklas, On Thu, Jun 28, 2018 at 2:41 AM Niklas Söderlund wrote: > On 2018-06-27 10:27:54 +0200, Geert Uytterhoeven wrote: > > On Wed, Jun 27, 2018 at 8:01 AM Niklas Söderlund > > wrote: > > > Not all SoCs describes the drive strength registers. When reading the > > > sysfs pinconf-pins file o

Re: [RFC PATCH 1/1] i2c: rcar: handle RXDMA HW bug on Gen3

Shimoda-san, > Please refer to "57.5.4 Usage note for the transmission and reception > procedure" in the datasheet Rev. 1.00. Thank you. I'll send a new version with the workaround in the i2c driver. > The BSP waits for maximum 1024us, not 1024ms. You are right. Sorry, my mistake. Regards,

Re: [PATCH] pinctrl: sh-pfc: fix a null pointer dereference of drive strength information

Hi Geert, On 2018-06-27 10:27:54 +0200, Geert Uytterhoeven wrote: > Hi Niklas, > > On Wed, Jun 27, 2018 at 8:01 AM Niklas Söderlund > wrote: > > Not all SoCs describes the drive strength registers. When reading the > > sysfs pinconf-pins file on such a SoC this results in a null pointer > > dere

Re: [PATCH 1/3] mmc: tmio: Add initial setting of interrupt mask register

Hi Wolfram, Thanks for your feedback. On 2018-06-27 09:27:02 +0200, Wolfram Sang wrote: > > > > > +#define TMIO_MASK_INIT 0x8b7f031d /* H/W initial value */ > > > > > > known on R-Car 2+ only! > > > > No it's also know on Gen3 :-) > > Sure, 2+ means "R-Car 2 and later". Like with GPL

Re: [PATCH] ARM: shmobile: rcar-gen2: Stop compiling headsmp-apmu on !SMP

On Wed, Jun 20, 2018 at 10:56:19AM +0200, Simon Horman wrote: > On Tue, Jun 19, 2018 at 07:20:49PM +0200, Geert Uytterhoeven wrote: > > As of commit cad160ed0a94927e ("ARM: shmobile: Convert file to use > > cntvoff"), there's no non-SMP code left in headsmp-apmu.S. > > > > Hence build the file for

Re: [PATCH] arm64: dts: renesas: r8a77990: Remove non-existing STBE region

On Mon, Jun 25, 2018 at 11:38:28AM +0200, Simon Horman wrote: > On Wed, Jun 20, 2018 at 03:53:23PM +0200, Geert Uytterhoeven wrote: > > R-Car E3 does not have the Stream Buffer for EtherAVB-IF (STBE). > > > > Note that the RAVB driver does not use this region. > > > > Fixes: 913a78b575c313b8 ("ar

Re: [PATCH] [LOCAL/RFC] MAINTAINERS: renesas_defconfig does not exist upstream

On Mon, Jun 25, 2018 at 11:41:55AM +0200, Geert Uytterhoeven wrote: > Hi Simon, > > On Mon, Jun 25, 2018 at 11:34 AM Simon Horman wrote: > > On Wed, Jun 20, 2018 at 11:03:21AM +0200, Simon Horman wrote: > > > On Tue, Jun 19, 2018 at 08:18:35PM +0200, Geert Uytterhoeven wrote: > > > > Make sure pa

RE: [RFC PATCH 1/1] i2c: rcar: handle RXDMA HW bug on Gen3

Hi Wolfram-san, > From: Wolfram Sang, Sent: Wednesday, June 27, 2018 5:44 PM > > Hi, > > thanks for the discussion on this topic! > > > > The hardware team said: > > > - In CPG point of view: > > >- such polling doesn't need (because the reset pulse is generated > > > correctly). > > >

Re: [RFC PATCH 1/1] i2c: rcar: handle RXDMA HW bug on Gen3

> > Doesn't make this writing device drivers a bit harder, I wonder? If we > > follow the above, we need to know per driver (like i2c-rcar.c) if > > reset_control_reset() is enough or if we need to call > > reset_control_status() additionally. For a driver author, it would be > > much less error p

Re: [PATCH] dt-bindings: irqchip: renesas-irqc: Document r8a77470 support

Hi Biju, On 27/06/18 09:43, Biju Das wrote: > Hello Marc, > > Sorry to bother you. Are you happy to merge the below patch with 4.18-rc3? > https://www.spinics.net/lists/linux-renesas-soc/msg25788.html This is odd. I queued that in April as part of a potential second set of fixes for 4.17, but s

Re: [RFC PATCH 1/1] i2c: rcar: handle RXDMA HW bug on Gen3

Hi Wolfram, On Wed, Jun 27, 2018 at 10:44 AM Wolfram Sang wrote: > > > The hardware team said: > > > - In CPG point of view: > > >- such polling doesn't need (because the reset pulse is generated > > > correctly). > > >- About the interval after deassert the reset, this is depend on eac

Re: [RFC PATCH 1/1] i2c: rcar: handle RXDMA HW bug on Gen3

Hi, thanks for the discussion on this topic! > > The hardware team said: > > - In CPG point of view: > >- such polling doesn't need (because the reset pulse is generated > > correctly). > >- About the interval after deassert the reset, this is depend on each > > hardware module. > >

RE: [PATCH] dt-bindings: irqchip: renesas-irqc: Document r8a77470 support

Hello Marc, Sorry to bother you. Are you happy to merge the below patch with 4.18-rc3? https://www.spinics.net/lists/linux-renesas-soc/msg25788.html regards, Biju > -Original Message- > From: geert.uytterhoe...@gmail.com > [mailto:geert.uytterhoe...@gmail.com] On Behalf Of Geert Uytterh

Re: [PATCH] pinctrl: sh-pfc: fix a null pointer dereference of drive strength information

Hi Niklas, On Wed, Jun 27, 2018 at 8:01 AM Niklas Söderlund wrote: > Not all SoCs describes the drive strength registers. When reading the > sysfs pinconf-pins file on such a SoC this results in a null pointer > dereference. Protect against this dereference and allow reading of the > pinconf-pins

Re: [PATCH 1/3] mmc: tmio: Add initial setting of interrupt mask register

> > > +#define TMIO_MASK_INIT 0x8b7f031d /* H/W initial value */ > > > > known on R-Car 2+ only! > > No it's also know on Gen3 :-) Sure, 2+ means "R-Car 2 and later". Like with GPL2+. Sorry if this was not clear. And it is still my main argument to do... > > So, we should at least pro