On Tue, Jul 24, 2018 at 04:47:16PM +0100, Biju Das wrote:
> Add device tree bindings documentation for Renesas RZ/G2M (r8a774a1) SoC.
>
> Signed-off-by: Biju Das
> Reviewed-by: Chris Paterson
> ---
> Documentation/devicetree/bindings/arm/shmobile.txt | 2 ++
> 1 file changed, 2 insertions(+)
R
On Tue, Jul 31, 2018 at 05:41:36AM -0500, Chris Brandt wrote:
> Describe interrupts property in more detail, especially when there are
> more than one interrupt.
>
> Signed-off-by: Chris Brandt
> Reviewed-by: Geert Uytterhoeven
> ---
> .../devicetree/bindings/serial/renesas,sci-serial.txt|
Hi all,
SH-Mobile AG5 and R-Car H1 SoCs are based on the Cortex-A9 MPCore, which
includes an ARM global timer.
Enable use of the global timer on these SoCs for scheduling and delay
loops, with the following impact:
- Scheduler accuracy is increased from 10 ms to a few ns,
- Calls to s
SH-Mobile AG5 and R-Car H1 SoCs are based on the Cortex-A9 MPCore, which
includes a global timer.
Enable the ARM global timer on these SoCs, which will be used for:
- the scheduler clock, improving scheduler accuracy from 10 ms to 3 or
4 ns,
- delay loops, allowing removal of calls to shmo
Add a device node for the global timer, which is part of the Cortex-A9
MPCore.
The global timer can serve as an accurate (3 ns) clock source for
scheduling and delay loops.
Signed-off-by: Geert Uytterhoeven
---
arch/arm/boot/dts/sh73a0.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --g
The "TWD" clock is actually the Cortex-A9 MPCore "PERIPHCLK" clock,
which not only clocks the private timers and watchdogs (TWD), but also
the interrupt controller and global timer.
Hence rename it from "twd" to "periph".
Signed-off-by: Geert Uytterhoeven
---
arch/arm/boot/dts/sh73a0.dtsi | 4 +
Add a device node for the global timer, which is part of the Cortex-A9
MPCore.
The global timer can serve as an accurate (4 ns) clock source for
scheduling and delay loops.
Signed-off-by: Geert Uytterhoeven
---
arch/arm/boot/dts/r8a7779.dtsi | 8
1 file changed, 8 insertions(+)
diff -
Hi Geert,
On Tuesday, 31 July 2018 16:48:48 EEST Geert Uytterhoeven wrote:
> On Wed, Jul 11, 2018 at 11:16 PM Laurent Pinchart wrote:
> > On Thursday, 5 July 2018 13:55:00 EEST Geert Uytterhoeven wrote:
> >> On Thu, Jun 14, 2018 at 1:36 PM Simon Horman wrote:
> >>> This series is comprised of bac
Presumable unused since commit c99cd90d98a98aa1 ("ARM: shmobile:
r8a7779: Remove legacy SoC code").
Signed-off-by: Geert Uytterhoeven
---
arch/arm/mach-shmobile/setup-r8a7779.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c
b/arch/arm/mach-shmobile/s
Hi Simon,
On Wed, Jul 25, 2018 at 5:23 PM Simon Horman wrote:
> ** This series is for informational purposes only! **
>
> This series is comprised of backports to v4.14.57 of the components used by
> Renesas SoCs to their standard as of v4.18-rc6, selected dependencies for
> those backports and s
Hi Laurent,
On Wed, Jul 11, 2018 at 11:16 PM Laurent Pinchart
wrote:
> On Thursday, 5 July 2018 13:55:00 EEST Geert Uytterhoeven wrote:
> > On Thu, Jun 14, 2018 at 1:36 PM Simon Horman wrote:
> > > This series is comprised of backports to v4.14 of the following
> > > components from their standa
I have pushed renesas-drivers-2018-07-31-v4.18-rc7 to
https://git.kernel.org/cgit/linux/kernel/git/geert/renesas-drivers.git
This tree is meant to ease development of platform support and drivers
for Renesas ARM SoCs. It is created by merging (a) the for-next branches
of various subsystem trees an
Describe interrupts property in more detail, especially when there are
more than one interrupt.
Signed-off-by: Chris Brandt
Reviewed-by: Geert Uytterhoeven
---
.../devicetree/bindings/serial/renesas,sci-serial.txt| 16 +++-
1 file changed, 15 insertions(+), 1 deletion(-)
diff -
Some devices with SCIx_SH4_SCIF_REGTYPE have no space between registers.
Use the register area size to determine the spacing between register.
Signed-off-by: Chris Brandt
---
v2:
* adjust for case of SCIx_PROBE_REGTYPE
---
drivers/tty/serial/sh-sci.c | 25 +++--
1 file change
There is no more need for SCIx_RZ_SCIFA_REGTYPE now that
SCIx_SH4_SCIF_REGTYPE can provide the same register/address definitions.
Also, R7S9210 no longer needs a special compatible since the standard
"renesas,scif" will work just fine.
Signed-off-by: Chris Brandt
Reviewed-by: Geert Uytterhoeven
Some SCIF versions mux error and break interrupts together and then provide
a separate interrupt ID for just TEI/DRI.
Allow all 6 types of interrupts to be specified via platform data (or DT)
and for any signals that are muxed together (have the same interrupt
number) simply register one handler.
This patch series doesn't really provide much new functionality, but
rather provides a cleaner solution for adding RZ/A2 support.
This series applies on top of tty-next
v3:
* removed a line of code that wasn't needed
v2:
* Incorporated feedback from Geert
* Added Reviewed-by
Chris Brandt (4):
On Mon, Jul 30, 2018 at 08:49:51PM +0900, Yoshihiro Shimoda wrote:
> This patch adds bindings for R-Car E3. No driver update is needed.
>
> Signed-off-by: Yoshihiro Shimoda
> ---
> Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.txt | 1 +
> 1 file changed, 1 insertion(+)
Reviewed-by: Si
On Mon, Jul 30, 2018 at 08:47:58PM +0900, Yoshihiro Shimoda wrote:
> From: Takeshi Kihara
>
> This patch adds PWM{0,1,2,3,4,5,6} pins, groups and functions to
> the R8A77990 SoC.
>
> Signed-off-by: Takeshi Kihara
> Signed-off-by: Yoshihiro Shimoda
> ---
> drivers/pinctrl/sh-pfc/pfc-r8a77990.c
Hi Geert,
As always, thank you for your review.
On Tuesday, July 31, 2018, Geert Uytterhoeven wrote:
> > @@ -1845,31 +1858,8 @@ static int sci_request_irq(struct sci_port *port)
> >
> > desc = sci_irq_desc + i;
> > port->irqstr[j] = NULL;
>
> The above line can be
On Fri, Jul 27, 2018 at 11:53:31AM -0500, Chris Brandt wrote:
> Introduce RZ/A2 (R7S9210) as an SoC that can be selected.
>
> There is no DT mainlined yet, so this is what the entry would look
> like for the BSID register:
>
> bsid: chipid@fcfe8004 {
> compatible = "renesas,bs
On Sat, Jul 28, 2018 at 03:55:14PM +, Chris Brandt wrote:
> On Saturday, July 28, 2018 1, Greg KH wrote:
> > > > In your opinion, which one would be better (revert or rebase)?
> > >
> > > [looking at the incremental differences]
> > >
> > > I think the easiest for Greg is to rebase, and send 3
Hi Geert,
Thanks for the feedback.
Subject: Re: [PATCH 4/4] ARM: dts: iwg23s-sbc: Add pinctl support for
> > &pfc {
> > + avb_pins: avb {
> > + groups = "avb_mdio", "avb_gmii_tx_rx";
>
> avb_crs is wired, but deemed unused, right?
Yes, CRS is not used in full duplex mode.
Hi Chris,
On Mon, Jul 30, 2018 at 3:17 PM Chris Brandt wrote:
> Some SCIF versions mux error and break interrupts together and then provide
> a separate interrupt ID for just TEI/DRI.
>
> Allow all 6 types of interrupts to be specified via platform data (or DT)
> and for any signals that are muxe
On Tue, Jul 31, 2018 at 08:45:11AM +0200, Geert Uytterhoeven wrote:
> On Mon, Jul 30, 2018 at 8:22 PM Sergei Shtylyov
> wrote:
> > The CAN clock node should precede the "cpus" node in the R8A779{7|8}0
> > device trees, according to the alphanumeric node sorting rule...
> >
> > Signed-off-by: Se
On Thu, Jul 26, 2018 at 09:51:18PM +0300, Sergei Shtylyov wrote:
> The IPMMU nodes should follow the GEther node, not the CAN-FD node,
> according to the part of the startng IPMMU-DS1 node.
> While moving the nodes, also do sort them by label alphanumerically...
>
> Signed-off-by: Sergei Shtylyov
On Tue, Jul 31, 2018 at 04:43:19PM +0900, Yoshihiro Shimoda wrote:
> This patch adds PWM device nodes and enables PWM3 and PWM5 for
> R-Car E3 Ebisu board. These devices are used for backlight control.
>
> Signed-off-by: Yoshihiro Shimoda
> Reviewed-by: Geert Uytterhoeven
> ---
> I have submitt
Hi Wolfram,
On Wed, Jul 25, 2018 at 9:15 PM Wolfram Sang
wrote:
> From: Takeshi Kihara
>
> This patch adds SATA0 pin, group and function to the R8A77965 SoC.
>
> Signed-off-by: Takeshi Kihara
> [wsa: rebased to upstream base]
> Signed-off-by: Wolfram Sang
> --- a/drivers/pinctrl/sh-pfc/pfc-r8
This patch adds PWM device nodes and enables PWM3 and PWM5 for
R-Car E3 Ebisu board. These devices are used for backlight control.
Signed-off-by: Yoshihiro Shimoda
Reviewed-by: Geert Uytterhoeven
---
I have submitted dt-bindings for R-Car E3 (not merged into PWM subsystem yet):
https://patchwo
Hi Geert-san,
> From: Geert Uytterhoeven, Sent: Tuesday, July 31, 2018 3:39 PM
>
> Hi Shimoda-san,
>
> On Tue, Jul 31, 2018 at 8:14 AM Yoshihiro Shimoda
> wrote:
> > > From: Geert Uytterhoeven, Sent: Tuesday, July 31, 2018 12:34 AM
> > > On Mon, Jul 30, 2018 at 1:55 PM Yoshihiro Shimoda
> > >
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