Hi Simon-san,
> From: Simon Horman, Sent: Thursday, July 26, 2018 12:23 AM
>
> https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas-backport.git
> backport/v4.14.57/snapshot-to-v4.18-rc6+fixes-flattened
Our test team found that the kernel image could not probe the gpio-pca953x
The processor manual prescribes to clear reset of LVDS interface in CPG/MSSR
module before display on, and to assert the same reset line at display off
time, to have the module resuming in a known state.
The module is said to be in "standby state" at initialization time, and this
requires,
Hi Marek,
On Mon, Jul 30, 2018 at 1:18 PM Marek Vasut wrote:
> Add DA9063 PMIC node to the I2C bus.
>
> Signed-off-by: Marek Vasut
Thanks for your patch!
Oneline-summary prefix should be "ARM: dts: silk:".
> --- a/arch/arm/boot/dts/r8a7794-silk.dts
> +++ b/arch/arm/boot/dts/r8a7794-silk.dts
Hi Marek,
On Mon, Jul 30, 2018 at 1:17 PM Marek Vasut wrote:
> Add DA9210 DVFS node to the I2C bus and link it to CPU0 for DVFS.
>
> Signed-off-by: Marek Vasut
Thanks for your patch!
Oneline-summary prefix should be "ARM: dts: gose:".
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Hi Geert,
Thanks for the feedback.
> Subject: Re: [PATCH 4/5] clk: renesas: Add r8a774a1 CPG Core Clock
> Definitions
>
> Hi Biju,
>
> On Mon, Jul 30, 2018 at 9:54 AM Biju Das wrote:
> > Add all RZ/G2M Clock Pulse Generator Core Clock Outputs, as listed in
> > Table 8.2b ("List of Clocks
Hi Geert,
Thanks for the feedback.
> Subject: Re: [PATCH 5/5] clk: renesas: cpg-mssr: Add r8a774a1 support
>
> Hi Biju,
>
> On Mon, Jul 30, 2018 at 9:54 AM Biju Das wrote:
> > Add RZ/G2M (R8A774A1) Clock Pulse Generator / Module Standby and
> > Software Reset support.
> >
> > Based on the Table
Hi Biju,
On Mon, Jul 30, 2018 at 9:54 AM Biju Das wrote:
> Add RZ/G2M (R8A774A1) Clock Pulse Generator / Module Standby and Software
> Reset support.
>
> Based on the Table 8.2b of "RZ/G Series, 2nd Generation User's Manual:
> Hardware ((Rev. 0.61, June 12, 2018)".
>
> Signed-off-by: Biju Das
>
On Mon, Jul 30, 2018 at 9:54 AM Biju Das wrote:
> Signed-off-by: Biju Das
> Reviewed-by: Chris Paterson
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal
Hi Biju,
On Mon, Jul 30, 2018 at 9:54 AM Biju Das wrote:
> Add all RZ/G2M Clock Pulse Generator Core Clock Outputs, as listed in
> Table 8.2b ("List of Clocks [RZ/G2M]") of the RZ/G2M Hardware User's
> Manual.
>
> Signed-off-by: Biju Das
> Reviewed-by: Fabrizio Castro
Thanks for your patch!
On Mon, Jul 30, 2018 at 9:54 AM Biju Das wrote:
> Add support for RZ/G2M (R8A774A1) SoC power areas to the R-Car SYSC
> driver.
>
> Signed-off-by: Biju Das
> Reviewed-by: Chris Paterson
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven
On Mon, Jul 30, 2018 at 9:54 AM Biju Das wrote:
> This patch adds power domain indices for RZ/G2M.
>
> Signed-off-by: Biju Das
> Reviewed-by: Chris Paterson
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux
Hi Geert,
> Subject: Re: [PATCH 1/4] gpio: rcar: Enhance gpio-ranges support
> A simple way to work around this is to set ngpios to the highest bit number in
> use + 1. But you still need a mechanism to avoid accessing the unused bits in
> the gap between 16 and 27.
>
I will send V2 with
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