On 11-09-18, 11:12, Biju Das wrote:
> Add the compatible strings for supporting the generic cpufreq driver on
> the Renesas RZ/G1N (R8A7744) SoC.
>
> Signed-off-by: Biju Das
> Reviewed-by: Fabrizio Castro
> ---
> drivers/cpufreq/cpufreq-dt-platdev.c | 1 +
> 1 file changed, 1 insertion(+)
>
>
On Tuesday, September 11, 2018 1, Rob Herring wrote:
> Well before we get to initcalls, the kernel calls the arch specific
> time_init() which (on ARM) calls of_clk_init (for all the reasons
> above) and then timer_probe(). When timer_probe returns, it is
> expected that you have setup a
Hello!
On 09/11/2018 04:36 PM, Simon Horman wrote:
Describe TMUs in the R8A779{7|8}0 device trees.
Based on the original (and large) patches by Vladimir Barinov.
Signed-off-by: Vladimir Barinov
Signed-off-by: Sergei Shtylyov
---
This patch is
On 09/10/2018 05:24 PM, Geert Uytterhoeven wrote:
>> Document the R-Car V3{M|H} (R8A779{7|8}0) SoC in the Renesas TMU bindings;
>> the TMU hardware in those is the Renesas standard 3-channel timer unit.
>>
>> Signed-off-by: Sergei Shtylyov
>
> Thanks for your patch!
>
> Not all channels seem
On Mon, Sep 10, 2018 at 12:20 PM Chris Brandt wrote:
>
> On Monday, September 10, 2018, Rob Herring wrote:
> > > The current OSTM driver uses TIMER_OF_DECLARE and that basically means
> > > it will never work with my new SoC.
> > >
> > > For now, can I change the driver to register a standard
The thermal device is supposed to be always enabled. As the default
value of the status property is "okay", there is no need to make this
explicit in SoC-specific .dtsi files where no override is involved.
Signed-off-by: Geert Uytterhoeven
---
arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 1 -
On Tue, Sep 11, 2018 at 3:36 PM Simon Horman wrote:
> On Mon, Sep 10, 2018 at 03:04:56PM +0300, Sergei Shtylyov wrote:
> > On 09/10/2018 12:23 PM, Simon Horman wrote:
> >
> > >> Describe TMUs in the R8A779{7|8}0 device trees.
> > >>
> > >> Based on the original (and large) patches by Vladimir
I have pushed renesas-drivers-2018-09-11-v4.19-rc3 to
https://git.kernel.org/cgit/linux/kernel/git/geert/renesas-drivers.git
This tree is meant to ease development of platform support and drivers
for Renesas ARM SoCs. It is created by merging (a) the for-next branches
of various subsystem trees
On Tue, Sep 11, 2018 at 03:29:14PM +0200, Ulf Hansson wrote:
> On 11 September 2018 at 15:06, Wolfram Sang wrote:
> > From: Wolfram Sang
> >
> > Fixes: 26eb2607fa28 ("mmc: renesas_sdhi: add eMMC HS400 mode support")
> > Signed-off-by: Wolfram Sang
> > ---
> >
> > So, adding HS400 support broke
On Mon, Sep 10, 2018 at 03:31:18PM +0100, Biju Das wrote:
> Add VIN and CSI-2 nodes to RZ/G2M SoC dtsi.
>
> Signed-off-by: Biju Das
> Reviewed-by: Fabrizio Castro
Thanks, I would value a review of this entire series before I apply this
patch.
On Mon, Sep 10, 2018 at 04:36:14PM +0200, Geert Uytterhoeven wrote:
> On Mon, Sep 10, 2018 at 1:54 PM Fabrizio Castro
> wrote:
> > Add support for identifying the RZ/G2E (r8a774c0) SoC.
> >
> > Signed-off-by: Fabrizio Castro
> > Reviewed-by: Biju Das
>
> Reviewed-by: Geert Uytterhoeven
On Mon, Sep 10, 2018 at 04:34:45PM +0200, Geert Uytterhoeven wrote:
> On Mon, Sep 10, 2018 at 1:54 PM Fabrizio Castro
> wrote:
> > Add configuration option for the RZ/G2E (R8A774C0) SoC.
> >
> > Signed-off-by: Fabrizio Castro
> > Reviewed-by: Biju Das
>
> Reviewed-by: Geert Uytterhoeven
On Mon, Sep 10, 2018 at 04:34:14PM +0200, Geert Uytterhoeven wrote:
> On Mon, Sep 10, 2018 at 1:54 PM Fabrizio Castro
> wrote:
> > Add device tree bindings documentation for Renesas RZ/G2E (r8a774c0)
> > SoC.
> >
> > Signed-off-by: Fabrizio Castro
> > Reviewed-by: Biju Das
>
> Reviewed-by:
On Mon, Sep 10, 2018 at 04:11:48PM +0200, Geert Uytterhoeven wrote:
> On Fri, Sep 7, 2018 at 5:06 AM Kuninori Morimoto
> wrote:
> > From: Kuninori Morimoto
> >
> > This patch updates license to use SPDX-License-Identifier
> > instead of verbose license text.
> >
> > Signed-off-by: Kuninori
On Mon, Sep 10, 2018 at 03:12:36PM +0200, Geert Uytterhoeven wrote:
> On Fri, Sep 7, 2018 at 5:00 AM Kuninori Morimoto
> wrote:
> > From: Kuninori Morimoto
> >
> > This patch updates license to use SPDX-License-Identifier
> > instead of verbose license text.
> >
> > Signed-off-by: Kuninori
On Fri, Sep 07, 2018 at 02:13:29AM +, Kuninori Morimoto wrote:
>
> From: Kuninori Morimoto
>
> This patch updates license to use SPDX-License-Identifier
> instead of verbose license text.
>
> Signed-off-by: Kuninori Morimoto
Reviewed-by: Simon Horman
On Mon, Sep 10, 2018 at 03:04:56PM +0300, Sergei Shtylyov wrote:
> Hello!
>
> On 09/10/2018 12:23 PM, Simon Horman wrote:
>
> >> Describe TMUs in the R8A779{7|8}0 device trees.
> >>
> >> Based on the original (and large) patches by Vladimir Barinov.
> >>
> >> Signed-off-by: Vladimir Barinov
>
On Mon, Sep 10, 2018 at 11:43:15AM +0100, Fabrizio Castro wrote:
> From: Chris Paterson
>
> Add the device nodes for both RZ/G2M CAN channels.
>
> Signed-off-by: Chris Paterson
> Reviewed-by: Biju Das
> ---
>
> v1->v2:
> * replaced "renesas,rzg-gen2-can" with "renesas,rcar-gen3-can" as per
>
On 11 September 2018 at 15:06, Wolfram Sang wrote:
> From: Wolfram Sang
>
> Fixes: 26eb2607fa28 ("mmc: renesas_sdhi: add eMMC HS400 mode support")
> Signed-off-by: Wolfram Sang
> ---
>
> So, adding HS400 support broke the detection here. I suggest we discuss
> internally, if this kind of white
On Fri, Sep 07, 2018 at 02:11:17AM +, Kuninori Morimoto wrote:
>
> From: Kuninori Morimoto
>
> This patch updates license to use SPDX-License-Identifier
> instead of verbose license text.
>
> Signed-off-by: Kuninori Morimoto
Reviewed-by: Simon Horman
From: Wolfram Sang
Fixes: 26eb2607fa28 ("mmc: renesas_sdhi: add eMMC HS400 mode support")
Signed-off-by: Wolfram Sang
---
So, adding HS400 support broke the detection here. I suggest we discuss
internally, if this kind of white listing is still needed, at all. Until
then, this patch makes
Hi Linus,
On Sun, Jul 29, 2018 at 11:33 PM Linus Walleij wrote:
> On Wed, Jul 25, 2018 at 10:20 PM Wolfram Sang wrote:
> > > That all being said, I think this patch is still useful as is.
> >
> > Linus, do you have time to comment on this?
>
> This looks like a good solution to me.
>
Hi Rafael,
Thanks for the feedback.
> -Original Message-
> From: Rafael J. Wysocki
> Sent: 11 September 2018 11:59
> To: Biju Das
> Cc: Rafael J. Wysocki ; Viresh Kumar
> ; Linux PM ; Simon
> Horman ; Geert Uytterhoeven
> ; Chris Paterson
> ; Fabrizio Castro
> ; Linux-Renesas
On Tue, Sep 11, 2018 at 12:20 PM Biju Das wrote:
>
> Add the compatible strings for supporting the generic cpufreq driver on
> the Renesas RZ/G1N (R8A7744) SoC.
>
> Signed-off-by: Biju Das
> Reviewed-by: Fabrizio Castro
> ---
> drivers/cpufreq/cpufreq-dt-platdev.c | 1 +
> 1 file changed, 1
This patch series aims to add support for RZ/G1N (R8A7744) PFC driver.
RZ/G1N SoC is similar to RZ/G1M and R-Car Gen2 M2-W/M2-N SoC.
This patchset is based on renesas-devel-20180906-v4.19-rc2.
Biju Das (2):
dt-bindings: pinctrl: sh-pfc: Document r8a7744 PFC support
pinctrl: sh-pfc: r8a7791:
Renesas RZ/G1N (R8A7744) is pin compatible with R-Car M2-W/N (R8A7791/3)
and RZ/G1M.
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
---
drivers/pinctrl/sh-pfc/Kconfig | 5 +
drivers/pinctrl/sh-pfc/Makefile | 1 +
drivers/pinctrl/sh-pfc/core.c| 6 ++
On Fri, Sep 7, 2018 at 4:13 AM Kuninori Morimoto
wrote:
> From: Kuninori Morimoto
>
> This patch updates license to use SPDX-License-Identifier
> instead of verbose license text.
>
> Signed-off-by: Kuninori Morimoto
Reviewed-by: Geert Uytterhoeven
i.e. will queue in sh-pfc-for-v4.20.
Add the compatible strings for supporting the generic cpufreq driver on
the Renesas RZ/G1N (R8A7744) SoC.
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
---
drivers/cpufreq/cpufreq-dt-platdev.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/cpufreq/cpufreq-dt-platdev.c
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
---
drivers/soc/renesas/rcar-rst.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/soc/renesas/rcar-rst.c b/drivers/soc/renesas/rcar-rst.c
index a447873..1e11776 100644
--- a/drivers/soc/renesas/rcar-rst.c
+++
Add minimal support for the RZ/G1N (R8A7744) SoC.
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
---
arch/arm/mach-shmobile/Kconfig | 5 +
arch/arm/mach-shmobile/setup-rcar-gen2.c | 2 ++
2 files changed, 7 insertions(+)
diff --git a/arch/arm/mach-shmobile/Kconfig
Add power domain indices for RZ/G1N (R8A7744) SoC.
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
---
include/dt-bindings/power/r8a7744-sysc.h | 24
1 file changed, 24 insertions(+)
create mode 100644 include/dt-bindings/power/r8a7744-sysc.h
diff --git
Add support for RZ/G1N (R8A7744) SoC power areas to the R-Car SYSC driver.
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
---
drivers/soc/renesas/Kconfig | 2 +-
drivers/soc/renesas/rcar-sysc.c | 2 ++
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git
Document bindings for the RZ/G1N (R8A7744) reset module.
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
---
Documentation/devicetree/bindings/reset/renesas,rst.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/reset/renesas,rst.txt
Add binding documentation for the RZ/G1N (R8A7744) Clock Pulse
Generator driver.
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
---
Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt | 11 ++-
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git
Add RZ/G1N (R8A7744) Clock Pulse Generator / Module Standby and Software
Reset support.
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
---
drivers/clk/renesas/Kconfig| 2 +-
drivers/clk/renesas/r8a7743-cpg-mssr.c | 13 -
drivers/clk/renesas/renesas-cpg-mssr.c |
Add all RZ/G1N Clock Pulse Generator Core Clock Outputs, as listed in
Table 7.2b ("List of Clocks [RZ/G1M/N]") of the RZ/G1 Hardware User's
Manual.
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
---
include/dt-bindings/clock/r8a7744-cpg-mssr.h | 39
1 file
Add binding documentation for the RZ/G1N (R8A7744) SYSC block.
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
---
Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt | 1 +
1 file changed, 1 insertion(+)
diff --git
This patch series aims to add support for Renesas RZ/G1N (r8a7744) SoC.
RZ/G1N SoC is similar to RZ/G1M and R-Car Gen2 M2-W/M2-N SoC.
This patch set is based on renesas-devel-20180906-v4.19-rc2.
Biju Das (10):
dt-bindings: power: rcar-sysc: Document r8a7744 SYSC binding
dt-bindings: power:
Hi again,
I actually noticed I'm handling VIN4 and VIN5 un-consistently
here...
On Tue, Sep 11, 2018 at 09:44:48AM +0200, jacopo mondi wrote:
> Hi Simon,
>thanks for looking into this patch
>
> On Mon, Sep 10, 2018 at 03:01:15PM +0200, Simon Horman wrote:
> > On Wed, Sep 05, 2018 at
Hi Geert,
On Tue, Sep 11, 2018 at 10:15:23AM +0200, Geert Uytterhoeven wrote:
> Hi Jacopo,
>
> On Tue, Sep 11, 2018 at 9:44 AM jacopo mondi wrote:
> > On Mon, Sep 10, 2018 at 03:01:15PM +0200, Simon Horman wrote:
> > > On Wed, Sep 05, 2018 at 05:29:42PM +0200, Jacopo Mondi wrote:
> > > > This
Hi Vinod
> > > From: Kuninori Morimoto
> > >
> > > This patch updates license to use SPDX-License-Identifier
> > > instead of verbose license text.
> >
> > Thanks but the style is not consistent in files :(
> >
> > Can we use one only?
>
> Please read
>
Hi Vinod,
On Tue, Sep 11, 2018 at 9:48 AM Vinod wrote:
> On 07-09-18, 01:58, Kuninori Morimoto wrote:
> > From: Kuninori Morimoto
> >
> > This patch updates license to use SPDX-License-Identifier
> > instead of verbose license text.
>
> Thanks but the style is not consistent in files :(
>
> Can
Hi Jacopo,
On Tue, Sep 11, 2018 at 9:44 AM jacopo mondi wrote:
> On Mon, Sep 10, 2018 at 03:01:15PM +0200, Simon Horman wrote:
> > On Wed, Sep 05, 2018 at 05:29:42PM +0200, Jacopo Mondi wrote:
> > > This patch adds VIN{4,5} pins, groups and functions to the R8A77990 SoC.
> Currently there are
On 07-09-18, 01:58, Kuninori Morimoto wrote:
>
> From: Kuninori Morimoto
>
> This patch updates license to use SPDX-License-Identifier
> instead of verbose license text.
Thanks but the style is not consistent in files :(
Can we use one only?
> diff --git a/drivers/dma/sh/shdma-arm.h
Hi Simon,
thanks for looking into this patch
On Mon, Sep 10, 2018 at 03:01:15PM +0200, Simon Horman wrote:
> On Wed, Sep 05, 2018 at 05:29:42PM +0200, Jacopo Mondi wrote:
> > This patch adds VIN{4,5} pins, groups and functions to the R8A77990 SoC.
> >
> > Signed-off-by: Jacopo Mondi
> > ---
>
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