From: Magnus Damm
Bump up the maximum numbers of micro-TLBS to 48.
Each IPMMU device instance get micro-TLB assignment via
the "iommus" property in DT. Older SoCs tend to use a
maximum number of 32 micro-TLBs per IPMMU instance however
newer SoCs such as r8a7796 make use of up to 48
From: Magnus Damm
Update the IPMMU DT binding documentation to include the r8a7796 compat
string for R-Car M3-W.
Signed-off-by: Magnus Damm
Acked-by: Laurent Pinchart
Acked-by: Rob Herring
Acked-by: Simon Horman
Acked-by: Geert Uytterhoeven
---
Changes since V3:
- None
Changes since
From: Magnus Damm
Support the r8a7796 IPMMU by sharing feature flags between
r8a7795 and r8a7796. Also update IOMMU_OF_DECLARE to hook
up the updated compat string.
Signed-off-by: Magnus Damm
Reviewed-by: Geert Uytterhoeven
---
Changes since V3:
- Added Reviewed-by from Geert - thanks
upstream merge and includes the following tags:
Signed-off-by: Magnus Damm
Acked-by: Laurent Pinchart
Acked-by: Rob Herring
Acked-by: Simon Horman
Acked-by: Geert Uytterhoeven
Patch 2/3 and 3/3 are quite trivial but have no acked-by so far.
Signed-off-by: Magnus Damm
---
Developed on top of
From: Magnus Damm
Introduce a feature to allow opt-out of setting up
IMBUSCR. The default case is unchanged.
Signed-off-by: Magnus Damm
---
Changes since V3:
- None
Changes since V2:
- None
Changes since V1:
- Updated the commit message
- Reworked patch to coexist with the multi
From: Magnus Damm
Tie in r8a7795 features and update the IOMMU_OF_DECLARE
compat string to include the updated compat string.
Signed-off-by: Magnus Damm
---
Changes since V3:
- Rebased code on top of
[PATCH 00/04] iommu/ipmmu-vmsa: 32-bit ARM update
This includes support for
From: Magnus Damm
The r8a7795 IPMMU supports 40-bit bus mastering. Both
the coherent DMA mask and the streaming DMA mask are
set to unlock the 40-bit address space for coherent
allocations and streaming operations.
Signed-off-by: Magnus Damm
---
Changes since V3:
- None
Changes since V2
From: Magnus Damm
Hook up IOMMU_OF_DECLARE() support in case CONFIG_IOMMU_DMA
is enabled. The only current supported case for 32-bit ARM
is disabled, however for 64-bit ARM usage of OF is required.
Signed-off-by: Magnus Damm
---
Changes since V3:
- Reworked to fit on top of
[PATCH 00/04
From: Magnus Damm
Write IMCTR both in the root device and the leaf node.
To allow access of IMCTR introduce the following function:
- ipmmu_ctx_write_all()
While at it also rename context functions:
- ipmmu_ctx_read() -> ipmmu_ctx_read_root()
- ipmmu_ctx_write() -> ipmmu_ctx_writ
From: Magnus Damm
Introduce support for two bit SL0 bitfield in IMTTBCR
by using a separate feature flag.
Signed-off-by: Magnus Damm
---
Changes since V3:
- None
Changes since V2:
- None
Changes since V1:
- None
drivers/iommu/ipmmu-vmsa.c | 14 +-
1 file changed, 13
From: Magnus Damm
Add root device handling to the IPMMU driver by allowing certain
DT compat strings to enable has_cache_leaf_nodes that in turn will
support both root devices with interrupts and leaf devices that
face the actual IPMMU consumer devices.
Signed-off-by: Magnus Damm
---
Changes
From: Magnus Damm
Add support for up to 8 contexts. Each context is mapped to one
domain. One domain is assigned one or more slave devices. Contexts
are allocated dynamically and slave devices are grouped together
based on which IPMMU device they are connected to. This makes slave
devices tied
From: Magnus Damm
Introduce struct ipmmu_features to track various hardware
and software implementation changes inside the driver for
different kinds of IPMMU hardware. Add use_ns_alias_offset
as a first example of a feature to control if the secure
register bank offset should be used or not
kes use of iommu_device_* functions
- Patch 5/9 sets the mask to 40 bits instead of 64 bits
- Patch 9/9 implements white list handling via ->xlate() and fixes a bug
Signed-off-by: Magnus Damm
---
Developed on top of next-20170614 with the following series applied
[PATCH 00/04] iommu/ipmmu-vmsa: 3
Hi Geert,
On Fri, Jun 16, 2017 at 4:18 PM, Geert Uytterhoeven
wrote:
> Hi Magnus,
>
> On Thu, Jun 15, 2017 at 12:29 PM, Magnus Damm wrote:
>> Now when both 32-bit and 64-bit code inside the driver is using
>> fwspec it is possible to replace the utlb handling with f
-by: Magnus Damm
---
drivers/iommu/ipmmu-vmsa.c | 21 +++--
1 file changed, 3 insertions(+), 18 deletions(-)
--- 0010/drivers/iommu/ipmmu-vmsa.c
+++ work/drivers/iommu/ipmmu-vmsa.c 2017-06-15 17:29:00.290607110 +0900
@@ -73,22 +73,9 @@ static struct ipmmu_vmsa_domain *to_vmsa
From: Magnus Damm
Now when both 32-bit and 64-bit code inside the driver is using
fwspec it is possible to replace the utlb handling with fwspec ids
that get populated from ->of_xlate().
Suggested-by: Robin Murphy
Signed-off-by: Magnus Damm
---
drivers/iommu/ipmmu-vmsa.c |
From: Magnus Damm
The 32-bit ARM code gets updated to make use of ->of_xlate() and the
code is shared between 64-bit and 32-bit ARM. The of_device_is_available()
check gets dropped since it is included in of_iommu_xlate().
Suggested-by: Robin Murphy
Signed-off-by: Magnus Damm
---
driv
From: Magnus Damm
Extend the driver to make use of iommu_device_register()/unregister()
functions together with iommu_device_set_ops() and iommu_set_fwnode().
These used to be part of the earlier posted 64-bit ARM (r8a7795) series but
it turns out that these days they are required on 32-bit ARM
h 3)
Signed-off-by: Magnus Damm
---
Developed on renesas-drivers-2017-06-13-v4.12-rc5 and rebased to next-20170614
drivers/iommu/ipmmu-vmsa.c | 186 +++-
1 file changed, 49 insertions(+), 137 deletions(-)
Hi Geert and Simon,
On Fri, Jun 9, 2017 at 4:40 PM, Geert Uytterhoeven wrote:
> Hi Simon,
>
> On Thu, Jun 8, 2017 at 3:09 PM, Simon Horman
> wrote:
>> Gen3 SoCs are now supported by the internal dmac variant of the SDHI driver.
>> Remove them from the sys dmac variant where only PIO mode is sup
Hi Robin,
On Wed, May 17, 2017 at 11:29 PM, Robin Murphy wrote:
> Hi Magnus,
>
> On 17/05/17 11:07, Magnus Damm wrote:
>> From: Magnus Damm
>>
>> Convert from archdata to iommu_priv via iommu_fwspec on ARM64 but
>> let 32-bit ARM keep on using archdata for no
From: Magnus Damm
Neither the ARM page table code enabled by IOMMU_IO_PGTABLE_LPAE
nor the IPMMU_VMSA driver actually depends on ARM_LPAE, so get
rid of the dependency.
Tested with ipmmu-vmsa on r8a7794 ALT and a kernel config using:
# CONFIG_ARM_LPAE is not set
Signed-off-by: Magnus Damm
From: Magnus Damm
Fix comma-instead-of-semicolon typo error present
in the latest version of the IPMMU driver.
Signed-off-by: Magnus Damm
---
Earlier posted as:
[PATCH] iommu/ipmmu-vmsa: Fix pgsize_bitmap semicolon typo
drivers/iommu/ipmmu-vmsa.c |2 +-
1 file changed, 1 insertion
From: Magnus Damm
Convert from archdata to iommu_priv via iommu_fwspec on ARM64 but
let 32-bit ARM keep on using archdata for now.
Once the 32-bit ARM code and the IPMMU driver is able to move over
to CONFIG_IOMMU_DMA=y then coverting to fwspec via ->of_xlate() will
be easy.
For now fwspec
From: Magnus Damm
Break out the domain allocation code into a separate function.
This is preparation for future code sharing.
Signed-off-by: Magnus Damm
Reviewed-by: Joerg Roedel
Reviewed-by: Geert Uytterhoeven
---
Changes since V7:
- Added Reviewed-by from Geert - Thanks!
drivers
From: Magnus Damm
Introduce an alternative set of iommu_ops suitable for 64-bit ARM
as well as 32-bit ARM when CONFIG_IOMMU_DMA=y. Also adjust the
Kconfig to depend on ARM or IOMMU_DMA. Initialize the device
from ->xlate() when CONFIG_IOMMU_DMA=y.
Signed-off-by: Magnus Damm
---
Changes si
ial series
- Updated bitmap code locking and also used lighter bitop functions
- Updated the Kconfig bits to apply on top of ARCH_RENESAS
Signed-off-by: Magnus Damm
---
Developed on top of a95cfad (v4.12-rc1 + fixes):
Compile tested on 32-bit and 64-bit ARM
Run time tested on 64-bit ARM r8a7
From: Magnus Damm
Introduce a bitmap for context handing and convert the
interrupt routine to handle all registered contexts.
At this point the number of contexts are still limited.
Also remove the use of the ARM specific mapping variable
from ipmmu_irq() to allow compile on ARM64.
Signed-off
From: Magnus Damm
The IPMMU driver is using DT these days, and platform data is no longer
used by the driver. Remove unused code.
Signed-off-by: Magnus Damm
Reviewed-by: Laurent Pinchart
Reviewed-by: Joerg Roedel
Reviewed-by: Geert Uytterhoeven
---
Changes since V7:
- Added Reviewed-by
From: Magnus Damm
Break out the utlb parsing code and dev_data allocation into a
separate function. This is preparation for future code sharing.
Signed-off-by: Magnus Damm
Reviewed-by: Joerg Roedel
---
Changes since V7:
- Free archdata and utlbs in case of error
drivers/iommu/ipmmu
Hi Geert, everyone,
On Fri, May 5, 2017 at 10:23 PM, Geert Uytterhoeven
wrote:
> Hi Sricharan, Robin,
>
> On Wed, May 3, 2017 at 12:24 PM, Sricharan R wrote:
>> On 5/3/2017 3:24 PM, Robin Murphy wrote:
>>> On 02/05/17 19:35, Geert Uytterhoeven wrote:
On Fri, Feb 3, 2017 at 4:48 PM, Srichara
From: Magnus Damm
r8a7792 Blanche has depending on dip switch and jumper settings
either HSCIF0 or CAN0 exposed on the on-board CN5 connector.
This patch adds HSCIF0 to the Blanche dts as serial2.
Signed-off-by: Magnus Damm
---
Currently the r8a7792 PFC is lacking support for HSCIF devices
From: Magnus Damm
Fix comman-instead-of-semicolon typo error present
in the latest version of the IPMMU driver.
Will in the future be rolled into next driver update.
Signed-off-by: Magnus Damm
---
Applies on top of renesas-drivers-2017-04-18-v4.11-rc7 or -next plus:
[PATCH v7 00/07] iommu
Hi Joerg,
On Mon, Apr 3, 2017 at 8:22 PM, Joerg Roedel wrote:
> On Tue, Mar 28, 2017 at 06:32:33PM +0900, Magnus Damm wrote:
>> The recommended IPMMU driver patch stack consists of the following series:
>> [PATCH v7 00/07] iommu/ipmmu-vmsa: IPMMU multi-arch update V7
>> [
From: Magnus Damm
Point the USB2.0 Host CH0, CH1 and CH2 devices to IPMMU-HC.
This includes 3 channels of both EHCI and OHCI.
Signed-off-by: Magnus Damm
---
arch/arm64/boot/dts/renesas/r8a7795.dtsi |6 ++
1 file changed, 6 insertions(+)
--- 0004/arch/arm64/boot/dts/renesas/r8a7795
From: Magnus Damm
Point the USB3.0 Host CH0 and CH1 devices to IPMMU-HC.
Signed-off-by: Magnus Damm
---
arch/arm64/boot/dts/renesas/r8a7795.dtsi |2 ++
1 file changed, 2 insertions(+)
--- 0002/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ work/arch/arm64/boot/dts/renesas/r8a7795.dtsi
From: Magnus Damm
Point the USB-DMAC0 and USB-DMAC1 devices to IPMMU-HC.
Signed-off-by: Magnus Damm
---
arch/arm64/boot/dts/renesas/r8a7795.dtsi |2 ++
1 file changed, 2 insertions(+)
--- 0001/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ work/arch/arm64/boot/dts/renesas/r8a7795.dtsi
series:
[PATCH v7 00/07] iommu/ipmmu-vmsa: IPMMU multi-arch update V7
[PATCH v3 00/09] iommu/ipmmu-vmsa: r8a7795 support V3
[PATCH v3 0/3] iommu/ipmmu-vmsa: r8a7796 support V3
Untested at this point, needs testing and driver white list enablement.
Signed-off-by: Magnus Damm
---
Developed on
Hi Geert,
On Tue, Mar 21, 2017 at 6:30 PM, Geert Uytterhoeven
wrote:
> Hi Magnus,
>
> On Tue, Mar 21, 2017 at 8:17 AM, Magnus Damm wrote:
>> On Mon, Mar 20, 2017 at 7:57 PM, Geert Uytterhoeven
>> wrote:
>>> On Mon, Mar 20, 2017 at 9:49 AM, Magnus Damm wrote:
>
Hi Geert,
On Mon, Mar 20, 2017 at 7:57 PM, Geert Uytterhoeven
wrote:
> Hi Magnus,
>
> On Mon, Mar 20, 2017 at 9:49 AM, Magnus Damm wrote:
>> From: Magnus Damm
>>
>> Update the r8a7795 SATA device node to use a 2MiB I/O space as specified
>> in the "
From: Magnus Damm
Hook up r8a7795 DMAC nodes to the IPMMUs. In particular Audio-DMAC0
and Audio-DMAC1 get connected to IPMMU-MP1, while SYS-DMAC0 gets tied
to IPMMU-DS0 and SYS-DMAC1 and SYS-DMAC2 get tied to IPMMU-DS1.
Signed-off-by: Magnus Damm
Reviewed-by: Laurent Pinchart
---
Changes
From: Magnus Damm
Update the r8a7795 SATA device node to use a 2MiB I/O space as specified
in the "72. Serial-ATA" section of R-Car-Gen3-rev0.52E.pdf
Signed-off-by: Magnus Damm
---
Developed on top of renesas-devel-20170313-v4.11-rc2
arch/arm64/boot/dts/renesas/r8a7795.dtsi |
From: Magnus Damm
Add r8a7795 IPMMU nodes and keep all disabled by default.
Signed-off-by: Magnus Damm
Reviewed-by: Laurent Pinchart
---
Changes from V2:
- Added Reviewed-by from Laurent - thanks!
Changes from V1:
- None
arch/arm64/boot/dts/renesas/r8a7795.dtsi | 113
-off-by: Magnus Damm
---
Developed on top of renesas-devel-20170313-v4.11-rc2
No special run time or compile time dependencies.
arch/arm64/boot/dts/renesas/r8a7795.dtsi | 173 --
1 file changed, 167 insertions(+), 6 deletions(-)
From: Magnus Damm
Enable the r8a7795 device nodes for IPMMU-VI, IPMMU-VP, IPMMU-MP1,
IPMMU-DS0, IPMMU-DS1 and the shared IPMMU-MM device.
Signed-off-by: Magnus Damm
---
Changes since V2:
- New patch
arch/arm64/boot/dts/renesas/r8a7795.dtsi |6 --
1 file changed, 6 deletions
From: Magnus Damm
Add IPMMU-HC to the SATA device node.
Signed-off-by: Magnus Damm
---
Changes since V2:
- New patch
arch/arm64/boot/dts/renesas/r8a7795.dtsi |1 +
1 file changed, 1 insertion(+)
--- 0014/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ work/arch/arm64/boot/dts/renesas
From: Magnus Damm
Hook up the FCPVD devices to allow use of the VSP and DU
together with IPMMU-VI.
Signed-off-by: Magnus Damm
---
Changes since V2:
- New patch
arch/arm64/boot/dts/renesas/r8a7795.dtsi |4
1 file changed, 4 insertions(+)
--- 0004/arch/arm64/boot/dts/renesas
From: Magnus Damm
Hook up the FCPVI devices to allow use of VSPI with IPMMU-VP.
Signed-off-by: Magnus Damm
---
Changes since V2:
- New patch
arch/arm64/boot/dts/renesas/r8a7795.dtsi |3 +++
1 file changed, 3 insertions(+)
--- 0010/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ work
From: Magnus Damm
Hook up the FCPF devices to allow use of FDP1 with IPMMU-VP.
Signed-off-by: Magnus Damm
---
Changes since V2:
- New patch
arch/arm64/boot/dts/renesas/r8a7795.dtsi |3 +++
1 file changed, 3 insertions(+)
--- 0007/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ work/arch
From: Magnus Damm
Hook up the FCPVB devices to allow use of VSPBC/VSPBD with IPMMU-VP.
Signed-off-by: Magnus Damm
---
Changes since V2:
- New patch
arch/arm64/boot/dts/renesas/r8a7795.dtsi |2 ++
1 file changed, 2 insertions(+)
--- 0008/arch/arm64/boot/dts/renesas/r8a7795.dtsi
From: Magnus Damm
Add IPMMU-DS0 to the Ethernet-AVB device node.
Signed-off-by: Magnus Damm
---
Changes since V2:
- New patch
arch/arm64/boot/dts/renesas/r8a7795.dtsi |1 +
1 file changed, 1 insertion(+)
--- 0012/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ work/arch/arm64/boot/dts
patch
These patches probably need a bit more effort to be beaten into shape
for upstream merge. So simply treat these as experimental test code.
Not-Yet-Signed-off-by: Magnus Damm
---
Developed on top of renesas-drivers-2017-02-21-v4.10
arch/arm64/boot/dts/renesas/r8a7795.dtsi |2
drivers
From: Magnus Damm
Experimental code to enable slow mode on r8a7795 for SCIF2 TX.
Not-Yet-Signed-off-by: Magnus Damm
---
arch/arm64/boot/dts/renesas/r8a7795.dtsi |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- 0001/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ work/arch/arm64
From: Magnus Damm
This experimental slow mode support code simply extends the MID/RID value
to allow encoding a 4-bit value in bit 8-11 to specify the SLM bit value.
With this value set the channel associated with the device will be processed
slower by the hardware. The idea is that the slow
From: Magnus Damm
The priority handling uses MID/RID values to determine if channels
below to RX or TX sides. The case of RX is unchanged and as low channel
number as possible is used to ensure high priority. New with this code
is that TX is allocated with highest channel number first to force
From: Magnus Damm
Update the IPMMU DT binding documentation to include the r8a7796 compat
string for R-Car M3-W.
Signed-off-by: Magnus Damm
Acked-by: Laurent Pinchart
Acked-by: Rob Herring
Acked-by: Simon Horman
Acked-by: Geert Uytterhoeven
---
Changes since V2:
- None
Changes since
Changes since V1:
- Patch 1/3 updated with more Acked-by tags
- Patch 2/3 updated with high I/O register range support
Patch 1/3 is ready for upstream merge and includes the following tags:
Signed-off-by: Magnus Damm
Acked-by: Laurent Pinchart
Acked-by: Rob Herring
Acked-by: Simon Horman
From: Magnus Damm
Support the r8a7796 IPMMU by sharing feature flags between
r8a7795 and r8a7796. Also update IOMMU_OF_DECLARE to hook
up the updated compat string.
Signed-off-by: Magnus Damm
---
Changes since V2:
- Updated to include white list suppport
Changes since V1:
- None
From: Magnus Damm
Bump up the maximum numbers of micro-TLBS to 48.
Each IPMMU device instance get micro-TLB assignment via
the "iommus" property in DT. Older SoCs tend to use a
maximum number of 32 micro-TLBs per IPMMU instance however
newer SoCs such as r8a7796 make use of up to 48
Hi Geert,
On Wed, Mar 8, 2017 at 10:47 PM, Geert Uytterhoeven
wrote:
> Hi Magnus,
>
> On Wed, Mar 8, 2017 at 12:01 PM, Magnus Damm wrote:
>> From: Magnus Damm
>>
>> Add root device handling to the IPMMU driver by allowing certain
>> DT compat strings to enable
Hi Robin,
On Wed, Mar 8, 2017 at 8:53 PM, Robin Murphy wrote:
> Hi Magnus,
>
> On 08/03/17 11:01, Magnus Damm wrote:
>> From: Magnus Damm
>>
>> Introduce struct ipmmu_features to track various hardware
>> and software implementation changes inside the drive
Hi Geert,
On Wed, Mar 8, 2017 at 10:58 PM, Geert Uytterhoeven
wrote:
> Hi Magnus,
>
> On Wed, Mar 8, 2017 at 12:02 PM, Magnus Damm wrote:
>> From: Magnus Damm
>>
>> Tie in r8a7795 features and update the IOMMU_OF_DECLARE
>> compat string to include the
Hi Robin,
Thanks for your feedback!
On Wed, Mar 8, 2017 at 9:21 PM, Robin Murphy wrote:
> On 08/03/17 11:01, Magnus Damm wrote:
>> From: Magnus Damm
>>
>> Add support for up to 8 contexts. Each context is mapped to one
>> domain. One domain is assigned one or m
Hi Robin,
On Wed, Mar 8, 2017 at 9:34 PM, Robin Murphy wrote:
> On 08/03/17 11:02, Magnus Damm wrote:
>> From: Magnus Damm
>>
>> Write IMCTR both in the root device and the leaf node.
>>
>> Signed-off-by: Magnus Damm
>> ---
>>
>> C
Hi Geert,
On Wed, Mar 8, 2017 at 10:52 PM, Geert Uytterhoeven
wrote:
> Hi Magnus,
>
> On Wed, Mar 8, 2017 at 12:02 PM, Magnus Damm wrote:
>> From: Magnus Damm
>>
>> Hook up IOMMU_OF_DECLARE() support in case CONFIG_IOMMU_DMA
>> is enabled. The only current su
Hi Robin,
On Wed, Mar 8, 2017 at 9:48 PM, Robin Murphy wrote:
> On 07/03/17 03:17, Magnus Damm wrote:
>> From: Magnus Damm
>>
>> Not all architectures have an iommu member in their archdata, so
>> use #ifdefs support build with COMPILE_TEST on any architecture.
>
From: Magnus Damm
The r8a7795 IPMMU supports 40-bit bus mastering. Both
the coherent DMA mask and the streaming DMA mask are
set to unlock the 40-bit address space for coherent
allocations and streaming operations.
Signed-off-by: Magnus Damm
---
Changes since V2:
- Updated the code and
From: Magnus Damm
Hook up IOMMU_OF_DECLARE() support in case CONFIG_IOMMU_DMA
is enabled. The only current supported case for 32-bit ARM
is disabled, however for 64-bit ARM usage of OF is required.
Signed-off-by: Magnus Damm
---
Changes since V2:
- Reworked registration code to make use of
From: Magnus Damm
Write IMCTR both in the root device and the leaf node.
Signed-off-by: Magnus Damm
---
Changes since V2:
- None
Changes since V1:
- None
drivers/iommu/ipmmu-vmsa.c | 17 ++---
1 file changed, 14 insertions(+), 3 deletions(-)
--- 0018/drivers/iommu/ipmmu
From: Magnus Damm
Introduce a feature to allow opt-out of setting up
IMBUSCR. The default case is unchanged.
Signed-off-by: Magnus Damm
---
Changes since V2:
- None
Changes since V1:
- Updated the commit message
- Reworked patch to coexist with the multi context feature
drivers/iommu
From: Magnus Damm
Tie in r8a7795 features and update the IOMMU_OF_DECLARE
compat string to include the updated compat string.
TODO:
- Consider making use of iommu_fwspec_add_ids() for uTLB handling
Needed to coexist with non-OF R-Car Gen2 somehow...
- Break out stuff useful for R-Car
From: Magnus Damm
Introduce support for two bit SL0 bitfield in IMTTBCR
by using a separate feature flag.
Signed-off-by: Magnus Damm
---
Changes since V2:
- None
Changes since V1:
- None
drivers/iommu/ipmmu-vmsa.c | 15 ++-
1 file changed, 14 insertions(+), 1 deletion
From: Magnus Damm
Add support for up to 8 contexts. Each context is mapped to one
domain. One domain is assigned one or more slave devices. Contexts
are allocated dynamically and slave devices are grouped together
based on which IPMMU device they are connected to. This makes slave
devices tied
From: Magnus Damm
Introduce struct ipmmu_features to track various hardware
and software implementation changes inside the driver for
different kinds of IPMMU hardware. Add use_ns_alias_offset
as a first example of a feature to control if the secure
register bank offset should be used or not
From: Magnus Damm
Add root device handling to the IPMMU driver by allowing certain
DT compat strings to enable has_cache_leaf_nodes that in turn will
support both root devices with interrupts and leaf devices that
face the actual IPMMU consumer devices.
Signed-off-by: Magnus Damm
---
Changes
multi-arch update V7
Changes since V2:
- Patch 2/9 has been updated with a bug fix and to supply __ipmmu_find_root()
- Patch 4/9 now makes use of iommu_device_* functions
- Patch 5/9 sets the mask to 40 bits instead of 64 bits
- Patch 9/9 implements white list handling via ->xlate() and fixes
ial series
- Updated bitmap code locking and also used lighter bitop functions
- Updated the Kconfig bits to apply on top of ARCH_RENESAS
Signed-off-by: Magnus Damm
---
Built on top v4.11-rc1:
drivers/iommu/Kconfig |2
drivers/iommu/ipmmu-vmsa.c |
From: Magnus Damm
Neither the ARM page table code enabled by IOMMU_IO_PGTABLE_LPAE
nor the IPMMU_VMSA driver actually depends on ARM_LPAE, so get
rid of the dependency.
Tested with ipmmu-vmsa on r8a7794 ALT and a kernel config using:
# CONFIG_ARM_LPAE is not set
Signed-off-by: Magnus Damm
From: Magnus Damm
The IPMMU driver is using DT these days, and platform data is no longer
used by the driver. Remove unused code.
Signed-off-by: Magnus Damm
Reviewed-by: Laurent Pinchart
Reviewed-by: Joerg Roedel
---
Changes since V6:
- None
drivers/iommu/ipmmu-vmsa.c |5 -
1
From: Magnus Damm
Not all architectures have an iommu member in their archdata, so
use #ifdefs support build with COMPILE_TEST on any architecture.
Signed-off-by: Magnus Damm
Reviewed-by: Joerg Roedel
---
Changes since V6:
- Updated patch to handle newly introduced functions in:
[PATCH
From: Magnus Damm
Break out the domain allocation code into a separate function.
This is preparation for future code sharing.
Signed-off-by: Magnus Damm
Reviewed-by: Joerg Roedel
---
Changes since V6:
- None
drivers/iommu/ipmmu-vmsa.c | 13 +
1 file changed, 9 insertions
From: Magnus Damm
Break out the utlb parsing code and dev_data allocation into a
separate function. This is preparation for future code sharing.
Signed-off-by: Magnus Damm
Reviewed-by: Joerg Roedel
---
Changes since V6:
- None
drivers/iommu/ipmmu-vmsa.c | 58
From: Magnus Damm
Introduce a bitmap for context handing and convert the
interrupt routine to handle all registered contexts.
At this point the number of contexts are still limited.
Also remove the use of the ARM specific mapping variable
from ipmmu_irq() to allow compile on ARM64.
Signed-off
From: Magnus Damm
Introduce an alternative set of iommu_ops suitable for 64-bit ARM
as well as 32-bit ARM when CONFIG_IOMMU_DMA=y. Also adjust the
Kconfig to depend on ARM or IOMMU_DMA. Initialize the device
from ->xlate() when CONFIG_IOMMU_DMA=y.
Signed-off-by: Magnus Damm
---
Changes si
On Fri, Jan 27, 2017 at 3:14 PM, Magnus Damm wrote:
> iommu/ipmmu-vmsa: IPMMU slave device whitelist V2
>
> [PATCH/RFC v2 1/4] iommu/of: Skip IOMMU devices disabled in DT
> [PATCH/RFC v2 2/4] iommu/ipmmu-vmsa: Get rid of disabled device check
> [PATCH/RFC v2 3/4] iommu/ipmmu-vmsa
Hi Sergei,
Thanks for your efforts with this driver. Nice to see that V2 is
getting in better shape.
In the future, would it be possible for you to include the patch
version number in the [PATCH] tag somehow?
On Fri, Mar 3, 2017 at 9:03 PM, Sergei Shtylyov
wrote:
> On 03/03/2017 02:58 PM, Geert
Hi Geert,
On Sat, Jan 28, 2017 at 1:03 AM, Geert Uytterhoeven
wrote:
> Some IOMMUs (e.g. Renesas IPMMU/VMSA) support only page sizes of 4 KiB,
> 2 MiB, and 1 GiB.
>
> With the default setting of CONFIG_CMA_ALIGNMENT = 8, allocations larger
> than 1 MiB are aligned to a 1 MiB boundary only. Hence
Hi Sergei,
On Wed, Feb 1, 2017 at 8:40 PM, Sergei Shtylyov
wrote:
> On 2/1/2017 2:13 PM, Magnus Damm wrote:
>
>>>> Add the "vsps" property to the DU device node in order to link this node
>>>> to
>>>> the VSPD nodes.
>>>>
>>&g
Hi Sergei,
On Fri, Jan 27, 2017 at 3:42 AM, Sergei Shtylyov
wrote:
> On 01/26/2017 12:42 AM, Sergei Shtylyov wrote:
>
>> Add the "vsps" property to the DU device node in order to link this node
>> to
>> the VSPD nodes.
>>
>> Signed-off-by: Sergei Shtylyov
>>
>> ---
>> Changes in version 2:
>> -
Hi Joerg,
On Fri, Jan 27, 2017 at 8:47 PM, Joerg Roedel wrote:
> On Mon, Jan 23, 2017 at 08:40:29PM +0900, Magnus Damm wrote:
>> From: Magnus Damm
>>
>> Bump up the maximum numbers of micro-TLBS to 48.
>>
>> Each IPMMU device instance get micro-TLB assignment v
From: Magnus Damm
Introduce the flag "no_size_align" to allow disabling size-alignment
on a per-domain basis. This follows the suggestion by the comment
in the code, however a per-device control may be preferred?
Needed to make virtual space contiguous for certain devices.
Sig
From: Magnus Damm
Match on r8a7795 ES2 and enable a certain DMA controller.
In other cases the IPMMU driver remains disabled.
Signed-off-by: Magnus Damm
---
Changes since V1:
- Perform white list check in ->xlate() instead of ->add_device()
drivers/iommu/ipmmu-vmsa.c
From: Magnus Damm
Extend the shared IOMMU code to skip over ->xlate() in case the
IOMMU device pointed to by a slave device has been disabled in DT.
Difficult to trigger in case a single IOMMU device is used, however
when multiple IOMMUs are used and some of them are disabled in DT
then t
From: Magnus Damm
Since of_iommu_configure() now skips over disabled devices
we can simply drop this check in the IPMMU driver.
Signed-off-by: Magnus Damm
---
drivers/iommu/ipmmu-vmsa.c |7 ---
1 file changed, 7 deletions(-)
--- 0001/drivers/iommu/ipmmu-vmsa.c
+++ work/drivers/iommu
From: Magnus Damm
Rework the IPMMU code to validate devices in ->xlate() instead of
accepting all devices in xlate() and instead validating devices
in ->add_device(). This makes it possible for the IPMMU device
driver to reject slave devices based on software policy.
Once a slave dev
the future if agreed on be rolled into the IPMMU driver series.
Signed-off-by: Magnus Damm
---
Developed on top of renesas-drivers-2017-01-24-v4.10-rc5
drivers/iommu/ipmmu-vmsa.c | 59 +++-
drivers/iommu/of_iommu.c |2 -
2 files changed, 33 ins
Hi Geert,
On Thu, Jan 26, 2017 at 6:53 PM, Geert Uytterhoeven
wrote:
> Currently, the IPMMU/VMSA driver supports 32-bit I/O Virtual Addresses
> only, and thus sets io_pgtable_cfg.ias = 32. However, it doesn't force
> a 32-bit IOVA space through the IOMMU Domain Geometry.
>
> Hence if a device (e
Hi Robin, Shimoda-san, everyone,
Thanks for your feedback!
On Thu, Jan 26, 2017 at 1:38 AM, Robin Murphy wrote:
> On 25/01/17 12:54, Yoshihiro Shimoda wrote:
>> From: Magnus Damm
>>
>> To add a workaround code for ipmmu-vmsa driver, this patch adds
>> a new geome
Hi Robin, Shimoda-san, everyone,
On Thu, Jan 26, 2017 at 1:27 AM, Robin Murphy wrote:
> On 25/01/17 12:53, Yoshihiro Shimoda wrote:
>> From: Magnus Damm
>>
>> To track mapped iova for a workaround code in the future.
>>
>> Signed-off-by: Magnus Damm
&g
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