Quoting Geert Uytterhoeven (2018-12-07 04:22:03)
> Hi Mike, Stephen,
>
> The following changes since commit eb38c119dd91c61de26f67050671a84064554f7d:
>
> clk: renesas: r7s9210: Add USB clocks (2018-11-13 09:58:51 +0100)
>
> are available in the Git repository at:
>
>
: Jianguo Sun
Cc: Krzysztof Kozlowski
Cc: Kukjin Kim
Cc: Leo Yan
Cc: Linus Walleij
Cc:
Cc: Sylwester Nawrocki
Cc:
Cc: Wei Yongjun
Cc: Yoshinori Sato
Stephen Boyd (8):
clk: renesas: Remove usage of CLK_IS_BASIC
clk: st: Remove usage of CLK_IS_BASIC
clk: axm5516: Remove usage
Quoting Marek Vasut (2018-12-04 10:27:21)
> diff --git a/drivers/clk/clk-versaclock5.c b/drivers/clk/clk-versaclock5.c
> index decffb3826ec..ac90fb36af1a 100644
> --- a/drivers/clk/clk-versaclock5.c
> +++ b/drivers/clk/clk-versaclock5.c
> @@ -906,6 +906,39 @@ static int vc5_remove(struct
(R-Car D3), except for the DU parts.
> Testing of the DU on R-Car D3 and E3 would be appreciated, as the DU
> driver may have a workaround for the incorrect parent clock rates.
>
> I intend to queue this in clk-renesas-for-v4.21.
>
Ok. For the whole series:
Acked-by: Stephen Boyd
Quoting Geert Uytterhoeven (2018-11-23 00:56:35)
> Hi Mike, Stephen,
>
> The following changes since commit 651022382c7f8da46cb4872a545ee1da6d097d2a:
>
> Linux 4.20-rc1 (2018-11-04 15:37:52 -0800)
>
> are available in the Git repository at:
>
>
Quoting Geert Uytterhoeven (2018-09-28 01:41:39)
> Hi Mike, Stephen,
>
> The following changes since commit b30c862f2a72002c06df23d05c2ca6b49148c4d4:
>
> clk: renesas: r8a77990: Add missing I2C7 clock (2018-08-31 10:33:59 +0200)
>
> are available in the Git repository at:
>
>
Quoting Geert Uytterhoeven (2018-09-25 00:34:05)
> From: Kuninori Morimoto
>
> This patch updates license to use SPDX-License-Identifier
> instead of verbose license text.
>
> Signed-off-by: Kuninori Morimoto
> [rebased against clk-spdx]
> Signed-off-by: Geert Uytterhoeven
> ---
Applied to
Quoting Geert Uytterhoeven (2018-08-31 06:09:58)
> Hi Mike, Stephen,
>
> The following changes since commit 5b394b2ddf0347bef56e50c69a58773c94343ff3:
>
> Linux 4.19-rc1 (2018-08-26 14:11:59 -0700)
>
> are available in the Git repository at:
>
>
669.i2c failed with error -2
>
> Unlike other R-Car Gen3 SoCs, R-Car E3 has more than 7 I2C bus
> interfaces. Add the forgotten module clock for the 8th instance to fix
> this.
>
> Signed-off-by: Geert Uytterhoeven
> ---
Reviewed-by: Stephen Boyd
f-by: Geert Uytterhoeven
> ---
Acked-by: Stephen Boyd
Quoting Geert Uytterhoeven (2018-07-04 02:45:52)
> Hi Mike, Stephen,
>
> The following changes since commit ce397d215ccd07b8ae3f71db689aedb85d56ab40:
>
> Linux 4.18-rc1 (2018-06-17 08:04:49 +0900)
>
> are available in the Git repository at:
>
>
Quoting Geert Uytterhoeven (2018-05-09 09:52:34)
> Hi Mike, Stephen,
>
> The following changes since commit 60cc43fc888428bb2f18f08997432d426a243338:
>
> Linux 4.17-rc1 (2018-04-15 18:24:20 -0700)
>
> are available in the git repository at:
>
>
Quoting Wolfram Sang (2018-04-19 07:05:35)
> We should get drvdata from struct device directly. Going via
> platform_device is an unneeded step back and forth.
>
> Signed-off-by: Wolfram Sang
> ---
Applied to clk-next
Quoting Sylwester Nawrocki (2018-05-15 02:32:12)
> On 04/19/2018 04:05 PM, Wolfram Sang wrote:
> > We should get drvdata from struct device directly. Going via
> > platform_device is an unneeded step back and forth.
> >
> > Signed-off-by: Wolfram Sang
>
>
Quoting Geert Uytterhoeven (2018-03-22 10:09:20)
> Hi Mike, Stephen,
>
> The following changes since commit 7ce36da900c0a2ff4777d9ba51c4f1cb74205463:
>
> clk: renesas: cpg-mssr: Add support for R-Car M3-N (2018-02-26 09:13:29
> +0100)
>
> are available in the git repository at:
>
>
Quoting Arnd Bergmann (2018-02-16 07:27:47)
> When we build this driver with on x86-32, gcc produces a false-positive
> warning:
>
> drivers/clk/renesas/clk-sh73a0.c: In function 'sh73a0_cpg_clocks_init':
> drivers/clk/renesas/clk-sh73a0.c:155:10: error: 'parent_name' may be used
>
Quoting Geert Uytterhoeven (2018-03-16 06:40:14)
> Hi Mike, Stephen,
>
> On arm32/arm64, there is no reason to use the (soon deprecated)
> clk_readl()/clk_writel(), and the generic readl()/writel() should be
> used in instead.
>
> Commit 30ad3cf00e94f4a7 ("clk: renesas: rcar-gen3-cpg:
Quoting Geert Uytterhoeven (2018-03-15 02:27:33)
> Hi Stephen,
>
> On Wed, Mar 14, 2018 at 10:43 PM, Stephen Boyd <sb...@kernel.org> wrote:
>
> > Did you need to use clk_readl() or was it just copy-paste? I hope we can
> > get rid of that function at some poin
Quoting Geert Uytterhoeven (2018-03-02 02:17:52)
> Hi Mike, Stephen,
>
> The following changes since commit 7928b2cbe55b2a410a0f5c1f154610059c57b1b2:
>
> Linux 4.16-rc1 (2018-02-11 15:04:29 -0800)
>
> are available in the git repository at:
>
>
On 01/05, Geert Uytterhoeven wrote:
> Hi Mike, Stephen,
>
> The following changes since commit 7aff266552d6042b43d3d5a9b13f0009ef862033:
>
> clk: renesas: cpg-mssr: Keep wakeup sources active during system suspend
> (2017-12-14 16:40:36 +0100)
>
> are available in the git repository
On 01/02, Bryan O'Donoghue wrote:
> On 02/01/18 19:01, Stephen Boyd wrote:
> >On 12/31, Bryan O'Donoghue wrote:
> >>On 30/12/17 16:36, Mikko Perttunen wrote:
> >>>FWIW, we had this problem some years ago with the Tegra CPU clock
> >>>- then it was dete
On 12/31, Bryan O'Donoghue wrote:
> On 30/12/17 16:36, Mikko Perttunen wrote:
> >FWIW, we had this problem some years ago with the Tegra CPU clock
> >- then it was determined that a simpler solution was to have the
> >determine_rate callback support unsigned long rates - so clock
> >drivers that
On 12/15, Geert Uytterhoeven wrote:
> Hi Mike, Stephen,
>
> The following changes since commit 4fbd8d194f06c8a3fd2af1ce560ddb31f7ec8323:
>
> Linux 4.15-rc1 (2017-11-26 16:01:47 -0800)
>
> are available in the git repository at:
>
>
On 10/20, Geert Uytterhoeven wrote:
> Hi Mike, Stephen,
>
> The following changes since commit b4021bbe10017d994e5a96ebfd2677bbaf2b37e0:
>
> clk: renesas: rcar-gen2: Delete error message for failed memory allocation
> (2017-09-28 17:57:34 +0200)
>
> are available in the git repository
On 10/04, Geert Uytterhoeven wrote:
> Hi Mike, Stephen,
>
> The following changes since commit 2bd6bf03f4c1c59381d62c61d03f6cc3fe71f66e:
>
> Linux 4.14-rc1 (2017-09-16 15:47:51 -0700)
>
> are available in the git repository at:
>
>
On 10/04, Geert Uytterhoeven wrote:
> Signed-off-by: Geert Uytterhoeven <geert+rene...@glider.be>
> ---
Acked-by: Stephen Boyd <sb...@codeaurora.org>
I take it this will come through some PR?
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Founda
On 04/20, Yoshihiro Kaneko wrote:
> From: Gaku Inami
>
> This patch adds the common function to reset the clk rate in order to
> be able to use it in other cases.
>
> Signed-off-by: Gaku Inami
> Signed-off-by: Hiroyuki Yokoyama
chael Turquette <mturque...@baylibre.com>
> Cc: Stephen Boyd <sb...@codeaurora.org>
> Cc: Maxime Coquelin <mcoquelin.st...@gmail.com>
> Cc: Alexandre Torgue <alexandre.tor...@st.com>
> Cc: Russell King <li...@armlinux.org.uk>
> Cc: Matthias Brugger <matthia
storing them in u8s instead of unsigned ints,
> which saves ca. 0.5 KiB for a generic kernel.
>
> Signed-off-by: Geert Uytterhoeven <geert+rene...@glider.be>
> ---
Acked-by: Stephen Boyd <sb...@codeaurora.org>
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora For
his.
> To avoid increasing the size of struct cpg_core_clk, both parents and
> dividers are stored in the existing parent resp. div fields.
>
> Signed-off-by: Geert Uytterhoeven <geert+rene...@glider.be>
> ---
Acked-by: Stephen Boyd <sb...@codeaurora.org>
--
Qualcomm I
.55, Jun. 30, 2017.
>
> Signed-off-by: Geert Uytterhoeven <geert+rene...@glider.be>
> Cc: devicet...@vger.kernel.org
> ---
Acked-by: Stephen Boyd <sb...@codeaurora.org>
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
ocks (S0, S1, S2, S3, S1C, S3C, SDSRC, and
> SSPSRC) are not included, as they are used as internal clock sources
> only, and never referenced from DT.
>
> Signed-off-by: Geert Uytterhoeven <geert+rene...@glider.be>
> Cc: devicet...@vger.kernel.org
> ---
Acked-by:
On 04/20, Yoshihiro Kaneko wrote:
> From: Gaku Inami
>
> This patch adds the common function to reset the clk rate in order to
> be able to use it in other cases.
>
> Signed-off-by: Gaku Inami
> Signed-off-by: Hiroyuki Yokoyama
On 04/20, Yoshihiro Kaneko wrote:
> From: Takeshi Kihara
>
> This patch fixed the SD divider settiing for corresponding to the change
> in the HS200/HS400 mode.
>
> Signed-off-by: Takeshi Kihara
> Signed-off-by: Yoshihiro Kaneko
On 07/17, Geert Uytterhoeven wrote:
> Hi Wolfram,
>
> On Mon, Jul 17, 2017 at 11:18 AM, Wolfram Sang wrote:
> >> >> In .recalc_rate of struct clk_ops, it is desirable to return 0 if an
> >> >> error occurs, but -EINVAL is returned. This patch fixes it.
> >> >>
> >> >> Fixes:
clock output at OUT0_SELB_I2C).
>
> Signed-off-by: Marek Vasut <marek.vasut+rene...@gmail.com>
> Cc: Alexey Firago <alexey_fir...@mentor.com>
> Cc: Stephen Boyd <sb...@codeaurora.org>
> Cc: Michael Turquette <mturque...@baylibre.com>
> Cc: Laurent Pinchart <l
alid setting
> and warn about it, which is not necessarily the case.
>
> In case the output buffer input mux is disabled, default to input
> from FOD to have some parent and don't print the warning.
>
> Signed-off-by: Marek Vasut <marek.vasut+rene...@gmail.com>
> Cc: Stephen B
gt;
> Signed-off-by: Marek Vasut <marek.vasut+rene...@gmail.com>
> Cc: Stephen Boyd <sb...@codeaurora.org>
> Cc: Alexey Firago <alexey_fir...@mentor.com>
> Cc: Michael Turquette <mturque...@baylibre.com>
> Cc: Laurent Pinchart <laurent.pinch...@ideasonboard
On 07/09, Marek Vasut wrote:
> Fix trivial typo in vc5_clk_out_unprepare() , s/Enable/Disable/ .
>
> Signed-off-by: Marek Vasut <marek.vasut+rene...@gmail.com>
> Cc: Stephen Boyd <sb...@codeaurora.org>
> Cc: Alexey Firago <alexey_fir...@mentor.com>
> Cc: Michae
On 06/28, Yoshihiro Shimoda wrote:
> +
> +
> + platform_set_drvdata(pdev, priv);
> + dev_set_drvdata(dev, priv);
> +
> + init.name = "rcar_usb2_clock_sel";
> + init.ops = _clock_sel_clock_ops;
> + init.flags = CLK_IS_BASIC;
Please drop CLK_IS_BASIC unless you need it.
> +
On 06/29, Marek Vasut wrote:
> @@ -549,6 +552,7 @@ static unsigned char vc5_clk_out_get_parent(struct clk_hw
> *hw)
>
> dev_warn(>client->dev,
>"Invalid clock output configuration (%02x)\n", src);
> +
> return 0;
> }
>
Please drop this hunk as it isn't relevant
On 06/09, Geert Uytterhoeven wrote:
> If CONFIG_OF=n:
>
> drivers/clk/renesas/renesas-cpg-mssr.c: In function ‘cpg_mssr_probe’:
> drivers/clk/renesas/renesas-cpg-mssr.c:702: warning: dereferencing ‘void
> *’ pointer
> drivers/clk/renesas/renesas-cpg-mssr.c:702: error: request for
he build.
>
> Signed-off-by: Geert Uytterhoeven <geert+rene...@glider.be>
> ---
Acked-by: Stephen Boyd <sb...@codeaurora.org>
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
On 04/23, Geert Uytterhoeven wrote:
> Hi Stephen,
>
> On Sat, Apr 22, 2017 at 4:10 AM, Stephen Boyd <sb...@codeaurora.org> wrote:
> > On 04/20, Yoshihiro Kaneko wrote:
> >> From: Gaku Inami <gaku.inami...@bp.renesas.com>
> >>
> >> In the res
On 04/20, Yoshihiro Kaneko wrote:
> From: Gaku Inami
>
> In the resume process, there is the case that other drivers call
> cs2000_enable before cs2000_resume is called. Since the order of
> resume process is not guaranteed, it is needed to reset the clk
> rate in
On 04/21, Geert Uytterhoeven wrote:
>
> > --- a/drivers/clk/renesas/rcar-gen3-cpg.c
> > +++ b/drivers/clk/renesas/rcar-gen3-cpg.c
>
> > +static unsigned long cpg_z_clk_recalc_rate(struct clk_hw *hw,
> > + unsigned long parent_rate)
> > +{
> > +
On 04/18, Kuninori Morimoto wrote:
>
> Hi Stephen
>
> These are missing settings for current cs2000.
> it is working without these settings, thus, not urgent.
> But, necessary for correct/safety operation.
Thanks. Applied all to clk-next.
>
> Kuninori Morimoto (3):
> clk: cs2000: enable
On 04/11, Kuninori Morimoto wrote:
> From: Kuninori Morimoto
>
> Signed-off-by: Kuninori Morimoto
> ---
Applied to clk-next
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation
On 04/05, Kuninori Morimoto wrote:
>
> From: Kuninori Morimoto
>
> Thus CS2000 datasheet is indicating below, this patch
> follows it.
>
> WARNING: All "Reserved" registers must maintain their default
> state to ensure proper functional operation.
>
On 04/05, Geert Uytterhoeven wrote:
> Hi Stephen,
>
> On Wed, Apr 5, 2017 at 9:56 PM, Stephen Boyd <sb...@codeaurora.org> wrote:
> > On 03/31, Geert Uytterhoeven wrote:
> >> The following changes since commit
> >> cecbe87d73006cb321dec79b349e3fefd1a80962:
&
On 03/31, Geert Uytterhoeven wrote:
> Hi Mike, Stephen,
>
> The following changes since commit cecbe87d73006cb321dec79b349e3fefd1a80962:
>
> clk: renesas: rcar-gen3: Add workaround for PLL0/2/4 errata on H3 ES1.0
> (2017-03-21 11:12:23 +0100)
>
> are available in the git repository at:
On 04/05, Kuninori Morimoto wrote:
>
> From: Kuninori Morimoto
>
> Thus CS2000 datasheet is indicating below, this patch
> follows it.
>
> WARNING: All "Reserved" registers must maintain their default
> state to ensure proper functional operation.
>
.
>
This changes the names in the clk framework too though? If you're
ok with that I'm ok too.
Acked-by: Stephen Boyd <sb...@codeaurora.org>
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
On 01/27, Geert Uytterhoeven wrote:
> Hi Mike, Stephen,
>
> The following changes since commit e6bdf28eff475a026b922abe78ae710e7179bdf7:
>
> clk: renesas: r8a7796: Add MSIOF controller clocks (2016-12-27 10:56:08
> +0100)
>
> are available in the git repository at:
>
>
he function header to fix this.
>
> Signed-off-by: Geert Uytterhoeven <geert+rene...@glider.be>
> ---
I'm not sure it's really necessary, but ok.
Acked-by: Stephen Boyd <sb...@codeaurora.org>
--
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a Linux Foundation Collaborative Project
PI.
>
> Signed-off-by: Geert Uytterhoeven <geert+rene...@glider.be>
> ---
Acked-by: Stephen Boyd <sb...@codeaurora.org>
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
On 01/20, Geert Uytterhoeven wrote:
> The spinlock is used to protect Read-Modify-Write register accesses,
> which won't be limited to SMSTPCR register accesses.
>
> Signed-off-by: Geert Uytterhoeven <geert+rene...@glider.be>
> ---
Acked-by: Stephen Boyd <sb...@codea
; Signed-off-by: Geert Uytterhoeven <geert+rene...@glider.be>
> ---
Acked-by: Stephen Boyd <sb...@codeaurora.org>
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
On 01/20, Geert Uytterhoeven wrote:
> Document properties needed to use the Reset Control feature of the
> Renesas Clock Pulse Generator / Module Standby and Software Reset
> module.
>
> Signed-off-by: Geert Uytterhoeven
Subject should be "dt-bindings: clock:" ?
--
On 01/10, Kuninori Morimoto wrote:
> From: Khiem Nguyen
>
> CS2000 needs re-setup when redume, otherwise, it can't
> handle correct clock rate.
>
> Signed-off-by: Khiem Nguyen
> [Kuninori: cleanup original patch]
>
m the mux
> feeding the PLL.
>
> The driver thus far supports only the 5P49V5923 and 5P49V5933, while
> it should be easily extensible to the whole 5P49V59xx family of chips
> as they are all pretty similar.
>
> Signed-off-by: Marek Vasut <marek.va...@gmail.com>
> Cc: Micha
On 01/13, Geert Uytterhoeven wrote:
> Hi Mike, Stephen,
>
> The following changes since commit 7ce7d89f48834cefece7804d38fc5d85382edf77:
>
> Linux 4.10-rc1 (2016-12-25 16:13:08 -0800)
>
> are available in the git repository at:
>
>
ck driver and enable CLK_IS_CRITICAL. This will make sure the module
> clock is never disabled.
>
> This is a hard dependency for describing the INTC-SYS clock in DT on
> R-Mobile APE6 and R-Car Gen2.
>
> Signed-off-by: Geert Uytterhoeven <geert+rene...@glider.be>
> ---
A
On 01/17, Geert Uytterhoeven wrote:
> Hi Mike, Stephen,
>
> This patch series adds support for the CLK_IS_CRITICAL flag to drivers
> for module clocks on Renesas ARM SoCs. For now, this is used to prevent
> disabling of the ARM GIC module clock, which would lead to a system
> lock-up when
; Hence migrate the Renesas CPG/MSSR driver from CLK_ENABLE_HAND_OFF to
> CLK_IS_CRITICAL.
>
> Signed-off-by: Geert Uytterhoeven <geert+rene...@glider.be>
> ---
Acked-by: Stephen Boyd <sb...@codeaurora.org>
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
On 01/10, Marek Vasut wrote:
> On 01/10/2017 01:23 AM, Stephen Boyd wrote:
> > On 01/05, Marek Vasut wrote:
> >> On 01/05/2017 03:13 PM, Laurent Pinchart wrote:
> >>> Hi Marek,
> >>
> >> Hi!
> >>
> >> [...]
> >
On 01/05, Marek Vasut wrote:
> On 01/05/2017 03:13 PM, Laurent Pinchart wrote:
> > Hi Marek,
>
> Hi!
>
> [...]
>
> > +static unsigned long vc5_mux_recalc_rate(struct clk_hw *hw,
> > +unsigned long parent_rate)
> > +{
> > + struct
On 12/21, Chris Brandt wrote:
> On December 21, 2016, Geert Uytterhoeven wrote:
> > >> Mike/Stephen: as this is a fix for stable (v3.16+), can you please
> > >> take it directly?
> > >
> > > Sure, is it a fix for something that has been exposed as a problem in
> > > this merge window? Just trying
On 12/15, Chris Brandt wrote:
> The RZ/A1 is different than the other Renesas SOCs because the MSTP
> registers are 8-bit instead of 32-bit and if you try writing values as
> 32-bit nothing happens...meaning this driver never worked for r7s72100.
>
> Fixes: b6face404f38 ("ARM: shmobile: r7s72100:
On 12/19, Geert Uytterhoeven wrote:
> Hi Chris, Mike, Stephen,
>
> On Thu, Dec 15, 2016 at 6:00 PM, Chris Brandt
> wrote:
> > The RZ/A1 is different than the other Renesas SOCs because the MSTP
> > registers are 8-bit instead of 32-bit and if you try writing values as
On 11/07, Geert Uytterhoeven wrote:
> Hi Mike, Stephen,
>
> The following changes since commit dbdcc4f996df280eb2758095b4774ea62da8a2a7:
>
> clk: renesas: r8a7796: Add DU and LVDS clocks (2016-11-02 20:40:08 +0100)
>
> are available in the git repository at:
>
>
On 11/14, Geert Uytterhoeven wrote:
> Hi Stephen,
>
> On Fri, Nov 11, 2016 at 12:35 AM, Stephen Boyd <sb...@codeaurora.org> wrote:
> > On 11/07, Geert Uytterhoeven wrote:
> >> clk: renesas: Updates for v4.10 (take one)
> >>
> >> - SYS-DMAC, (H)SC
On 11/07, Geert Uytterhoeven wrote:
> clk: renesas: Updates for v4.10 (take one)
>
> - SYS-DMAC, (H)SCIF, I2C, DRIF, and graphics related clocks for R-Car
> M3-W,
> - Minor fixes and cleanups.
>
> Thanks for pulling!
>
>
On 11/02, Geert Uytterhoeven wrote:
> On Tue, Nov 1, 2016 at 12:25 AM, Stephen Boyd <sb...@codeaurora.org> wrote:
> >
> > Would the pull requests for clk also have dts changes at the base
> > of the tree? Perhaps clk side can just ack the clk patches and
>
&g
On 10/04, Geert Uytterhoeven wrote:
> The intention was to enable the checks if debugging is enabled, not
> disabled.
>
> Signed-off-by: Geert Uytterhoeven
> ---
Applied to clk-next
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux
On 10/13, Ramesh Shanmugasundaram wrote:
> This patch adds DRIF module clocks for r8a7796 SoC.
>
> Signed-off-by: Ramesh Shanmugasundaram
> <ramesh.shanmugasunda...@bp.renesas.com>
> ---
Doesn't apply to clk-next so I assume Geert will pick it up?
Acked-by: Stephen Boyd
On 10/31, Geert Uytterhoeven wrote:
> Hi Mike, Stephen, Arnd, Olof, Kevin,
>
> Is the merge strategy [see # below] OK for you?
> Thanks a lot!
>
> On Mon, Oct 31, 2016 at 9:19 AM, Simon Horman wrote:
> > On Wed, Oct 26, 2016 at 02:00:24PM +0200, Geert Uytterhoeven wrote:
+++-
> 2 files changed, 11 insertions(+), 12 deletions(-)
>
Acked-by: Stephen Boyd <sb...@codeaurora.org>
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Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
On 09/14, Geert Uytterhoeven wrote:
> Hi Mike, Stephen,
>
> The following changes since commit 074969813350cda4c624a585489cc1b3550414bc:
>
> clk: renesas: r8a7796: Add SDIF clocks (2016-08-23 10:30:41 +0200)
>
> are available in the git repository at:
>
>
On 08/31, Geert Uytterhoeven wrote:
> Add a section for Renesas clock drivers, as found on Renesas ARM SoCs,
> and list myself as the maintainer.
>
> Signed-off-by: Geert Uytterhoeven
> ---
Applied to clk-next
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Qualcomm Innovation Center, Inc. is a member of Code
On 08/30, Geert Uytterhoeven wrote:
> Hi Mike, Stephen,
>
> The following changes since commit b51d5275016c6edbf4656eaee30d836fef127016:
>
> clk: renesas: r8a7796: Add watchdog module clock (2016-08-09 09:53:47 +0200)
>
> are available in the git repository at:
>
>
On 08/17, Geert Uytterhoeven wrote:
> Hi Mike, Stephen,
>
> The following changes since commit 29b4817d4018df78086157ea3a55c1d9424a7cfc:
>
> Linux 4.8-rc1 (2016-08-07 18:18:00 -0700)
>
> are available in the git repository at:
>
>
On 08/10, Geert Uytterhoeven wrote:
> From: Yoshihiro Shimoda
>
> According to the datasheet, SDn clocks are from the SDSRC clock. And
> the SDSRC has a 1/2 divider. So, we should have ".sdsrc" as an internal
> core clock. Otherwise, since the sdhi driver will
On 06/29, Geert Uytterhoeven wrote:
>
> Thanks, but it seems something went wrong: commit d9cce3a8ebb871c5 is not a
> merge commit, but the combination of all 7 commits from the pull request?
Hmm... weird. I fixed it now.
>
> > unless you really need it. Just use readl/writel directly. I
> >
On 06/23, Geert Uytterhoeven wrote:
> Hi Mike, Stephen,
>
> The following changes since commit e4e2d7c388350eba8b1dbc2569441ac9b545a8c4:
>
> clk: renesas: cpg-mssr: Add support for R-Car M3-W (2016-06-06 11:58:35
> +0200)
>
> are available in the git repository at:
>
>
On 06/28, Geert Uytterhoeven wrote:
> It is not; there's just a second pull request with more commits on top.
>
> I think you best pull this one first, as git will use the summary from the
> signed tag. The signed tag of the second pull request only summarizes
> the additions, compared to the
On 06/21, Geert Uytterhoeven wrote:
> Hi Stephen,
>
> On Tue, Jun 21, 2016 at 2:51 AM, Stephen Boyd <sb...@codeaurora.org> wrote:
> > On 06/06, Geert Uytterhoeven wrote:
> >> Hi Mike, Stephen,
> >>
> >> The following changes since commi
On 06/06, Geert Uytterhoeven wrote:
> Hi Mike, Stephen,
>
> The following changes since commit 1a695a905c18548062509178b98bc91e67510864:
>
> Linux 4.7-rc1 (2016-05-29 09:29:24 -0700)
>
> are available in the git repository at:
>
>
On 05/02, Geert Uytterhoeven wrote:
> From: Geert Uytterhoeven
>
> Hi Mike, Stephen,
>
> The following changes since commit 2066390ad47b374f3d35075a32325b47d15bf735:
>
> clk: renesas: cpg-mssr: Export cpg_mssr_{at,de}tach_dev() (2016-04-20
> 09:17:07 +0200)
>
On 04/20, Geert Uytterhoeven wrote:
> From: Geert Uytterhoeven
>
> Hi Mike, Stephen,
>
> The following changes since commit 12a56817b329d8a73ab53bad09aa976aeea46db9:
>
> clk: renesas: mstp: Clarify cpg_mstp_{at,de}tach_dev() domain parameter
> (2016-04-07
On 04/14, Masahiro Yamada wrote:
>
> OK, now I notice another problem in my code;
> if foo_clk_init() fails for reason [2],
> clk_disable() WARN's due to zero enable_count.
>
> if (WARN_ON(core->enable_count == 0))
> return;
>
>
>
> Perhaps, I got screwed up by splitting clock init
On 04/05, Masahiro Yamada wrote:
> The clk_disable() in the common clock framework (drivers/clk/clk.c)
> returns immediately if a given clk is NULL or an error pointer. It
> allows clock consumers to call clk_disable() without IS_ERR_OR_NULL
> checking if drivers are only used with the common
On 03/08, Simon Horman wrote:
> Name the #define guarding compilation of this header
> __RENESAS_CLK_DIV6_H__ rather than __SHMOBILE_CLK_DIV6_H__.
>
> This is a follow-up to renaming the directory in which this file lives from
> shmobile to renesas which is in turn part of an ongoing process to
On 03/08, Simon Horman wrote:
> This is part of an ongoing process to migrate from ARCH_SHMOBILE to
> ARCH_RENESAS the motivation for which being that RENESAS seems to be a more
> appropriate name than SHMOBILE for the majority of Renesas ARM based SoCs.
>
> Along with the above mentioned Kconfig
On 03/03, Geert Uytterhoeven wrote:
> On Thu, Mar 3, 2016 at 3:18 AM, Simon Horman
> wrote:
> > This is part of an ongoing process to migrate from ARCH_SHMOBILE to
> > ARCH_RENESAS the motivation for which being that RENESAS seems to be a more
> > appropriate name
On 02/23, Simon Horman wrote:
> On Tue, Feb 23, 2016 at 09:19:27AM +0100, Geert Uytterhoeven wrote:
> > CC The New Mike ;-)
> >
> > On Tue, Feb 23, 2016 at 1:57 AM, Simon Horman
> > wrote:
> > > As of 9b5ba0df4ea4 ("ARM: shmobile: Introduce ARCH_RENESAS") all
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