On Wed, May 23, 2018 at 11:02:04AM +0200, Geert Uytterhoeven wrote:
> According to section 59.2.4 MSIOF Receive Mode Register 1 (SIRMDR1) in
> the R-Car Gen3 datasheet Rev.1.00, the value of the SIRMDR1.SYNCAC bit
> must match the value of the SITMDR1.SYNCAC bit. However,
> sh_msiof_spi_setup()
According to section 59.2.4 MSIOF Receive Mode Register 1 (SIRMDR1) in
the R-Car Gen3 datasheet Rev.1.00, the value of the SIRMDR1.SYNCAC bit
must match the value of the SITMDR1.SYNCAC bit. However,
sh_msiof_spi_setup() changes only the latter.
Fix this by updating the SIRMDR1 register like the
