Re: [PATCH 01/14] pinctrl: sh-pfc: r8a7796: Fix MOD_SEL1 bit[25:24] to 0x3 when using STP_ISEN_1_D

2017-07-13 Thread Geert Uytterhoeven
On Wed, Jul 12, 2017 at 6:55 PM, Yoshihiro Kaneko wrote: > From: Takeshi Kihara > > This patch fixes the implementation incorrect of MOD_SEL1 bit[25:24] > value when STP_ISEN_1_D pin function is selected for IPSR17 bit[27:24]. > > This is a correction to the incorrect implementation of MOD_SEL re

[PATCH 01/14] pinctrl: sh-pfc: r8a7796: Fix MOD_SEL1 bit[25:24] to 0x3 when using STP_ISEN_1_D

2017-07-12 Thread Yoshihiro Kaneko
From: Takeshi Kihara This patch fixes the implementation incorrect of MOD_SEL1 bit[25:24] value when STP_ISEN_1_D pin function is selected for IPSR17 bit[27:24]. This is a correction to the incorrect implementation of MOD_SEL register pin assignment for R8A7796 SoC specification of R-Car Gen3 Ha