Hi Kaneko-san, Kihara-san,
On Sun, Jul 23, 2017 at 6:32 PM, Yoshihiro Kaneko wrote:
> I'm very sorry that for the long delay in my reply.
No problem. Likewise, I've been on holidays.
> 2017-07-13 18:12 GMT+09:00 Geert Uytterhoeven :
>> On Wed, Jul 12, 2017 at 6:55 PM, Yoshihiro Kaneko
>> wrot
Hi Geert-san,
I'm very sorry that for the long delay in my reply.
2017-07-13 18:12 GMT+09:00 Geert Uytterhoeven :
> Hi Kaneko-san, Kihara-san,
>
> On Wed, Jul 12, 2017 at 6:55 PM, Yoshihiro Kaneko
> wrote:
>> From: Takeshi Kihara
>>
>> This patch fixes MOD_SEL1 bit20 and MOD_SEL2 bit20, bit21
Hi Kaneko-san, Kihara-san,
On Wed, Jul 12, 2017 at 6:55 PM, Yoshihiro Kaneko wrote:
> From: Takeshi Kihara
>
> This patch fixes MOD_SEL1 bit20 and MOD_SEL2 bit20, bit21 pin assignment
> for SSI pins group.
>
> This is a correction to the incorrect implementation of MOD_SEL register
> pin assignm
From: Takeshi Kihara
This patch fixes MOD_SEL1 bit20 and MOD_SEL2 bit20, bit21 pin assignment
for SSI pins group.
This is a correction to the incorrect implementation of MOD_SEL register
pin assignment for R8A7796 SoC specification of R-Car Gen3 Hardware
User's Manual Rev.0.51E or later.
Fixes:
