Re: [PATCH 08/14] pinctrl: sh-pfc: r8a7796: Fix MSIOF3_{SS1,SS2}_E pins function definitions

2017-07-13 Thread Geert Uytterhoeven
On Wed, Jul 12, 2017 at 6:55 PM, Yoshihiro Kaneko wrote: > From: Takeshi Kihara > > This patch fixes the implementation incorrect of IPSR register value > definitions for MSIOF3_{SS1,SS2}_E pins function. > > This is a correction to the incorrect implementation of IPSR register > pin assignment f

[PATCH 08/14] pinctrl: sh-pfc: r8a7796: Fix MSIOF3_{SS1,SS2}_E pins function definitions

2017-07-12 Thread Yoshihiro Kaneko
From: Takeshi Kihara This patch fixes the implementation incorrect of IPSR register value definitions for MSIOF3_{SS1,SS2}_E pins function. This is a correction to the incorrect implementation of IPSR register pin assignment for R8A7796 SoC specification of R-Car Gen3 Hardware User's Manual Rev.