On 12/21, Chris Brandt wrote:
> On December 21, 2016, Geert Uytterhoeven wrote:
> > >> Mike/Stephen: as this is a fix for stable (v3.16+), can you please
> > >> take it directly?
> > >
> > > Sure, is it a fix for something that has been exposed as a problem in
> > > this merge window? Just trying t
On 12/15, Chris Brandt wrote:
> The RZ/A1 is different than the other Renesas SOCs because the MSTP
> registers are 8-bit instead of 32-bit and if you try writing values as
> 32-bit nothing happens...meaning this driver never worked for r7s72100.
>
> Fixes: b6face404f38 ("ARM: shmobile: r7s72100:
On December 21, 2016, Geert Uytterhoeven wrote:
> >> Mike/Stephen: as this is a fix for stable (v3.16+), can you please
> >> take it directly?
> >
> > Sure, is it a fix for something that has been exposed as a problem in
> > this merge window? Just trying to gauge the urgency of merging this.
>
>
Hi Stephen,
On Tue, Dec 20, 2016 at 11:55 PM, Stephen Boyd wrote:
> On 12/19, Geert Uytterhoeven wrote:
>> On Thu, Dec 15, 2016 at 6:00 PM, Chris Brandt
>> wrote:
>> > The RZ/A1 is different than the other Renesas SOCs because the MSTP
>> > registers are 8-bit instead of 32-bit and if you try w
On 12/19, Geert Uytterhoeven wrote:
> Hi Chris, Mike, Stephen,
>
> On Thu, Dec 15, 2016 at 6:00 PM, Chris Brandt
> wrote:
> > The RZ/A1 is different than the other Renesas SOCs because the MSTP
> > registers are 8-bit instead of 32-bit and if you try writing values as
> > 32-bit nothing happens.
Hi Chris, Mike, Stephen,
On Thu, Dec 15, 2016 at 6:00 PM, Chris Brandt wrote:
> The RZ/A1 is different than the other Renesas SOCs because the MSTP
> registers are 8-bit instead of 32-bit and if you try writing values as
> 32-bit nothing happens...meaning this driver never worked for r7s72100.
T
Hi Chris
> The RZ/A1 is different than the other Renesas SOCs because the MSTP
> registers are 8-bit instead of 32-bit and if you try writing values as
> 32-bit nothing happens...meaning this driver never worked for r7s72100.
>
> Fixes: b6face404f38 ("ARM: shmobile: r7s72100: add essential clock
The RZ/A1 is different than the other Renesas SOCs because the MSTP
registers are 8-bit instead of 32-bit and if you try writing values as
32-bit nothing happens...meaning this driver never worked for r7s72100.
Fixes: b6face404f38 ("ARM: shmobile: r7s72100: add essential clock nodes to
dtsi")
Sig
