Hi Simon, Magnus,
This patch series adds the second Cortex-A57 CPU core, the Cortex-A57
PMU, and the Cortex-A53 L2 cache-controller, CPU, and PMU nodes on the
Renesas R-Car M3-W SoC to its DTS file.
Note that these patches add hardware description; actual enabling of the
CPU depends on th
On Tue, Mar 07, 2017 at 07:03:21PM +0100, Geert Uytterhoeven wrote:
> Hi Simon, Magnus,
>
> This patch series adds the second Cortex-A57 CPU core, the Cortex-A57
> PMU, and the Cortex-A53 L2 cache-controller, CPU, and PMU nodes on the
> Renesas R-Car M3-W SoC to its DTS file.
>
> Note that
