[PATCH v4 1/3] clk: renesas: r7s9210: Add SDHI clocks

[Chris Brandt]

Add SDHI clocks for RZ/A2

Signed-off-by: Chris Brandt <chris.bra...@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+rene...@glider.be>
---
 drivers/clk/renesas/r7s9210-cpg-mssr.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/clk/renesas/r7s9210-cpg-mssr.c 
b/drivers/clk/renesas/r7s9210-cpg-mssr.c
index 5135f13ec628..9056da15dc72 100644
--- a/drivers/clk/renesas/r7s9210-cpg-mssr.c
+++ b/drivers/clk/renesas/r7s9210-cpg-mssr.c
@@ -98,6 +98,11 @@ static const struct mssr_mod_clk r7s9210_mod_clks[] 
__initconst = {
        DEF_MOD_STB("spi2",      95,    R7S9210_CLK_P1),
        DEF_MOD_STB("spi1",      96,    R7S9210_CLK_P1),
        DEF_MOD_STB("spi0",      97,    R7S9210_CLK_P1),
+
+       DEF_MOD_STB("sdhi11",   100,    R7S9210_CLK_B),
+       DEF_MOD_STB("sdhi10",   101,    R7S9210_CLK_B),
+       DEF_MOD_STB("sdhi01",   102,    R7S9210_CLK_B),
+       DEF_MOD_STB("sdhi00",   103,    R7S9210_CLK_B),
 };
 
 /* The clock dividers in the table vary based on DT and register settings */
-- 
2.16.1