From: MyungJoo Ham
Two issues are addressed for max8998_set_voltage function.
1. Min/Max Voltage.
max8998_set_voltage had been using the voltage value of
min ( voltage[i] >= max_vol , i )
This is corrected to use:
min ( voltage[i] >= min_vol , i )
2. Ramp Up
On Tue, Jul 20, 2010 at 10:04 AM, Kukjin Kim wrote:
> MyungJoo Ham wrote:
>>
>> This patches add support for powerdomain, block-gating, and flags in
> struct clk.
>>
>> Blockgating re-uses powerdomain support scheme and depends on powerdomain
>> support.
>>
>> Flags support is independent from pow
MyungJoo Ham wrote:
>
> This patches add support for powerdomain, block-gating, and flags in
struct clk.
>
> Blockgating re-uses powerdomain support scheme and depends on powerdomain
> support.
>
> Flags support is independent from powerdomain; however, powerdomain
support
> is NOT stable withou
MyungJoo Ham wrote:
>
> S5PV210 CPUFREQ Support.
>
> This CPUFREQ may work without PMIC's DVS support. However, it is not
> as effective without DVS support as supposed. AVS is not supported in
> this version.
>
> Note that CLK_SRC of some clocks including ARMCLK, G3D, G2D, MFC,
> and ONEDRAM ar
Hello,
This patch series adds 2 simple changes to enable the driver on S5PV210
SoCs and a simple compile error fix. This is a continuation of 'S3C
HSOTG fixes' series posted by Ben Dooks. The first one should be applied
to 2.6.35. The latter can be also considered as a bug fixes because it
is not
S5PV210 SoCs has 2 USB PHY interfaces, both enabled by writing zero to
S3C_PHYPWR register. HS/OTG driver uses only PHY0, so do not touch bits
related to PHY1.
Signed-off-by: Marek Szyprowski
Signed-off-by: Kyungmin Park
---
drivers/usb/gadget/s3c-hsotg.c |6 --
1 files changed, 4 inser
This patch adds support for clock gating of the HS/OTG block. On S5PV210
otg gating clock is initally disabled so the driver needs to get and
enable it before it can access its registers.
Signed-off-by: Marek Szyprowski
Signed-off-by: Kyungmin Park
---
drivers/usb/gadget/s3c-hsotg.c | 20
drivers/usb/gadget/s3c-hsotg.c: In function ‘s3c_hsotg_otgreset’:
drivers/usb/gadget/s3c-hsotg.c:2816: error: ‘MHZ’ undeclared (first use in this
function)
drivers/usb/gadget/s3c-hsotg.c:2816: error: (Each undeclared identifier is
reported only once
drivers/usb/gadget/s3c-hsotg.c:2816: error: for
Op 19-07-10 10:30, MyungJoo Ham schreef:
> Add a .flag property to the struct clk. The flag can have the following
> information:
>
> The clock is enabled at the boot time.
> The clock cannot be disabled.
> The clock is enabled at the boot time and cannot be disabled.
> The
If there is more data in the request than we could fit into a single
hardware request, then check when the OutDone event is received if
we have more data, and if so, schedule the new data instead of trying
to complete the request (and in the case of EP0, sending a 0 packet
in the middle of a transf
The EP0 out limit is the same as the IN limit, so make them the same.
Signed-off-by: Ben Dooks
---
drivers/usb/gadget/s3c-hsotg.c |3 +--
1 files changed, 1 insertions(+), 2 deletions(-)
diff --git a/drivers/usb/gadget/s3c-hsotg.c b/drivers/usb/gadget/s3c-hsotg.c
index 1020006..552ec89 1006
Add support for the dedicated FIFO mode on newer SoCs such as the S5PV210
partly to improve support and to fix the bug where any non-EP0 IN endpoint
requires its own FIFO allocation.
To fix this, we ensure that any non-zero IN endpoint is given a TXFIFO
using the same allocation method as the peri
Limit the IN FIFO write to a single packet per attempt at writing,
as per the specifications and ensure that we don't return fifo-full
so that we can continue writing packets if we have the space.
Signed-off-by: Ben Dooks
---
drivers/usb/gadget/s3c-hsotg.c | 11 +++
1 files changed, 11
Repost of the series as requested by Greg. Fixes a number of problems
with the hsotg block on Samsung devices, including FIFO reset issues,
data sizes, dealing with core compilation options, et al.
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the body of a mes
Fix a problem where we have been underestimating the space available in
the IN PTX/NPTX FIFOs by assuming that they where simply word aligned
instead of in number-of-words. This means all length calculations need
to be multiplied-by-4.
Note, we do not change the information about fifo size or star
Up the FIFO size for the TX to 1024 entries, as this now seems to work
with all the cores. This fixes a problem when using large packets on
a core with MPS set to 512 can hang due to insufficient space for the
writes.
The hang arises due to getting the non-periodic FIFO empty IRQ but
not being abl
The maximum length for any EP0 IN request on EP0 is 127 bytes, not 128
as the driver currently has it.
Signed-off-by: Ben Dooks
---
drivers/usb/gadget/s3c-hsotg.c |3 +--
1 files changed, 1 insertions(+), 2 deletions(-)
diff --git a/drivers/usb/gadget/s3c-hsotg.c b/drivers/usb/gadget/s3c-hs
Before trying a new setup transaction after getting an EP0 in complete
interrupt, check that the driver did not try and send more EP0 IN data
before enqueing a new setup transaction.
This fixes a bug where we cannot send all of the IN data in one go
so split the transfer, but then fail to send all
From: Maurus Cuelenaere
The PLL that drives the USB clock supports 3 input clocks: 12, 24 and 48Mhz.
This patch adds support to the USB driver for setting the correct register bit
according to the given clock.
This depends on the following patch:
[PATCH] ARM: S3C64XX: Add USB external clock defi
In shared fifo mode (used on older SoCs) the periodic in fifo beahves
much more like a packet buffer, discarding old data when writing new
data. Avoid this by ensuring that we do not load new transactions in
when there is data sitting already in the FIFO.
Note, this may not be an observed bug, we
The USB documentation suggest that the FIFOs should be reset when a
bus reset event happens. Use the s3c_hsotg_init_fifo() to ensure that
the FIFO layout is correct and that the FIFOs are flushed before
acknowledging the reset.
Signed-off-by: Ben Dooks
---
drivers/usb/gadget/s3c-hsotg.c | 13 +
On Mon, Jul 19, 2010 at 05:30:34PM +0900, MyungJoo Ham wrote:
> +static int powerdomain_set(struct powerdomain *pd, int enable)
> +{
> + unsigned long ctrlbit;
> + void __iomem *reg;
> + void __iomem *stable_reg;
> + unsigned long reg_dat;
> +
> + if (pd == NULL)
> +
On Mon, Jul 19, 2010 at 05:30:35PM +0900, MyungJoo Ham wrote:
> +#ifdef CONFIG_SAMSUNG_POWERDOMAIN
> + if ((clk->flags | CLKFLAGS_BOOT_ON) &&
This is always true if CLKFLAGS_BOOT_ON is non-zero.
> + !(clk->flags | CLKFLAGS_CANNOT_DISABLE)) {
This is always
On Mon, Jul 19, 2010 at 02:31:23PM +0900, MyungJoo Ham wrote:
> S5PV210 CPUFREQ Support.
>
> This CPUFREQ may work without PMIC's DVS support. However, it is not
> as effective without DVS support as supposed. AVS is not supported in
> this version.
>
> Note that CLK_SRC of some clocks including
Added .flags property to struct clk init_clocks[] and removed
init_clocks_disabled[], which became useless by BOOT_OFF bit of .flags.
Signed-off-by: MyungJoo Ham
Signed-off-by: Kyungmin Park
---
arch/arm/mach-s5pv210/clock.c | 477 +++--
1 files changed, 270
Add a .flag property to the struct clk. The flag can have the following
information:
The clock is enabled at the boot time.
The clock cannot be disabled.
The clock is enabled at the boot time and cannot be disabled.
The clock is disabled at the boot time. Note that
S5PV210 Machine specific code for powerdomain/clock-gating support
Powerdomains and Blocks are defined for each corresponding clk.
Signed-off-by: MyungJoo Ham
Signed-off-by: Kyungmin Park
---
arch/arm/mach-s5pv210/Kconfig | 17 ++
arch/arm/mach-s5pv210/clock.c | 461
Even when all the clocks of a domain are turned off, turning off the
power for the domain saves (leakage) current. Thus, we need to control
powerdomain accordingly to save even more power when we do clock gating.
Block-gating is a similar feature with powerdomain, but, it controls
"block", which i
This patches add support for powerdomain, block-gating, and flags in struct clk.
Blockgating re-uses powerdomain support scheme and depends on powerdomain
support.
Flags support is independent from powerdomain; however, powerdomain support is
NOT stable without flags support. Without flags supp
On Mon, Jul 19, 2010 at 4:59 PM, Kukjin Kim wrote:
> MyungJoo Ham wrote:
>>
>> Early S5PC110 (EVT0) chip had some issues required workaround from a
>> kernel. We can add such workaround codes with this Kconfig entry.
>>
>> Signed-off-by: MyungJoo Ham
>> Signed-off-by: Kyungmin Park
>> ---
>> ar
MyungJoo Ham wrote:
>
> Early S5PC110 (EVT0) chip had some issues required workaround from a
> kernel. We can add such workaround codes with this Kconfig entry.
>
> Signed-off-by: MyungJoo Ham
> Signed-off-by: Kyungmin Park
> ---
> arch/arm/mach-s5pv210/Kconfig |7 +++
> 1 files change
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