> -Original Message-
> From: kyungmi...@gmail.com [mailto:kyungmi...@gmail.com] On Behalf Of
> Kyungmin Park
> Sent: Friday, July 30, 2010 11:43 AM
> To: Kukjin Kim
> Cc: linux-arm-ker...@lists.infradead.org;
linux-samsung-soc@vger.kernel.org;
> linux-...@vger.kernel.org; ben-li...@fluff.o
On Fri, Jul 30, 2010 at 10:03 AM, Kukjin Kim wrote:
> Kyungmin Park wrote:
>>
>> On Thu, Jul 29, 2010 at 6:42 PM, Kukjin Kim wrote:
>> > From: Naveen Krishna Ch
>> >
>> > This patch adds HAVE_S3C2410_I2C to control inclusion of I2C bus driver
>> > on Samsung SoCs and makes I2C bus driver depende
Kyungmin Park wrote:
>
> On Thu, Jul 29, 2010 at 6:42 PM, Kukjin Kim wrote:
> > From: Naveen Krishna Ch
> >
> > This patch adds HAVE_S3C2410_I2C to control inclusion of I2C bus driver
> > on Samsung SoCs and makes I2C bus driver dependency SoC specific instead
> > of machine specific. This will
On Thu, Jul 29, 2010 at 6:42 PM, Kukjin Kim wrote:
> From: Naveen Krishna Ch
>
> This patch adds HAVE_S3C2410_I2C to control inclusion of I2C bus driver
> on Samsung SoCs and makes I2C bus driver dependency SoC specific instead
> of machine specific. This will enalbe all machines using Samsung AR
On Fri, Jul 30, 2010 at 7:48 AM, Ben Dooks wrote:
> On 28/07/10 04:04, Chanwoo Choi wrote:
>
> [snip]
>
>
>> +/* GPIO I2C AP 1.8V */
>> +#define AP_I2C_GPIO_BUS_5 5
>> +static struct i2c_gpio_platform_data i2c_gpio5_data = {
>> + .sda_pin = S5PV210_MP05(3), /* XM0ADDR_11 */
>> +
On 28/07/10 04:04, Chanwoo Choi wrote:
[snip]
> +/* GPIO I2C AP 1.8V */
> +#define AP_I2C_GPIO_BUS_55
> +static struct i2c_gpio_platform_data i2c_gpio5_data = {
> + .sda_pin= S5PV210_MP05(3), /* XM0ADDR_11 */
> + .scl_pin= S5PV210_MP05(2), /* XM0ADDR_10 */
>
On Wed, Jul 28, 2010 at 12:04:45PM +0900, Chanwoo Choi wrote:
> This patch add the definition of GPIO to support WM8994 audio codec on
> I2C bus.
>
> Signed-off-by : Chanwoo Choi
> Signed-off-by : Kyungmin Park
This should come before the patch using it in your patch series, that
way things won
On Wed, Jul 28, 2010 at 12:04:44PM +0900, Chanwoo Choi wrote:
> +static struct regulator_consumer_supply wm8994_fixed_voltage0_supplies[] = {
> + {
> + .dev_name = "5-001a",
> + .supply = "DBVDD",
> + }, {
> + .dev_name = "5-001a",
>
On Thu, Jul 29, 2010 at 02:34:35PM +0200, Marek Szyprowski wrote:
> This patch adds support for regulator API to sdhci core driver. Regulators
> can be used to disable power in suspended state to reduce dissipated
> energy.
>
> Signed-off-by: Marek Szyprowski
> Signed-off-by: Kyungmin Park
Look
This patch adds support for regulator API to sdhci core driver. Regulators
can be used to disable power in suspended state to reduce dissipated
energy.
Signed-off-by: Marek Szyprowski
Signed-off-by: Kyungmin Park
---
Changes since V1:
- moved regulator support from sdhci-s3c sub-driver to the m
This patch enables SDHCI_QUIRK_NO_HISPD_BIT on Samsung SDHCI driver.
This solves detection problems with some external SD cards. This change
has been tested on S5PC100 and S5PC110. It has no inpact on driver
speed.
Signed-off-by: Kyungmin Park
Signed-off-by: Marek Szyprowski
---
drivers/mmc/hos
On some Samsung SoCs not all SDHCI controllers have card detect (CD)
line. For some embedded designs it is not even needed, because ususally
the device (like SDIO flash memory or wifi controller) is permanently
wired to the controller. There are also systems which have a card detect
line connected
Hello,
This is an updated version of the patches I've sent yesterday. I've
fixed issues reported by Maurus Cuelenaere and Ben Dooks.
This patch series includes various updates to sdhci-s3c driver. The
patches has been rebased onto latest -mm kernel tree from
git://zen-kernel.org/kernel/mmotm.git
S3C SDHCI host controller can change the source for generating mmc
clock. By default host bus clock is used, what causes some problems on
machines with 133MHz bus, because the SDHCI divider cannot be as high
get proper clock value for identification mode. This is not a problem
for the controller, b
Hello.
MyungJoo Ham wrote:
CPUFREQ of S5PV210 uses different APLL settings according to
different CPU frequencies. We provide such settings values for
CPUFREQ at pll.h.
Note that at 1GHz of ARMCLK, APLL should be 1GHz and for other lower
ARMCLK, APLL should be 800MHz.
Signed-off-by: Myung
S5PV210 CPUFREQ Support.
This CPUFREQ may work without PMIC's DVS support. However, it is not
as effective without DVS support as supposed. AVS is not supported in
this version.
Note that CLK_SRC of some clocks including ARMCLK, G3D, G2D, MFC,
and ONEDRAM are modified directly without updating cl
Previously, most of CLK_DIV/SRC register accessing mask and shift
values were used at arch/arm/mach-s5pv210/clock.c only; thus we
had not been using macros for these. However, as CPUFREQ uses
those shift and mask values as well, we'd better define them at a single
location, whose proper location wo
The CPUFREQ driver requires an access to DMCx registers. We
define physical addresses and mapping between physical and virtual
addresses of DMCx registers.
Signed-off-by: MyungJoo Ham
Signed-off-by: Kyungmin Park
---
arch/arm/mach-s5pv210/cpu.c | 12 +++-
arch/arm
S5PV210 CPUFREQ Initial Support.
This is a series of patches to enable CPUFREQ for S5PV210.
Although this works without PMIC's DVS support, it is not
as effective without DVS support as supposed. AVS is not
supported in this version.
At the patch revision v5, the following patches are updated fr
The CPUFREQ driver requires an access to DMCx registers. We
define virtual addresses of DMCx registers.
Signed-off-by: MyungJoo Ham
Signed-off-by: Kyungmin Park
---
arch/arm/plat-s5p/include/plat/map-s5p.h |3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/arch/a
CPUFREQ of S5PV210 uses different APLL settings according to
different CPU frequencies. We provide such settings values for
CPUFREQ at pll.h.
Note that at 1GHz of ARMCLK, APLL should be 1GHz and for other lower
ARMCLK, APLL should be 800MHz.
Signed-off-by: MyungJoo Ham
Signed-off-by: Kyungmin Pa
S5PV210 requires msys/dsys info as well; thus, we've included those at
struct s3c_freq, which is used by CPUFREQ of S5PV210.
Signed-off-by: MyungJoo Ham
Signed-off-by: Kyungmin Park
---
arch/arm/plat-samsung/include/plat/cpu-freq.h |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
Early products of S5PV210, EVT0, had several errata that require
kernel to avoid using some parts/instructions of the CPU or to
add protection instructions. There are products with such early
production CPUs; thus, we want to distinguish them in kernel.
This patch is to distinguish such products.
From: Naveen Krishna Ch
This patch adds HAVE_S3C2410_I2C to control inclusion of I2C bus driver
on Samsung SoCs and makes I2C bus driver dependency SoC specific instead
of machine specific. This will enalbe all machines using Samsung ARCH_S3C2410,
_S3C64XX, _S5P6440, _S5PC100, and _S5PV210 to sel
On Thu, Jul 29, 2010 at 09:53:11AM +0800, Wan ZongShun wrote:
> >> Console: colour dummy device 80x30
> >> console [ttySAC3] enabled
Okay, so the kernel console driver appears...
> >> Calibrating delay loop... 398.95 BogoMIPS (lpj=997376)
> >> Mount-cache hash table entries: 512
> >> CPU: Testing
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