Hi,
On 5/2/12, Thomas Abraham wrote:
> Add device tree based discovery support.
>
> Signed-off-by: Thomas Abraham
> ---
> .../devicetree/bindings/mmc/synposis-dw-mshc.txt | 85 +
> drivers/mmc/host/dw_mmc-pltfm.c| 24 +++
> drivers/mmc/host/dw_mmc.c
If the write protect pad of the controller is not connected to the write
protect pin of the slot, the driver should be notified of this condition
so that incorrect check for write protection by reading the WRTORT
register can avoided. The get_ro platform callback can be used for in
such cases, but
The instantiation of the Synopsis Designware controller on Exynos5250
include extension for SDR and DDR specific tx/rx phase shift timing
and CIU internal divider. In addition to that, the option to skip the
command hold stage is also introduced. Add support for these Exynos5250
specfic extenstions
Add device nodes for the four instances of dw_mmc controllers in Exynos5250
and enable instance 0 and 2 for the smdk5250 board.
Signed-off-by: Thomas Abraham
---
arch/arm/boot/dts/exynos5250-smdk5250.dts | 50 -
arch/arm/boot/dts/exynos5250.dtsi | 24 +
Add device tree based discovery support.
Signed-off-by: Thomas Abraham
---
.../devicetree/bindings/mmc/synposis-dw-mshc.txt | 85 +
drivers/mmc/host/dw_mmc-pltfm.c| 24 +++
drivers/mmc/host/dw_mmc.c | 181 +++-
drivers/m
This patch series adds device tree support for Synopsis Designware Mobile
Storage Host Controller.
The first patch adds clock lookup in the driver and this is optional. Platforms
that do not need any clock gating and control for the dw_mmc controllers will
not be affected with this change. The sec
Add entries if MSHC controllers in AUXDATA table for correct device name
initialization.
Signed-off-by: Abhilash Kesavan
Signed-off-by: Thomas Abraham
---
arch/arm/mach-exynos/mach-exynos5-dt.c |8
1 files changed, 8 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-exynos/
Add clock instances for bus interface unit clock and card interface unit
clock of the all four MSHC controller instances.
Signed-off-by: Abhilash Kesavan
Signed-off-by: Thomas Abraham
---
arch/arm/mach-exynos/clock-exynos5.c | 45 --
1 files changed, 16 inserti
Some platforms allow for clock gating and control of bus interface unit clock
and card interface unit clock. Add support for clock lookup of optional biu
and ciu clocks for clock gating and clock speed determination.
Signed-off-by: Abhilash Kesavan
Signed-off-by: Thomas Abraham
---
drivers/mmc/
On 5/2/12, Rafael J. Wysocki wrote:
> On Sunday, April 29, 2012, Rafael J. Wysocki wrote:
>> On Friday, April 06, 2012, Marek Szyprowski wrote:
>> > Some bootloaders disable power domains on boot and the platform startup
>> > code registers them in the 'disabled' state. Current gen_pd code
>> > as
Acked-by: Jaehoon Chung
On 05/02/2012 06:57 AM, Thomas Abraham wrote:
> The variable 'dw_mci_card_workqueue' is a global variable shared between
> multiple instances of the dw_mmc host controller. Due to this, data
> corruption has been noticed when multiple instances of dw_mmc controllers
> are
The variable 'dw_mci_card_workqueue' is a global variable shared between
multiple instances of the dw_mmc host controller. Due to this, data
corruption has been noticed when multiple instances of dw_mmc controllers
are actively reading/writing the media. Fix this by adding a instance
of 'struct wor
On Sunday, April 29, 2012, Rafael J. Wysocki wrote:
> On Friday, April 06, 2012, Marek Szyprowski wrote:
> > Some bootloaders disable power domains on boot and the platform startup
> > code registers them in the 'disabled' state. Current gen_pd code assumed
> > that the devices can be registered on
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