The base address of I2S 0 controller is similar in exynos4 and exynos5
platforms. So this patch defines a common macro for the I2S controller
0 base address in both the platforms and use the same macro.
This patch also defines the I2S controller 1,2 base addresses in exynos5
and correct the I2S
The CMU of EXYNOS can't control Audio Subsystem's clocks because
AUDSS SFRs aren't located in CMU. But AUDSS is a kind of CMU for
Audio Subsystem and need to use clock framework. This mapping
address will be used for AUDSS clock control.
Signed-off-by: sangsu4u.park sangsu4u.p...@samsung.com
Audiocdclk frequency is 16.9344MHz in SMDK5250 and this clock is
board specific. So this patch adds a function to set the required
audio codec clk frequency from machine file.
This patch also adds all the required clock instances for audio
subsystem and adds the clock alias names for i2sclk and
This patch series adds device tree based discovery support for Samsung's
i2s controller. This is tested on Exynos5250 with 8994 codec for playback
and capturing modes on 3.5.0-rc7
Padmavathi Venna (2):
ASOC: SAMSUNG: Add DT support for i2s
ASOC: SAMSUNG: Add dma_prop variable in
Add support for device based discovery.
Signed-off-by: Padmavathi Venna padm...@samsung.com
---
.../devicetree/bindings/sound/samsung-i2s.txt | 62 ++
sound/soc/samsung/i2s.c| 228 +++-
2 files changed, 241 insertions(+), 49 deletions(-)
In DT based implementation, the DMA channel number need to be parsed as
a property from device tree. So add dma_prop variable in s3c_dma_params
to get the i2s DMA channel number.
Signed-off-by: Padmavathi Venna padm...@samsung.com
---
sound/soc/samsung/dma.c |1 +
sound/soc/samsung/dma.h |
This patch set enables device tree based platform support for the three I2S
controllers on Samsung's Exynos5 SoC's.
Padmavathi Venna (2):
ARM: dts: Add nodes for i2s controllers for Samsung Exynos5 platforms
ARM: EXYNOS: Enable platform support for I2S controllers
Add device nodes for the three instances of i2s controllers in Exynos5
platforms. Enable instance i2s 0 for exynos5250 board and disable all
other i2s instances.
Signed-off-by: Padmavathi Venna padm...@samsung.com
---
arch/arm/boot/dts/exynos5250-smdk5250.dts | 15 +++
Add AUXDATA entries for i2s controller driver so as to set the device
name for clock lookups
Signed-off-by: Padmavathi Venna padm...@samsung.com
---
arch/arm/mach-exynos/mach-exynos5-dt.c |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git
Update Kconfig file to support the Exynos5250 and Exynos4412
Signed-off-by: Sangsu Park sangsu4u.p...@samsung.com
Signed-off-by: Sangbeom Kim sbki...@samsung.com
Signed-off-by: Padmavathi Venna padm...@samsung.com
---
sound/soc/samsung/Kconfig |8
1 files changed, 4 insertions(+), 4
On 24 July 2012 19:14, Jae hoon Chung jh80.ch...@gmail.com wrote:
2012/7/24 Girish K S girish.shivananja...@linaro.org:
On 24 July 2012 18:37, Jae hoon Chung jh80.ch...@gmail.com wrote:
Hi Girish,
Right, it be mentioned about the open-drain mode in synopsys spec.
But if didn't work on other
This patchset fixes irq numbers of ARM Performance Monitoring unit.
We need to seperate arm-pmu(performance measurement unit) and exynos-pmu(power
management unit). The exynos4 and 5 use 2 more cpu core which has its own pmu.
We should define pmu irq numbers according to the number of cpus.
The
This patch fixes irq numbers of ARM PMU(Perfromance Monitoring Unit).
We need to seperate arm-pmu(performance measurement unit) and exynos-pmu(power
management unit). I decide to change EXYNOS4_IRQ_PMU to EXYNOS4_IRQ_POWER_PMU
because there are no one use it.
A max cpu number of exynos4 is four in
This patch adds set_irq_affinity function for combiner_irq. We need this
function to enable a arm-pmu because the irq of exynos's pmu is declared
combiner_irq.
Signed-off-by: Chanho Park chanho61.p...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
On 24 July 2012 18:37, Jae hoon Chung jh80.ch...@gmail.com wrote:
Hi Girish,
Right, it be mentioned about the open-drain mode in synopsys spec.
But if didn't work on other board, there is some problem.
We can consider the location of set_busmode() .
Sure. Currently i am setting the bus mode
On 26 July 2012 06:05, Chanho Park chanho61.p...@samsung.com wrote:
This patch fixes irq numbers of ARM PMU(Perfromance Monitoring Unit).
We need to seperate arm-pmu(performance measurement unit) and exynos-pmu(power
management unit). I decide to change EXYNOS4_IRQ_PMU to EXYNOS4_IRQ_POWER_PMU
On 24 July 2012 10:48, Seungwon Jeon tgih@samsung.com wrote:
Hi Girish,
July 23, 2012, Girish K S girish.shivananja...@linaro.org wrote:
In some Soc'S that integrate Designware mmc host controllers, the
HCON register is broken. The hardware configuration is not
updated. One specific
On 25 July 2012 17:35, Padmavathi Venna padm...@samsung.com wrote:
The base address of I2S 0 controller is similar in exynos4 and exynos5
platforms. So this patch defines a common macro for the I2S controller
0 base address in both the platforms and use the same macro.
This patch also defines
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