Re: S3C244X/S3C64XX SoC camera host interface driver questions

Hi, On 11/08/2012 07:47 PM, Andrey Gusakov wrote: Ok, thanks. I will add the missing CONFIG_PM_RUNTIME dependency in Kconfig. The driver has to have PM_RUNTIME enabled since on s3c64xx SoCs there are power domains and the camera power domain needs to be enabled for the CAMIF operation. The

Re: [PATCH 2/2] ARM: S3C64XX: Statically define parent clock of the camera clock

On 11/09/2012 08:42 AM, Andrey Gusakov wrote: Hi. I think .reg_src can be removed? This clock have only one source. Yes, good point. I'll repost with reg_src removed. Can you test that patch then ? Thanks, Sylwester On Thu, Nov 8, 2012 at 2:00 AM, Sylwester Nawrocki

[PATCH] ARM: S3C64XX: Statically define parent clock of the camera clock

The camera clock defined in arch/arm/mach-s3c64xx/clock.c has null clock source mux control register as it can have only one parent clock. In such cases there is a need to configure the parent clock statically, otherwise s3c_set_clksrc() bails out with an error message no parent clock specified

Re: [PATCH] ARM: S3C64XX: Statically define parent clock of the camera clock

Hi. On Fri, Nov 9, 2012 at 12:32 PM, Sylwester Nawrocki sylvester.nawro...@gmail.com wrote: The camera clock defined in arch/arm/mach-s3c64xx/clock.c has null clock source mux control register as it can have only one parent clock. In such cases there is a need to configure the parent clock

Re: [PATCH] ARM: S3C64XX: Statically define parent clock of the camera clock

Hi, On 11/09/2012 10:31 AM, Andrey Gusakov wrote: On Fri, Nov 9, 2012 at 12:32 PM, Sylwester Nawrocki sylvester.nawro...@gmail.com wrote: The camera clock defined in arch/arm/mach-s3c64xx/clock.c has null clock source mux control register as it can have only one parent clock. In such cases

RE: [PATCH] ARM: S3C64XX: Statically define parent clock of the camera clock

Andrey Gusakov wrote: Hi. On Fri, Nov 9, 2012 at 12:32 PM, Sylwester Nawrocki sylvester.nawro...@gmail.com wrote: The camera clock defined in arch/arm/mach-s3c64xx/clock.c has null clock source mux control register as it can have only one parent clock. In such cases there is a need to

RE: [PATCH v2] ARM: EXYNOS: origen: Add missing USB regulators

Tomasz Figa wrote: This patch adds missing USB OTG regulators needed for s3c-hsotg driver to work on Origen board. Confirmed with schematics of and tested on Origen board. Signed-off-by: Tomasz Figa t.f...@samsung.com --- arch/arm/mach-exynos/mach-origen.c | 2 ++ 1 file changed, 2

RE: [PATCH 2/4] gpio: samsung: Skip registration if pinctrl driver is present on Exynos4x12

Linus Walleij wrote: On Wed, Nov 7, 2012 at 5:41 AM, Kukjin Kim kgene@samsung.com wrote: A commit 1b6056d6 (pinctrl: samsung: Include bank-specific eint offset in bank struct) which is in your pinctrl tree (samsung branch) changed macro(EXYNOS_PIN_BANK_EINTG) to add offset.

Re: [PATCH] ARM: S3C64XX: Statically define parent clock of the camera clock

On 11/09/2012 11:05 AM, Sylwester Nawrocki wrote: Hi, On 11/09/2012 10:31 AM, Andrey Gusakov wrote: On Fri, Nov 9, 2012 at 12:32 PM, Sylwester Nawrocki sylvester.nawro...@gmail.com wrote: The camera clock defined in arch/arm/mach-s3c64xx/clock.c has null clock source mux control register as

RE: [PATCH 2/4] ARM: EXYNOS: PL330 MDMA1 fix for revision 0 of Exynos4210 SOC

Bartlomiej Zolnierkiewicz wrote: Ah, okay. Here is full simplified patch. From: Bartlomiej Zolnierkiewicz b.zolnier...@samsung.com Subject: [PATCH v2] ARM: EXYNOS: PL330 MDMA1 fix for revision 0 of Exynos4210 SOC Commit 8214513 (ARM: EXYNOS: fix address for EXYNOS4 MDMA1) changed

RE: [PATCH v2 1/6] ARM: EXYNOS5: Clock settings for SATA and SATA PHY

Vasanth Ananthan wrote: This patch adds neccessary clock entries for SATA, SATA PHY and I2C_SATAPHY Signed-off-by: Vasanth Ananthan vasant...@samsung.com --- arch/arm/mach-exynos/clock-exynos5.c | 21 ++--- 1 files changed, 18 insertions(+), 3 deletions(-) diff

RE: [PATCH v2 2/6] ARM: EXYNOS5: DT Support for SATA and SATA PHY

Vasanth Ananthan wrote: This patch adds Device Nodes for SATA and SATA PHY device. [...] @@ -188,6 +188,9 @@ #define EXYNOS4_PA_SATA 0x1256 #define EXYNOS4_PA_SATAPHY 0x125D #define EXYNOS4_PA_SATAPHY_CTRL 0x126B +#define

Re: [PATCH v7 0/5] usb: phy: samsung: Introducing usb phy driver for samsung SoCs

Hi, On Tue, Oct 30, 2012 at 10:27:32AM +0530, Praveen Paneri wrote: Changes from v6: Modified register definitions according to the existing ones. Changed default PHY clk selection for SoCs. Improved binding text and rebased to the latest usb-next. Changes from v5: Moved clk_get() to

Re: [PATCH v7 0/5] usb: phy: samsung: Introducing usb phy driver for samsung SoCs

Hi Kukjin, On Fri, Nov 9, 2012 at 5:24 PM, Felipe Balbi ba...@ti.com wrote: Hi, On Tue, Oct 30, 2012 at 10:27:32AM +0530, Praveen Paneri wrote: Changes from v6: Modified register definitions according to the existing ones. Changed default PHY clk selection for SoCs. Improved binding text

Re: [PATCH v7 0/5] usb: phy: samsung: Introducing usb phy driver for samsung SoCs

On Fri, Nov 9, 2012 at 8:54 PM, Felipe Balbi ba...@ti.com wrote: Hi, On Tue, Oct 30, 2012 at 10:27:32AM +0530, Praveen Paneri wrote: Changes from v6: Modified register definitions according to the existing ones. Changed default PHY clk selection for SoCs. Improved binding text and rebased

Re: [PATCH v7 0/5] usb: phy: samsung: Introducing usb phy driver for samsung SoCs

Hi, On Fri, Nov 9, 2012 at 6:06 PM, Kyungmin Park kmp...@infradead.org wrote: On Fri, Nov 9, 2012 at 8:54 PM, Felipe Balbi ba...@ti.com wrote: Hi, On Tue, Oct 30, 2012 at 10:27:32AM +0530, Praveen Paneri wrote: Changes from v6: Modified register definitions according to the existing ones.

Re: [PATCH v7 0/5] usb: phy: samsung: Introducing usb phy driver for samsung SoCs

Hi, On Fri, Nov 09, 2012 at 06:50:44PM +0530, Praveen Paneri wrote: Hi, On Fri, Nov 9, 2012 at 6:06 PM, Kyungmin Park kmp...@infradead.org wrote: On Fri, Nov 9, 2012 at 8:54 PM, Felipe Balbi ba...@ti.com wrote: Hi, On Tue, Oct 30, 2012 at 10:27:32AM +0530, Praveen Paneri wrote: