Re: [RFC 01/12] exynos-fimc-is: Adding device tree nodes

On Wed, Mar 27, 2013 at 7:17 PM, Sylwester Nawrocki wrote: > On 03/27/2013 05:31 AM, Arun Kumar K wrote: >> On Wed, Mar 27, 2013 at 4:21 AM, Sylwester Nawrocki >> wrote: >>> On 03/26/2013 01:17 PM, Arun Kumar K wrote: > [...] >> Only issue is with the context sharing. >> Right now you can see tha

[PATCH] serial: samsung: Use printk instead of printascii for S3C_PMDBG

Users should use no_console_suspend if they want output during suspend, rather than relying on DEBUG_LL. Using DEBUG_LL has two disadvantages: 1. It doesn't respect power management. When the UART is suspended the clock is stopped, and trying to use DEBUG_LL will just hang. This means if th

Re: [PATCH v6 7/7] irqchip: s3c24xx: add devicetree support

On 03/26/2013 05:10 PM, Heiko Stübner wrote: > Add the necessary code to initialize the interrupt controller > thru devicetree data using the irqchip infrastructure. > > Signed-off-by: Heiko Stuebner Acked-by: Rob Herring > --- > .../interrupt-controller/samsung,s3c24xx-irq.txt | 53 +

Re: [PATCH] [media] s5p-mfc: Change MFC clock reference w.r.t Common Clock Framework

On 03/27/2013 03:01 AM, Mike Turquette wrote: > Quoting Prasanna Kumar (2013-03-25 22:20:51) >> From: Prasanna Kumar >> >> According to Common Clock framework , modified the method of getting Huh ? Could you explain in detail what exactly in this patch is related to the Common Clock Framework ? I

Re: [PATCH 6/6] ARM: dts: Add pcie controller node for Samsung EXYNOS5440 SoC

On Wed, Mar 27, 2013 at 05:35:48PM +0900, Jingoo Han wrote: > Here is the lspci -vv output. > I tested Exynos PCIe with e1000e lan card. > > 00:00.0 PCI bridge: Samsung Electronics Co Ltd Device a549 (rev 01) (prog-if > 00 [Normal decode]) > Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWI

Re: linux-next build failures with ARCH_EXYNOS

Hi Tomasz, On 27 March 2013 18:40, Tomasz Figa wrote: > Hi, > > I'm experiencing several kernel build failures when building linux-next > (next-20130327) for ARCH_EXYNOS. > > Using unmodified exynos_defconfig: > > CC drivers/clocksource/exynos_mct.o > driv

Re: [RFC 01/12] exynos-fimc-is: Adding device tree nodes

On 03/27/2013 05:31 AM, Arun Kumar K wrote: > On Wed, Mar 27, 2013 at 4:21 AM, Sylwester Nawrocki > wrote: >> On 03/26/2013 01:17 PM, Arun Kumar K wrote: [...] > Only issue is with the context sharing. > Right now you can see that the fimc-is context is shared between all > the subdevs. > As all o

Re: [PATCH 3/6] usb: phy: samsung: Consolidate reference clock rate handling

Hi, On Wed, Mar 27, 2013 at 02:39:08PM +0100, Tomasz Figa wrote: > On Wednesday 27 of March 2013 15:31:49 Felipe Balbi wrote: > > Hi, > > > > On Wed, Mar 27, 2013 at 02:26:08PM +0100, Tomasz Figa wrote: > > > Hi Felipe, > > > > > > On Wednesday 27 of March 2013 15:19:58 Felipe Balbi wrote: > > >

Re: [PATCH 3/6] usb: phy: samsung: Consolidate reference clock rate handling

On Wednesday 27 of March 2013 15:31:49 Felipe Balbi wrote: > Hi, > > On Wed, Mar 27, 2013 at 02:26:08PM +0100, Tomasz Figa wrote: > > Hi Felipe, > > > > On Wednesday 27 of March 2013 15:19:58 Felipe Balbi wrote: > > > Hi, > > > > > > On Tue, Mar 26, 2013 at 03:53:12PM +0100, Tomasz Figa wrote: >

Re: [PATCH 3/6] usb: phy: samsung: Consolidate reference clock rate handling

Hi, On Wed, Mar 27, 2013 at 02:26:08PM +0100, Tomasz Figa wrote: > Hi Felipe, > > On Wednesday 27 of March 2013 15:19:58 Felipe Balbi wrote: > > Hi, > > > > On Tue, Mar 26, 2013 at 03:53:12PM +0100, Tomasz Figa wrote: > > > @@ -307,6 +310,7 @@ static int samsung_usb3phy_remove(struct > > > platf

Re: [PATCH 3/6] usb: phy: samsung: Consolidate reference clock rate handling

Hi Felipe, On Wednesday 27 of March 2013 15:19:58 Felipe Balbi wrote: > Hi, > > On Tue, Mar 26, 2013 at 03:53:12PM +0100, Tomasz Figa wrote: > > @@ -307,6 +310,7 @@ static int samsung_usb3phy_remove(struct > > platform_device *pdev)> > > static struct samsung_usbphy_drvdata usb3phy_exynos5 = {

Re: [PATCH 3/6] usb: phy: samsung: Consolidate reference clock rate handling

Hi, On Tue, Mar 26, 2013 at 03:53:12PM +0100, Tomasz Figa wrote: > @@ -307,6 +310,7 @@ static int samsung_usb3phy_remove(struct platform_device > *pdev) > static struct samsung_usbphy_drvdata usb3phy_exynos5 = { > .cpu_type = TYPE_EXYNOS5250, > .devphy_en_mask =

linux-next build failures with ARCH_EXYNOS

Hi, I'm experiencing several kernel build failures when building linux-next (next-20130327) for ARCH_EXYNOS. Using unmodified exynos_defconfig: CC drivers/clocksource/exynos_mct.o drivers/clocksource/exynos_mct.c:557:1: warning: comparison of distinct pointer types lacks a cast dr

Re: [PATCH v3] of/pci: Provide support for parsing PCI DT ranges property

On Tue, Mar 26, 2013 at 04:20:23PM +, Andrew Murray wrote: > This patch factors out common implementation patterns to reduce overall kernel > code and provide a means for host bridge drivers to directly obtain struct > resources from the DT's ranges property without relying on architecture > s

[PATCH 21/21] clk: samsung: exynos4: Add support for SoC-specific register save list

This patch extends suspend/resume support for SoC-specific registers to handle differences in register sets on particular SoCs. Signed-off-by: Tomasz Figa Signed-off-by: Kyungmin Park --- drivers/clk/samsung/clk-exynos4.c| 30 -- drivers/clk/samsung/clk-exynos525

[PATCH 20/21] clk: samsung: exynos4: Add missing registers to suspend save list

This patch adds missing clock control registers to the list of registers that should be saved across system suspend. Signed-off-by: Tomasz Figa Signed-off-by: Kyungmin Park --- drivers/clk/samsung/clk-exynos4.c | 33 + 1 file changed, 33 insertions(+) diff --git

[PATCH 19/21] clk: samsung: exynos4: Remove E4X12 prefix from SRC_DMC register

This register is present on all Exynos4 SoCs and so the prefix is misleading. Signed-off-by: Tomasz Figa Signed-off-by: Kyungmin Park --- drivers/clk/samsung/clk-exynos4.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/clk/samsung/clk-exynos4.c b/drivers/clk/sa

[PATCH 18/21] clk: samsung: exynos4: Add E4210 prefix to GATE_IP_PERIR register

This definition is specific for Exynos4210 (which has another location than the same register on Exynos4x12 SoCs) and so needs appropriate prefix. Signed-off-by: Tomasz Figa Signed-off-by: Kyungmin Park --- drivers/clk/samsung/clk-exynos4.c | 16 1 file changed, 8 insertions(+)

[PATCH 17/21] clk: samsung: exynos4: Add E4210 prefix to LCD1 clock registers

This patch adds E4210 prefix to all registers related to LCD1 clock domain, because they are present only on Exynos4210. Signed-off-by: Tomasz Figa Signed-off-by: Kyungmin Park --- drivers/clk/samsung/clk-exynos4.c | 22 +++--- 1 file changed, 11 insertions(+), 11 deletions(-)

[PATCH 16/21] clk: samsung: exynos4: Remove SoC-specific registers from save list

Current clock save list is shared for all Exynos4 SoCs, so it must contain only registers present in all supported SoCs, because accessing unavailable registers might have undefined effect. This patch removes registers specific for particular SoCs from shared save list, as they should be supported

[PATCH 15/21] clk: samsung: exynos4: Use SRC_MASK_PERIL{0,1} definitions

There are definitions of SRC_MASK_PERIL0 and SRC_MASK_PERIL1 registers, but they are not used for clock definitions. This patch modifies related clock definitions to use defined macros instead of numeric offsets. Signed-off-by: Tomasz Figa Signed-off-by: Kyungmin Park --- drivers/clk/samsung/cl

[PATCH 14/21] clk: samsung: exynos4: Define {E,V}PLL registers

This patch adds preprocessor definitions of EPLL and VPLL registers and replaces all occurences of offsets of related registers with new definitions. Signed-off-by: Tomasz Figa Signed-off-by: Kyungmin Park --- drivers/clk/samsung/clk-exynos4.c | 16 1 file changed, 12 insertion

[PATCH 13/21] clk: samsung: exynos4: Add missing mout_sata on Exynos4210

This patch adds missing mout_sata that is a parent of div_sata clock. Signed-off-by: Tomasz Figa Signed-off-by: Kyungmin Park --- drivers/clk/samsung/clk-exynos4.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/samsung/clk-exynos4.c b/drivers/clk/samsung/clk-exynos4.c index 05

[PATCH 12/21] clk: samsung: exynos4: Add missing CMU_TOP and ISP clocks

From: Andrzej Hajda The patch adds missing clocks to TOP and ISP clock domains. It also adds clock gates for ISP sub-blocks. Signed-off-by: Andrzej Hajda Signed-off-by: Tomasz Figa Signed-off-by: Kyungmin Park --- .../devicetree/bindings/clock/exynos4-clock.txt| 30 ++ drivers/clk/s

[PATCH 11/21] clk: samsung: exynos4: Add G3D clocks

This patch adds clocks needed for G3D block present on Exynos 4 SoCs. Signed-off-by: Tomasz Figa Signed-off-by: Kyungmin Park --- .../devicetree/bindings/clock/exynos4-clock.txt| 4 drivers/clk/samsung/clk-exynos4.c | 22 ++ 2 files changed, 18 ins

[PATCH 10/21] clk: samsung: exynos4: Add camera related clock definitions

From: Sylwester Nawrocki This patch adds several gate and mux clocks related to camera and ISP blocks. Signed-off-by: Sylwester Nawrocki Signed-off-by: Andrzej Hajda Signed-off-by: Tomasz Figa Signed-off-by: Kyungmin Park --- .../devicetree/bindings/clock/exynos4-clock.txt| 20 +

[PATCH 09/21] clk: samsung: exynos4: Export mout_core clock of Exynos4210

This patch enables clock lookup registration for mout_core clock used in Exynos4210 cpufreq driver. Signed-off-by: Tomasz Figa Signed-off-by: Kyungmin Park --- drivers/clk/samsung/clk-exynos4.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/samsung/clk-exynos4.c

[PATCH 08/21] clk: samsung: pll: Remove unimplemented ops

Unimplemented clock operations should be simply omitted instead of returning error values. This patch removes unimplemented PLL operations to fix problems caused by returning error code in round_rate callback. Signed-off-by: Tomasz Figa Signed-off-by: Kyungmin Park --- drivers/clk/samsung/clk-

[PATCH 07/21] clk: samsung: exynos4: Export clocks used by exynos cpufreq drivers

From: Lukasz Majewski This patch exports clocks used by Exynos cpufreq drivers to allow lookup using device tree. (Support to cpufreq drivers will be added in further patches.) Signed-off-by: Lukasz Majewski Signed-off-by: Tomasz Figa Signed-off-by: Kyungmin Park --- Documentation/devicetree

[PATCH 06/21] clk: samsung: exynos4: Move dac and mixer to Exynos4210-specific clocks

The sclk_dac and sclk_mixer clocks are not present on Exynos4x12. Signed-off-by: Tomasz Figa Signed-off-by: Kyungmin Park --- drivers/clk/samsung/clk-exynos4.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/clk/samsung/clk-exynos4.c b/drivers/clk/samsung/clk-ex

[PATCH 05/21] clk: samsung: exynos4: Export sclk_pcm0

This clock is used by PCM interface 0. Signed-off-by: Tomasz Figa Signed-off-by: Kyungmin Park --- Documentation/devicetree/bindings/clock/exynos4-clock.txt | 1 + drivers/clk/samsung/clk-exynos4.c | 4 ++-- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/

[PATCH 04/21] clk: samsung: exynos4: Add missing sclk_audio0 clock

This clock is a parent of mout_spdif and sclk_pcm0. Signed-off-by: Tomasz Figa Signed-off-by: Kyungmin Park --- drivers/clk/samsung/clk-exynos4.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/clk/samsung/clk-exynos4.c b/drivers/clk/samsung/clk-exynos4.c index 42c098d..0e89d97 1

[PATCH 03/21] clk: samsung: exynos4: Add missing mout_mipihsi clock

This patch adds missing output of mux MIPIHSI which is needed for div_mipihsi clock. Signed-off-by: Tomasz Figa Signed-off-by: Kyungmin Park --- drivers/clk/samsung/clk-exynos4.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/samsung/clk-exynos4.c b/drivers/clk/samsung/clk-exy

[PATCH 02/21] clk: samsung: exynos4: Use mout_mpll_user_* on Exynos4x12

Many clock muxes of Exynos 4x12 uses mout_mpll_user_* clocks instead of sclk_mpll as one of their parents. This patch moves such clocks from common array into SoC-specific arrays and adjusts their parent lists respectively. Signed-off-by: Tomasz Figa Signed-off-by: Kyungmin Park --- .../device

[PATCH 01/21] clk: samsung: exynos4: Correct sclk_mfc clock definition

From: Sylwester Nawrocki This clock must be exported to allow lookup using device tree. Signed-off-by: Sylwester Nawrocki Signed-off-by: Tomasz Figa Signed-off-by: Kyungmin Park --- Documentation/devicetree/bindings/clock/exynos4-clock.txt | 2 +- drivers/clk/samsung/clk-exynos4.c

[PATCH 00/21] Various fixes and extensions to Exynos4 clock driver

This series is a collection of various fixes and extensions to Exynos4 clock driver, which improve coverage of clocks present on Exynos4 SoCs and fix problems discovered during our internal work and testing. Andrzej Hajda (1): clk: samsung: exynos4: Add missing CMU_TOP and ISP clocks Lukasz Maj

Re: [PATCH v2] drm/exynos: enable FIMD clocks

Hi, On 27 March 2013 15:53, Inki Dae wrote: > 2013/3/20 Vikas Sajjan : >> While migrating to common clock framework (CCF), found that the FIMD clocks >> were pulled down by the CCF. >> If CCF finds any clock(s) which has NOT been claimed by any of the >> drivers, then such clock(s) are PULLed low

Re: [PATCH v2] drm/exynos: enable FIMD clocks

2013/3/20 Vikas Sajjan : > While migrating to common clock framework (CCF), found that the FIMD clocks > were pulled down by the CCF. > If CCF finds any clock(s) which has NOT been claimed by any of the > drivers, then such clock(s) are PULLed low by CCF. > > By calling clk_prepare_enable() for FIM

Re: [PATCH 6/6] ARM: dts: Add pcie controller node for Samsung EXYNOS5440 SoC

On Tuesday, March 26, 2013 2:05 AM, Jason Gunthorpe wrote: > > On Sat, Mar 23, 2013 at 01:09:18PM +0900, Jingoo Han wrote: > > > + pcie0@4000 { > > + compatible = "samsung,exynos5440-pcie"; > > + reg = <0x4000 0x4000 > > + 0x29 0x1000 > > +