On 2013年04月17日 18:02, Russell King - ARM Linux wrote:
On Wed, Apr 17, 2013 at 05:25:34PM +0800, Chen Gang wrote:
CONFIG_CPU_ARM7TDMI=y
CONFIG_CPU_ARM9TDMI=y
CONFIG_CPU_V7=y
CONFIG_CPU_32v4T=y
CONFIG_CPU_32v6K=y
CONFIG_CPU_32v7=y
This is an invalid configuration. A single kernel can not
Hi,
I have one suggestion,
On Fri, Apr 19, 2013 at 10:08 PM, Lukasz Majewski
l.majew...@samsung.com wrote:
Enable TMU support for Exynos4412 based target with device tree.
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
Hi amit,
Hi,
I have one suggestion,
On Fri, Apr 19, 2013 at 10:08 PM, Lukasz Majewski
l.majew...@samsung.com wrote:
Enable TMU support for Exynos4412 based target with device tree.
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
Signed-off-by: Kyungmin Park
On 22 April 2013 11:55, amit kachhap amit.kach...@gmail.com wrote:
Hi,
I have one suggestion,
On Fri, Apr 19, 2013 at 10:08 PM, Lukasz Majewski
l.majew...@samsung.com wrote:
Enable TMU support for Exynos4412 based target with device tree.
Signed-off-by: Lukasz Majewski
On Sunday 21 of April 2013 22:36:08 Inki Dae wrote:
2013/4/21 Tomasz Figa tomasz.f...@gmail.com
Hi,
On Monday 08 of April 2013 16:41:54 Viresh Kumar wrote:
On 8 April 2013 16:37, Vikas Sajjan vikas.saj...@linaro.org wrote:
While migrating to common clock framework
On Monday 22 of April 2013 10:44:00 Viresh Kumar wrote:
On 21 April 2013 20:13, Tomasz Figa tomasz.f...@gmail.com wrote:
3) after those two changes, all that remains is to fix compliance with
Common Clock Framework, in other words:
s/clk_enable/clk_prepare_enable/
and
On 04/22/2013 11:56 AM, Tomasz Figa wrote:
On Monday 22 of April 2013 10:44:00 Viresh Kumar wrote:
On 21 April 2013 20:13, Tomasz Figa tomasz.f...@gmail.com wrote:
3) after those two changes, all that remains is to fix compliance with
Common Clock Framework, in other words:
On 04/22/2013 12:03 PM, Inki Dae wrote:
Also looks good to me. But what if power domain was disabled without pm
runtime? In this case, you must enable the power domain at machine code
or
bootloader somewhere. This way would not only need some hard codes to
turn
the
On 22 April 2013 15:26, Tomasz Figa t.f...@samsung.com wrote:
Can you assure that in future SoCs, on which this driver will be used, this
assumption will still hold true or even that in current Exynos driver this
behavior won't be changed?
Probably yes.. Registers for enabling/disabling these
On Monday 22 of April 2013 12:17:39 Sylwester Nawrocki wrote:
On 04/22/2013 12:03 PM, Inki Dae wrote:
Also looks good to me. But what if power domain was disabled without
pm
runtime? In this case, you must enable the power domain at machine
code or
bootloader
The pci_process_bridge_OF_ranges function, used to parse the ranges
property of a PCI host device, is found in both Microblaze and PowerPC
architectures. These implementations are nearly identical. This patch
moves this common code to a common place.
Signed-off-by: Andrew Murray
This patch converts the pci_load_of_ranges function to use the new common
of_pci_range_parser.
Signed-off-by: Andrew Murray andrew.mur...@arm.com
Signed-off-by: Liviu Dudau liviu.du...@arm.com
Signed-off-by: Gabor Juhos juh...@openwrt.org
Reviewed-by: Rob Herring rob.herr...@calxeda.com
This patchset factors out duplicated code associated with parsing PCI
DT ranges properties across the architectures and introduces a
ranges parser. This parser of_pci_range_parser can be used directly
by ARM host bridge drivers enabling them to obtain ranges from device
trees.
I've included the
This patch factors out common implementation patterns to reduce overall kernel
code and provide a means for host bridge drivers to directly obtain struct
resources from the DT's ranges property without relying on architecture specific
DT handling. This will make it easier to write archiecture
Changes since v1:
- Rebased to v3.9-rc8
This patch series allows device tree enabled platforms to setup a runtime
I/O mapping for the chip-id controller. This helps to remove statically
defined I/O mapping for the Chip-ID controller. This series is based on
linux-next master branch and tested for
On device tree enabled exynos platforms, retrieve the physical base address
of the chip-id controller from device tree and create a virtual I/O mapping
for the chip-id controller. This helps to remove the chip-id controller entry
from the statically defined I/O mapping tables.
Cc: Kukjin Kim
Add chip-id controller nodes for Exynos4 and Exynos5 SoCs.
Cc: Kukjin Kim kgene@samsung.com
Signed-off-by: Thomas Abraham thomas.abra...@linaro.org
---
arch/arm/boot/dts/exynos4.dtsi|5 +
arch/arm/boot/dts/exynos5250.dtsi |5 +
2 files changed, 10 insertions(+), 0
On 4 April 2013 12:27, Kukjin Kim kgene@samsung.com wrote:
Thomas Abraham wrote:
This patch series allows device tree enabled platforms to setup a runtime
I/O mapping for the chip-id controller. This helps to remove statically
defined I/O mapping for the Chip-ID controller.
Thomas
On Monday, April 22, 2013 12:37:36 PM Tomasz Figa wrote:
On Monday 22 of April 2013 12:17:39 Sylwester Nawrocki wrote:
On 04/22/2013 12:03 PM, Inki Dae wrote:
Also looks good to me. But what if power domain was disabled without
pm
runtime? In this case, you must enable
that is already in the i2c
tree.
I've tested this on the Arndale board and am putting it into
the next/multiplatform branch now as a stepping stone for
part two, which will be a late branch at best, if we decide
to merge it in 3.10.
With this branch now available (merged) in linux-next (20130422
On Monday 22 of April 2013 12:05:49 Sylwester Nawrocki wrote:
On 04/22/2013 11:56 AM, Tomasz Figa wrote:
On Monday 22 of April 2013 10:44:00 Viresh Kumar wrote:
On 21 April 2013 20:13, Tomasz Figa tomasz.f...@gmail.com wrote:
3) after those two changes, all that remains is to fix compliance
On Monday 22 April 2013, Sachin Kamat wrote:
With this branch now available (merged) in linux-next (20130422),
looks like exynos4 DT support is broken on it. Tested on Origen 4210
and 4412 and I get the following warnings on 4412 Origen board with
exynos_defconfig (Note that clocks are all 0
On 22 April 2013 18:42, Arnd Bergmann a...@arndb.de wrote:
On Monday 22 April 2013, Sachin Kamat wrote:
With this branch now available (merged) in linux-next (20130422),
looks like exynos4 DT support is broken on it. Tested on Origen 4210
and 4412 and I get the following warnings on 4412
Hi,
On 04/19/2013 01:26 PM, Eunchul Kim wrote:
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimc.c
b/drivers/gpu/drm/exynos/exynos_drm_fimc.c
index d812c57..bc8411a 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fimc.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_fimc.c
@@ -76,6 +76,27 @@ enum
Hi Inki,
On 04/20/2013 06:11 PM, Inki Dae wrote:
Hi Sylwester,
DRM FIMC driver could be more cleaned up with this patch series. And your
third
patch
And just minor issue. The second patch has build warnings like below,
WARNING: static const char * array should probably be static const
On 04/20/2013 06:21 PM, Inki Dae wrote:
+static int fimc_parse_dt(struct fimc_context *ctx)
+{
+ struct device_node *node = ctx-dev-of_node;
+
+ if (!of_property_read_bool(node, samsung,lcd-wb))
+ return -ENODEV;
Isn't the above
On 04/19/2013 01:38 PM, Eunchul Kim wrote:
static void fimc_set_type_ctrl(struct fimc_context *ctx, enum fimc_wb wb)
@@ -1628,7 +1617,9 @@ static int fimc_ippdrv_start(struct device *dev, enum
drm_exynos_ipp_cmd cmd)
fimc_handle_lastend(ctx, true);
/* setup FIMD */
-
On 04/12/13 06:37, Arnd Bergmann wrote:
Hi Kukjin,
Hi Arnd,
These are the patches that I would like to apply directly to
the arm-soc next/multiplatform branch, unless you have any
Yeah, looks good to me.
objections. This would get all the simple stuff out of the
way, and I don't think
On 04/22/13 20:35, Thomas Abraham wrote:
Changes since v1:
- Rebased to v3.9-rc8
This patch series allows device tree enabled platforms to setup a runtime
I/O mapping for the chip-id controller. This helps to remove statically
defined I/O mapping for the Chip-ID controller. This series is based
On 04/22/13 20:20, Thomas Abraham wrote:
On 4 April 2013 12:27, Kukjin Kimkgene@samsung.com wrote:
Thomas Abraham wrote:
This patch series allows device tree enabled platforms to setup a runtime
I/O mapping for the chip-id controller. This helps to remove statically
defined I/O mapping
On 04/20/13 01:38, Lukasz Majewski wrote:
This patch series provide various fixes for TMU block.
Namely, support for common clock framework and proper regulator VDD_TS has been
added.
Moreover device tree definitions and documentation entry are now in place.
Lukasz Majewski (6):
On Mon, Apr 22, 2013 at 11:41:32AM +0100, Andrew Murray wrote:
This patchset factors out duplicated code associated with parsing PCI
DT ranges properties across the architectures and introduces a
ranges parser. This parser of_pci_range_parser can be used directly
by ARM host bridge drivers
On 04/22/13 13:32, Sachin Kamat wrote:
Adds TMU clock entries to exynos4210.dtsi file.
Signed-off-by: Sachin Kamatsachin.ka...@linaro.org
---
arch/arm/boot/dts/exynos4210.dtsi |3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/boot/dts/exynos4210.dtsi
On 04/22/13 03:02, Heiko Stübner wrote:
The s3c2412 uses the same dma channel selection-type as the s3c2443 and later
but introduced the notion of a receive channel to keep the spi channels,
together that are separate in hardware.
This series split the spi channels like later socs do (the
On 04/21/13 07:01, Arnd Bergmann wrote:
From: Tomasz Figat.f...@samsung.com
This adds a new clocksource driver for the PWM timer that is
present in most Samsung SoCs, based on the existing driver in
arch/arm/plat-samsung/samsung-time.c and many changes implemented by
Tomasz Figa.
Originally,
On 04/10/13 23:05, Kukjin Kim wrote:
On 04/10/13 22:55, Arnd Bergmann wrote:
On Wednesday 10 April 2013, Sylwester Nawrocki wrote:
Hmm, it turns out we are still actively using some boards based on
Exynos4210 EVT0 SoCs. And since it seems unlikely the patches from
Tomasz [1] adding basic DT
On 04/11/13 13:09, Jingoo Han wrote:
On Wednesday, April 10, 2013 6:50 PM, Sylwester Nawrocki wrote:
On 04/09/2013 04:27 PM, Vivek Gautam wrote:
From: Thomas Abrahamthomas.abra...@linaro.org
Convert clk_enable/clk_disable to clk_prepare_enable/clk_disable_unprepare
calls as required by common
On 04/09/13 22:12, Vivek Gautam wrote:
7edb3da: (USB: EHCI: make ehci-s5p a separate driver)
raised an issue with ehci-s5p's driver data.
Now that 's5p_ehci_hcd' doesn't maintain pointer to 'usb_hcd'
and s5p_ehci is nothing but a pointer to hcd-priv;
add hcd to the driver data rather than
On 04/13/13 05:51, Arnd Bergmann wrote:
On Friday 12 April 2013, Tomasz Figa wrote:
This series is an attempt to make the samsung-time clocksource driver ready
for multiplatform kernels. It moves the driver to drivers/clocksource, cleans
it up from uses of static platform-specific definitions,
Hi,
On Tue, Apr 16, 2013 at 12:35 PM, Doug Anderson diand...@chromium.org wrote:
Hi,
On Mon, Apr 8, 2013 at 12:22 AM, Kukjin Kim kgene@samsung.com wrote:
Mike Turquette wrote:
Quoting Tushar Behera (2013-04-02 01:20:40)
In legacy setup, sclk_mmc{0,1,2,3} used PRE_RATIO bit-field
On 04/15/13 23:41, Tomasz Figa wrote:
This series intends to add support for Universal C210 board using Device
Tree. Main difference from other boards based on Exynos 4210 is that
hardware revision of the SoC used on Universal C210 does not support MCT
timers and legacy PWM timers must be used
On Monday 22 April 2013, Kukjin Kim wrote:
On 04/10/13 23:05, Kukjin Kim wrote:
On 04/10/13 22:55, Arnd Bergmann wrote:
On Wednesday 10 April 2013, Sylwester Nawrocki wrote:
Hmm, it turns out we are still actively using some boards based on
Exynos4210 EVT0 SoCs. And since it seems
On Tuesday 23 of April 2013 02:37:33 Kukjin Kim wrote:
On 04/13/13 05:51, Arnd Bergmann wrote:
On Friday 12 April 2013, Tomasz Figa wrote:
This series is an attempt to make the samsung-time clocksource driver
ready for multiplatform kernels. It moves the driver to
drivers/clocksource,
On Monday 15 April 2013, Tomasz Figa wrote:
This patch adds device tree node for PWM block present on Exynos 4 SoCs.
Signed-off-by: Tomasz Figa t.f...@samsung.com
---
arch/arm/boot/dts/exynos4.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/exynos4.dtsi
On Monday 15 April 2013, Tomasz Figa wrote:
This patch extends exynos_init_time() function to handle Exynos4210 rev0
SoC, which differs in availability of system timers and needs different
clocksource initialization.
This makes it possible to use exynos_init_time() function as init_time
On Monday 15 April 2013, Tomasz Figa wrote:
This patch adds basic device tree sources for Universal C210 board.
Currently support includes:
- eMMC
- serial
- max8952 and max8998 voltage regulators.
- gpio-keys
More support will be added in further patches.
Signed-off-by: Tomasz
On Mon, Apr 22, 2013 at 12:53:43PM -0400, Jason Cooper wrote:
On Mon, Apr 22, 2013 at 11:41:32AM +0100, Andrew Murray wrote:
This patchset factors out duplicated code associated with parsing PCI
DT ranges properties across the architectures and introduces a
ranges parser. This parser
On 04/22/2013 11:10 PM, Olof Johansson wrote:
Hi,
On Tue, Apr 16, 2013 at 12:35 PM, Doug Anderson diand...@chromium.org wrote:
Hi,
On Mon, Apr 8, 2013 at 12:22 AM, Kukjin Kim kgene@samsung.com wrote:
Mike Turquette wrote:
Quoting Tushar Behera (2013-04-02 01:20:40)
In legacy setup,
On 22 April 2013 18:42, Arnd Bergmann a...@arndb.de wrote:
On Monday 22 April 2013, Sachin Kamat wrote:
With this branch now available (merged) in linux-next (20130422),
looks like exynos4 DT support is broken on it. Tested on Origen 4210
and 4412 and I get the following warnings on 4412
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