Hi Kukjin / Mike,
Can you apply this series
On Tue, Jul 16, 2013 at 7:10 PM, Yadwinder Singh Brar
yadi.bra...@gmail.com wrote:
Hi Kukjin / Mike,
On Tue, Jun 25, 2013 at 7:40 AM, Kukjin Kim kgene@samsung.com wrote:
Mike Turquette wrote:
Quoting Kukjin Kim (2013-06-24 08:02:39)
On
This patch adds a device node of rotator for exynos4 platform. It has proper
register and clock information. It also has limit table to get restrictions of
the image size.
Signed-off-by: Chanho Park chanho61.p...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
This patchset includes dt support for exynos rotator.
The exynos4 platform is only dt-based since 3.10, we should convert driver data
and ids to dt-based parsing methods. The rotator driver has a limit table to
get size limit. The minimum size of RGB888 format is 8 x 8 and maximum size is
8K x 8K.
The exynos4 platform is only dt-based since 3.10, we should convert driver data
and ids to dt-based parsing methods. The rotator driver has a limit table to get
size limit. The minimum size of RGB888 format is 8 x 8 and maximum size is 8K x
8K. The other format, YCbCr420 2-Plane has 32 x 32 min
This patch adds a dt-binding document for exynos rotator. It describes which
nodes should be defined to use the rotator.
Signed-off-by: Chanho Park chanho61.p...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
.../bindings/drm/exynos/samsung-rotator.txt| 35
On Monday 22 of July 2013 05:50:09 Daniel Lezcano wrote:
On 07/20/2013 02:04 AM, Tomasz Figa wrote:
PWM channel 4 has its autoreload bit located at different position.
This patch fixes the driver to account for that.
This fixes a problem with the clocksource hanging after it overflows
Hi Daniel,
On Monday 22 of July 2013 05:56:16 Daniel Lezcano wrote:
On 07/20/2013 02:04 AM, Tomasz Figa wrote:
In case of Samsung PWM timer, clocksource MMIO can not be used,
because
custom suspend/resume callbacks are required.
Signed-off-by: Tomasz Figa tomasz.f...@gmail.com
---
On Monday 22 of July 2013 11:01:32 Kukjin Kim wrote:
Kukjin Kim wrote:
Tomasz Figa wrote:
On Monday 22 of July 2013 00:22:16 Sylwester Nawrocki wrote:
On 07/20/2013 02:04 AM, Tomasz Figa wrote:
Since we now have a proper Samsung PWM clocksource driver in
place,
we can
The exynos4x12 has different address of GATE_IP_IMAGE reg. We should use
EXYNOS4X12_GATE_IP_IMAGE for g2d gating clocks instead of 4210's reg.
In case of mdma node, We don't use it for any exynos4 chipsets. I think we'll
need to change it to 'none' or leave it on.
Signed-off-by: Chanho Park
On 07/20/2013 07:42 AM, NAVEEN KRISHNA CHATRADHI wrote:
Hello Sebastian,
Hello Naveen,
I just did one more testing.
In case of iio/adc/exynos_adc.c there is a bug in the remove path.
If I fix the bug in the driver, with below patch
--- a/drivers/iio/adc/exynos_adc.c
+++
Hello Sebastian,
--- Original Message ---
Sender : Sebastian Andrzej Siewiorbige...@linutronix.de
Date : Jul 22, 2013 13:55 (GMT+05:30)
Title : Re: [PATCH] of: provide of_platform_unpopulate()
On 07/20/2013 07:42 AM, NAVEEN KRISHNA CHATRADHI wrote:
Hello Sebastian,
Hello Naveen,
On Mon, Jul 22, 2013 at 07:49:26AM +0100, Chanho Park wrote:
This patch adds a dt-binding document for exynos rotator. It describes which
nodes should be defined to use the rotator.
Signed-off-by: Chanho Park chanho61.p...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Hi Chanho,
On 22 July 2013 13:42, Chanho Park chanho61.p...@samsung.com wrote:
The exynos4x12 has different address of GATE_IP_IMAGE reg. We should use
EXYNOS4X12_GATE_IP_IMAGE for g2d gating clocks instead of 4210's reg.
In case of mdma node, We don't use it for any exynos4 chipsets. I think
Presently, using exynos_defconfig with CONFIG_DEBUG_LL and CONFIG_EARLY_PRINTK
on, kernel is not booting, we are getting following:
[0.00] [ cut here ]
[0.00] kernel BUG at mm/vmalloc.c:1134!
[0.00] Internal error: Oops - BUG: 0 [#1] PREEMPT SMP ARM
Cc: Kukjin Kim kgene@samsung.com
Cc: linux-samsung-soc@vger.kernel.org
Signed-off-by: Lee Jones lee.jo...@linaro.org
---
arch/arm/boot/dts/exynos4210.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/exynos4210.dtsi
b/arch/arm/boot/dts/exynos4210.dtsi
Cc: Kukjin Kim kgene@samsung.com
Cc: linux-samsung-soc@vger.kernel.org
Signed-off-by: Lee Jones lee.jo...@linaro.org
---
arch/arm/boot/dts/exynos4x12.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/exynos4x12.dtsi
b/arch/arm/boot/dts/exynos4x12.dtsi
Cc: Kukjin Kim kgene@samsung.com
Cc: linux-samsung-soc@vger.kernel.org
Signed-off-by: Lee Jones lee.jo...@linaro.org
---
arch/arm/boot/dts/exynos5420.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/exynos5420.dtsi
b/arch/arm/boot/dts/exynos5420.dtsi
Cc: Kukjin Kim kgene@samsung.com
Cc: linux-samsung-soc@vger.kernel.org
Signed-off-by: Lee Jones lee.jo...@linaro.org
---
arch/arm/boot/dts/exynos5250.dtsi | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5250.dtsi
Cc: Kukjin Kim kgene@samsung.com
Cc: linux-samsung-soc@vger.kernel.org
Signed-off-by: Lee Jones lee.jo...@linaro.org
---
arch/arm/boot/dts/exynos5440.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/exynos5440.dtsi
b/arch/arm/boot/dts/exynos5440.dtsi
On 13 July 2013 04:57, Yadwinder Singh Brar yadi.b...@samsung.com wrote:
Presently, using exynos_defconfig with CONFIG_DEBUG_LL and CONFIG_EARLY_PRINTK
on, kernel is not booting, we are getting following:
[0.00] [ cut here ]
[0.00] kernel BUG at
Hi Thomas,
On Mon, Jul 22, 2013 at 4:53 PM, Thomas Abraham
thomas.abra...@linaro.org wrote:
On 13 July 2013 04:57, Yadwinder Singh Brar yadi.b...@samsung.com wrote:
Presently, using exynos_defconfig with CONFIG_DEBUG_LL and
CONFIG_EARLY_PRINTK
on, kernel is not booting, we are getting
On 06/24/2013 08:42 PM, Sylwester Nawrocki wrote:
The ISP clock registers belong to the ISP power domain and may change
their values if this power domain is switched off/on. Add
CLK_GET_RATE_NOCACHE flags to ensure we do not rely on invalid cached
data when setting or getting frequency of
-Original Message-
From: linux-samsung-soc-ow...@vger.kernel.org [mailto:linux-samsung-soc-
ow...@vger.kernel.org] On Behalf Of Chanho Park
Sent: Monday, July 22, 2013 3:49 PM
To: inki@samsung.com; kgene@samsung.com
Cc: jy0922.s...@samsung.com; sw0312@samsung.com;
-Original Message-
From: Mark Rutland [mailto:mark.rutl...@arm.com]
Sent: Monday, July 22, 2013 5:48 PM
To: Chanho Park
Cc: inki@samsung.com; kgene@samsung.com; linux-samsung-
s...@vger.kernel.org; jy0922.s...@samsung.com; devicetree-
disc...@lists.ozlabs.org;
Am Montag, den 22.07.2013, 21:37 +0900 schrieb Inki Dae:
-Original Message-
From: Mark Rutland [mailto:mark.rutl...@arm.com]
Sent: Monday, July 22, 2013 5:48 PM
To: Chanho Park
Cc: inki@samsung.com; kgene@samsung.com; linux-samsung-
s...@vger.kernel.org;
On Monday 22 of July 2013 06:23:06 Thomas Abraham wrote:
On 13 July 2013 04:57, Yadwinder Singh Brar yadi.b...@samsung.com
wrote:
Presently, using exynos_defconfig with CONFIG_DEBUG_LL and
CONFIG_EARLY_PRINTK on, kernel is not booting, we are getting
following:
[0.00]
-Original Message-
From: linux-samsung-soc-ow...@vger.kernel.org [mailto:linux-samsung-soc-
ow...@vger.kernel.org] On Behalf Of Lucas Stach
Sent: Monday, July 22, 2013 9:47 PM
To: Inki Dae
Cc: 'Mark Rutland'; 'Chanho Park'; linux-samsung-soc@vger.kernel.org;
Натуральная Кожа так же презенты от Hermes! http://kwn.me/b033
On 07/22/2013 03:31 PM, Inki Dae wrote:
---Original Message-
From: linux-samsung-soc-ow...@vger.kernel.org [mailto:linux-samsung-soc-
ow...@vger.kernel.org] On Behalf Of Lucas Stach
Sent: Monday, July 22, 2013 9:47 PM
To: Inki Dae
Cc: 'Mark Rutland'; 'Chanho Park';
Hi,
On Thursday 18 July 2013 10:51 AM, Jingoo Han wrote:
Exynos PCIe IP consists of Synopsys specific part and Exynos
specific part. Only core block is a Synopsys designware part;
other parts are Exynos specific.
Also, the Synopsys designware part can be shared with other
platforms; thus, it
On Mon, 22 Jul 2013, Kishon Vijay Abraham I wrote:
The PHY and the controller it is attached to are both physical
devices.
The connection between them is hardwired by the system
manufacturer and cannot be changed by software.
PHYs are generally described by
On Mon, Jul 22, 2013 at 12:55:18PM +0530, Kishon Vijay Abraham I wrote:
The issue (or one of the issues) in this discussion is that
Greg does not like the idea of using names or IDs to associate
PHYs with controllers, because they are too prone to
duplications or other
Hi Mark,
On Monday 15 of July 2013 18:11:24 Mark Brown wrote:
From: Mark Brown broo...@linaro.org
Platform using OF and some others don't have any dependencies on arch/arm
so can be built on any platform. Enable that for better compile coverage
when COMPILE_TEST is enabled.
Hi Padmavathi, Andrew,
On Wednesday 10 of July 2013 17:41:51 Padmavathi Venna wrote:
From: Andrew Bresticker abres...@chromium.org
This allows the input clocks to the Exynos AudioSS block to be specified
via device-tree bindings. Default names will be used when an input clock
is not given.
On Tuesday 16 of July 2013 12:22:14 Kukjin Kim wrote:
For EXYNOS SoCs, only can support for DT so removes non-DT stuff
in exynos-combiner.
Signed-off-by: Kukjin Kim kgene@samsung.com
---
drivers/irqchip/exynos-combiner.c | 44
+ 1 file changed, 1
On Tuesday 02 of July 2013 23:16:33 Alexander Shiyan wrote:
When CONFIG_S3C_BOOT_UART_FORCE_FIFO symbol is set, we should
enable FIFO but actually switch command is missing in the code.
This patch adds this switching.
Signed-off-by: Alexander Shiyan shc_w...@mail.ru
---
On Wednesday 17 of July 2013 11:08:16 Mark Brown wrote:
On Wed, Jul 17, 2013 at 05:54:11PM +0900, Jingoo Han wrote:
sdd-ops-request is unsigned int, not unsigned long.
Also, sdd-rx_dma.ch is a 'struct dma_chan *'.
Thus, (void *) is converted to (struct dma_chan *)(unsigned long),
in order
On Tuesday 16 of July 2013 16:09:24 Kukjin Kim wrote:
Heiko Stübner wrote:
This converts the mentioned platforms to use the newly introduced
driver
for the common clock framework for them.
With this the whole legacy clock structure can go away too.
Signed-off-by: Heiko Stuebner
On Sunday 21 of July 2013 21:42:45 Sylwester Nawrocki wrote:
This patch restores serial port operation which has been broken since
commit 60e93575476f90a72146b51283f514da655410a7
serial: samsung: enable clock before clearing pending interrupts during
init
That commit only uncovered the real
Hi Leela Krishna,
Looks mostly good, but see some comments inline.
On Monday 22 of July 2013 11:44:09 Leela Krishna Amudala wrote:
This patch removes the global variables in the driver file and
group them into a structure.
Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
---
On Monday 22 of July 2013 12:37:52 Kukjin Kim wrote:
Sachin Kamat wrote:
On 22 July 2013 07:18, Kukjin Kim kgene@samsung.com wrote:
Sachin Kamat wrote:
With the recent cleanup in Exynos platform code notably commits
17859bec (ARM: EXYNOS: Do not select legacy Kconfig symbols any
Quoting Sachin Kamat (2013-07-18 03:01:16)
Resending some of patches (1, 3 and 5) as per discussion in thread [1].
Other patches in the series are new.
[1] http://comments.gmane.org/gmane.linux.kernel.samsung-soc/19933
Changes since v1:
* Removed an unnecessary change in Patch 1 as
Quoting Tomasz Figa (2013-07-22 09:28:47)
Hi Padmavathi, Andrew,
On Wednesday 10 of July 2013 17:41:51 Padmavathi Venna wrote:
From: Andrew Bresticker abres...@chromium.org
This allows the input clocks to the Exynos AudioSS block to be specified
via device-tree bindings. Default
Hi Lee,
On Monday 22 of July 2013 11:52:26 Lee Jones wrote:
Cc: Kukjin Kim kgene@samsung.com
Cc: linux-samsung-soc@vger.kernel.org
Signed-off-by: Lee Jones lee.jo...@linaro.org
---
arch/arm/boot/dts/exynos4210.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
On Monday 22 of July 2013 16:00:22 Sylwester Nawrocki wrote:
On 07/22/2013 03:31 PM, Inki Dae wrote:
---Original Message-
From: linux-samsung-soc-ow...@vger.kernel.org
[mailto:linux-samsung-soc- ow...@vger.kernel.org] On Behalf Of
Lucas Stach
Sent: Monday, July 22, 2013 9:47
On Monday 22 of July 2013 15:49:25 Chanho Park wrote:
The exynos4 platform is only dt-based since 3.10, we should convert
driver data and ids to dt-based parsing methods. The rotator driver has
a limit table to get size limit. The minimum size of RGB888 format is 8
x 8 and maximum size is 8K x
On Sun, Jul 21, 2013 at 7:01 PM, Kukjin Kim kg...@kernel.org wrote:
Yes, this whole patches look good to me, and I'd like to take this whole
patches into the samsung tree...but need to get any response from PWM guy,
Thierry Reding. Let's wait for his response...
To be clarify, because his
On 07/22/2013 07:21 PM, Tomasz Figa wrote:
On Monday 22 of July 2013 12:37:52 Kukjin Kim wrote:
Sachin Kamat wrote:
On 22 July 2013 07:18, Kukjin Kimkgene@samsung.com wrote:
Sachin Kamat wrote:
With the recent cleanup in Exynos platform code notably commits
17859bec (ARM: EXYNOS: Do not
On Monday 22 of July 2013 11:15:30 Mike Turquette wrote:
Quoting Tomasz Figa (2013-07-22 09:28:47)
Hi Padmavathi, Andrew,
On Wednesday 10 of July 2013 17:41:51 Padmavathi Venna wrote:
From: Andrew Bresticker abres...@chromium.org
This allows the input clocks to the Exynos
On 07/22/2013 09:47 AM, Tomasz Figa wrote:
Hi Daniel,
On Monday 22 of July 2013 05:56:16 Daniel Lezcano wrote:
On 07/20/2013 02:04 AM, Tomasz Figa wrote:
In case of Samsung PWM timer, clocksource MMIO can not be used,
because
custom suspend/resume callbacks are required.
Signed-off-by:
On Monday 22 of July 2013 22:13:17 Daniel Lezcano wrote:
On 07/22/2013 09:47 AM, Tomasz Figa wrote:
Hi Daniel,
On Monday 22 of July 2013 05:56:16 Daniel Lezcano wrote:
On 07/20/2013 02:04 AM, Tomasz Figa wrote:
In case of Samsung PWM timer, clocksource MMIO can not be used,
because
This patch introduces new Samsung PWM driver, which uses Samsung
PWM/timer master driver to control shared parts of the hardware.
Signed-off-by: Tomasz Figa tomasz.f...@gmail.com
---
drivers/pwm/Makefile | 1 +
drivers/pwm/pwm-samsung.c | 611 ++
This patch adds new samsung_device_pwm platform device that represents
the whole PWM/timer block and includes memory and IRQ resources.
Signed-off-by: Tomasz Figa tomasz.f...@gmail.com
---
arch/arm/plat-samsung/devs.c | 17 +
PWM channel 4 has its autoreload bit located at different position. This
patch fixes the driver to account for that.
This fixes a problem with the clocksource hanging after it overflows because
it is not reloaded any more.
Signed-off-by: Tomasz Figa tomasz.f...@gmail.com
---
On 07/22/2013 09:43 AM, Tomasz Figa wrote:
On Monday 22 of July 2013 05:50:09 Daniel Lezcano wrote:
On 07/20/2013 02:04 AM, Tomasz Figa wrote:
PWM channel 4 has its autoreload bit located at different position.
This patch fixes the driver to account for that.
This fixes a problem with the
On Monday 22 of July 2013 22:56:44 Daniel Lezcano wrote:
On 07/22/2013 09:43 AM, Tomasz Figa wrote:
On Monday 22 of July 2013 05:50:09 Daniel Lezcano wrote:
On 07/20/2013 02:04 AM, Tomasz Figa wrote:
PWM channel 4 has its autoreload bit located at different position.
This patch fixes the
On 07/21/2013 06:44 PM, Grant Likely wrote:
On Sun, Jul 21, 2013 at 9:48 PM, Rob Herring robherri...@gmail.com wrote:
On 07/21/2013 09:42 AM, Rob Herring wrote:
On 07/19/2013 01:14 PM, Sebastian Andrzej Siewior wrote:
So I called of_platform_populate() on a device to get each child device
On 07/22/2013 11:11 PM, Tomasz Figa wrote:
On Monday 22 of July 2013 22:56:44 Daniel Lezcano wrote:
On 07/22/2013 09:43 AM, Tomasz Figa wrote:
On Monday 22 of July 2013 05:50:09 Daniel Lezcano wrote:
On 07/20/2013 02:04 AM, Tomasz Figa wrote:
PWM channel 4 has its autoreload bit located at
This patch adds soc_is_s3c6400() and soc_is_s3c6410() macros that allow
to distinguish between specific SoCs from s3c64xx series that is needed
to handle differences between them.
Signed-off-by: Tomasz Figa tomasz.f...@gmail.com
---
arch/arm/plat-samsung/include/plat/cpu.h | 4
1 file
This patch adds new, Common Clock Framework-based clock driver for Samsung
S3C64xx SoCs. The driver is just added, without actually letting the
platforms use it yet, since this requires more intermediate steps.
Signed-off-by: Tomasz Figa tomasz.f...@gmail.com
Acked-by: Mike Turquette
Some platforms have read-only clock muxes that are preconfigured at
reset and cannot be changed at runtime. This patch extends mux clock
driver to allow handling such read-only muxes by adding new
CLK_MUX_READ_ONLY mux flag.
Signed-off-by: Tomasz Figa tomasz.f...@gmail.com
---
This patch adds support for PLL6552 and PLL6553 PLLs present on Samsung
S3C64xx SoCs.
Signed-off-by: Tomasz Figa tomasz.f...@gmail.com
Acked-by: Mike Turquette mturque...@linaro.org
---
drivers/clk/samsung/clk-pll.c | 160 ++
drivers/clk/samsung/clk-pll.h
This series is an attempt to move clock support on Samsung S3C64xx SoCs
to Common Clock Framework.
First, support for PLL types present on S3C64xx SoCs is added to Samsung
Common Clock Framework driver. Then the main clock driver for mentioned
SoCs is introduced. Further patches contain fixes for
This patch removes old clock management code of S3C64xx, since the
platform has been already moved to the new clock driver using Common
Clock Framework.
Signed-off-by: Tomasz Figa tomasz.f...@gmail.com
---
arch/arm/mach-s3c64xx/clock.c | 1007 ---
This patch modifies s3c64xx DMA driver to prepare and unprepare clocks
in addition to enableind and disabling, since it is required by common
clock framework.
Signed-off-by: Tomasz Figa tomasz.f...@gmail.com
---
arch/arm/mach-s3c64xx/dma.c | 4 ++--
1 file changed, 2 insertions(+), 2
This patch modifies the ohci-s3c2410 driver to prepare and unprepare
clocks in addition to enabling and disabling, since it is required
by common clock framework.
Signed-off-by: Tomasz Figa tomasz.f...@gmail.com
---
drivers/usb/host/ohci-s3c2410.c | 8
1 file changed, 4 insertions(+), 4
This patch migrates the s3c64xx platform to use the new clock driver
using Common Clock Framework.
Signed-off-by: Tomasz Figa tomasz.f...@gmail.com
---
arch/arm/Kconfig | 2 +-
arch/arm/mach-s3c64xx/Makefile| 2 +-
arch/arm/mach-s3c64xx/common.c| 21
On Mon, Jul 22, 2013 at 8:49 PM, Tomasz Figa tomasz.f...@gmail.com wrote:
dev_dbg(dev-dev, s3c2410_start_hc:\n);
- clk_enable(usb_clk);
+ clk_prepare_enable(usb_clk);
clk_prepare_enable may fail, so you would better check its return value.
--
To unsubscribe from this
-Original Message-
From: Sachin Kamat [mailto:sachin.ka...@linaro.org]
Sent: Monday, July 22, 2013 7:01 PM
To: Chanho Park
Cc: mturque...@linaro.org; kgene@samsung.com;
thomas.abra...@linaro.org; t.f...@samsung.com; linux-arm-
ker...@lists.infradead.org;
On Monday 22 of July 2013 21:15:12 Fabio Estevam wrote:
On Mon, Jul 22, 2013 at 8:49 PM, Tomasz Figa tomasz.f...@gmail.com
wrote:
dev_dbg(dev-dev, s3c2410_start_hc:\n);
- clk_enable(usb_clk);
+ clk_prepare_enable(usb_clk);
clk_prepare_enable may fail, so you
On Tuesday, July 23, 2013 12:04 AM, Kishon Vijay Abraham I wrote:
On Thursday 18 July 2013 10:51 AM, Jingoo Han wrote:
Exynos PCIe IP consists of Synopsys specific part and Exynos
specific part. Only core block is a Synopsys designware part;
other parts are Exynos specific.
Also, the
Hi Mark,
Thank you for your review.
-Original Message-
From: Mark Rutland [mailto:mark.rutl...@arm.com]
Sent: Monday, July 22, 2013 5:48 PM
To: Chanho Park
Cc: inki@samsung.com; kgene@samsung.com; linux-samsung-
s...@vger.kernel.org; jy0922.s...@samsung.com; devicetree-
Quoting Vikas Sajjan (2013-07-21 23:15:27)
Hi Kukjin / Mike,
Can you apply this series
Let me apply this to see if the dependencies are taken care of now. If
so I'll just take it through the clk tree.
Regards,
Mike
On Tue, Jul 16, 2013 at 7:10 PM, Yadwinder Singh Brar
-Original Message-
From: linux-samsung-soc-ow...@vger.kernel.org [mailto:linux-samsung-soc-
ow...@vger.kernel.org] On Behalf Of Tomasz Figa
Sent: Tuesday, July 23, 2013 4:29 AM
To: Sylwester Nawrocki
Cc: Inki Dae; 'Chanho Park'; 'Lucas Stach'; 'Mark Rutland'; linux-samsung-
-Original Message-
From: Inki Dae [mailto:inki@samsung.com]
Sent: Tuesday, July 23, 2013 10:36 AM
To: 'Chanho Park'; 'Mark Rutland'; 'Chanho Park'
Cc: kgene@samsung.com; linux-samsung-soc@vger.kernel.org;
jy0922.s...@samsung.com; sw0312@samsung.com; dri-
On 22 July 2013 23:35, Mike Turquette mturque...@linaro.org wrote:
Quoting Sachin Kamat (2013-07-18 03:01:16)
Resending some of patches (1, 3 and 5) as per discussion in thread [1].
Other patches in the series are new.
[1] http://comments.gmane.org/gmane.linux.kernel.samsung-soc/19933
Hi Leela,
On 22 July 2013 11:44, Leela Krishna Amudala l.kris...@samsung.com wrote:
This patch removes the global variables in the driver file and
group them into a structure.
Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
---
Note: This patch is rebased on kgene's for-next
On 23 July 2013 01:06, Sylwester Nawrocki sylvester.nawro...@gmail.com wrote:
On 07/22/2013 07:21 PM, Tomasz Figa wrote:
On Monday 22 of July 2013 12:37:52 Kukjin Kim wrote:
Sachin Kamat wrote:
On 22 July 2013 07:18, Kukjin Kimkgene@samsung.com wrote:
Sachin Kamat wrote:
With the
Hi Mark,
On Fri, Jul 12, 2013 at 2:19 PM, Mark Brown broo...@kernel.org wrote:
On Fri, Jul 12, 2013 at 10:07:22AM +0530, Padma Venkat wrote:
A new version number is added when a there was some change in the IP
like adding a internal mux to the IP, adding multi channel support,
adding reset
On 7/23/2013 6:44 AM, Jingoo Han wrote:
+ if (restype == IORESOURCE_MEM) {
+ of_pci_range_to_resource(range, np, pp-mem);
+ pp-mem.name = MEM;
+ pp-config.mem_size = resource_size(pp-mem);
+
Hi,
On Monday 22 July 2013 08:34 PM, Greg KH wrote:
On Mon, Jul 22, 2013 at 12:55:18PM +0530, Kishon Vijay Abraham I wrote:
The issue (or one of the issues) in this discussion is that
Greg does not like the idea of using names or IDs to associate
PHYs with controllers, because
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