Hi,
On 04/11/2014 10:46 AM, Olof Johansson wrote:
> On Thu, Apr 10, 2014 at 06:37:12PM +0900, Chanwoo Choi wrote:
>> This patch add Exynos3250's SoC ID. Exynos 3250 is System-On-Chip(SoC) that
>> is based on the 32-bit RISC processor for Smartphone. Exynos3250 uses
>> Cortex-A7
>> dual cores and
Hi Sachin,
On 04/11/2014 02:56 PM, Sachin Kamat wrote:
> Hi Chanwoo,
>
> On 11 April 2014 11:24, Chanwoo Choi wrote:
>> Hi Sachin,
>>
>> On 04/11/2014 12:56 PM, Sachin Kamat wrote:
>>> Hi Chanwoo,
>>>
>>> On 10 April 2014 15:07, Chanwoo Choi wrote:
This patch add Exynos3250's SoC ID. Exyno
Hi,
On 04/11/2014 2:14 PM, Chanwoo Choi wrote:
> >> {
> >> - exynos_smc(SMC_CMD_CPU1BOOT, cpu, 0, 0);
> >> + if (soc_is_exynos4212())
> >> + exynos_smc(SMC_CMD_CPU1BOOT, 0, 0, 0);
> >> + else
> >> + exynos_smc(SMC_CMD_CPU1BOOT, cpu, 0, 0);
> >
> > /* */
>
> It's better
Hi Chanwoo,
On 11 April 2014 11:24, Chanwoo Choi wrote:
> Hi Sachin,
>
> On 04/11/2014 12:56 PM, Sachin Kamat wrote:
>> Hi Chanwoo,
>>
>> On 10 April 2014 15:07, Chanwoo Choi wrote:
>>> This patch add Exynos3250's SoC ID. Exynos 3250 is System-On-Chip(SoC) that
>>> is based on the 32-bit RISC pr
Hi Sachin,
On 04/11/2014 12:56 PM, Sachin Kamat wrote:
> Hi Chanwoo,
>
> On 10 April 2014 15:07, Chanwoo Choi wrote:
>> This patch add Exynos3250's SoC ID. Exynos 3250 is System-On-Chip(SoC) that
>> is based on the 32-bit RISC processor for Smartphone. Exynos3250 uses
>> Cortex-A7
>> dual cores
On 04/02/2014 08:27 PM, Sylwester Nawrocki wrote:
Hi,
On 02/04/14 09:50, Pankaj Dubey wrote:
From: Young-Gun Jang
While making PMU (Power Mengement Unit) implementation device tree based,
there are few offsets related with SYSREG present in regs-pmu.h, so let's
make a new header file "regs-sy
Hi Bartlomiej,
Thanks for review.
On 04/03/2014 08:56 PM, Bartlomiej Zolnierkiewicz wrote:
Hi,
On Wednesday, April 02, 2014 05:24:44 PM Pankaj Dubey wrote:
From: Younggun Jang
This driver is mainly used for setting misc bits of register from PMU IP
of Exynos SoC which will be required to co
Hi,
On 04/11/2014 10:44 AM, Olof Johansson wrote:
> On Thu, Apr 10, 2014 at 06:37:15PM +0900, Chanwoo Choi wrote:
>> From: Kyungmin Park
>>
>> This patch fix the offset of CPU boot address and change parameter of smc
>> call
>> of SMC_CMD_CPU1BOOT command for Exynos4212.
>>
>> Signed-off-by: Kyu
Hi,
On 04/11/2014 01:03 PM, Sachin Kamat wrote:
> On 10 April 2014 15:36, Chanwoo Choi wrote:
>> This patch add UART dt node for Exynos3250. Exynos3250 uses same UART IP
>> of Exynos4 SoC and has only two independent channels.
>>
>> Signed-off-by: Chanwoo Choi
>> [Fix incorrect clock id by Tomas
Hi,
On 04/11/2014 01:01 PM, Sachin Kamat wrote:
> Hi Chanwoo,
>
> On 10 April 2014 15:36, Chanwoo Choi wrote:
>> From: Tomasz Figa
>>
>> This patch add new exynos3250.dtsi to support Exynos3250 SoC and includes
>> chipid/sys_reg dt node.
>>
>> Signed-off-by: Tomasz Figa
>> Signed-off-by: Chanw
Hi,
On 04/11/2014 01:00 PM, Olof Johansson wrote:
> On Thu, Apr 10, 2014 at 07:06:02PM +0900, Chanwoo Choi wrote:
>> This patch add interrupt-parent node to connected with GIC.
>> All interrupt-related dt nodes need default interrupt-parent node.
>>
>> Signed-off-by: Chanwoo Choi
>> Signed-off-by
On 10 April 2014 15:36, Chanwoo Choi wrote:
> This patch add UART dt node for Exynos3250. Exynos3250 uses same UART IP
> of Exynos4 SoC and has only two independent channels.
>
> Signed-off-by: Chanwoo Choi
> [Fix incorrect clock id by Tomasz Figa]
> Signed-off-by: Tomasz Figa
> Signed-off-by: K
Hi Chanwoo,
On 10 April 2014 15:36, Chanwoo Choi wrote:
> From: Tomasz Figa
>
> This patch add new exynos3250.dtsi to support Exynos3250 SoC and includes
> chipid/sys_reg dt node.
>
> Signed-off-by: Tomasz Figa
> Signed-off-by: Chanwoo Choi
> Signed-off-by: Kyungmin Park
> ---
> arch/arm/boo
On Thu, Apr 10, 2014 at 07:06:02PM +0900, Chanwoo Choi wrote:
> This patch add interrupt-parent node to connected with GIC.
> All interrupt-related dt nodes need default interrupt-parent node.
>
> Signed-off-by: Chanwoo Choi
> Signed-off-by: Kyungmin Park
There's no point in splitting these off
Hi Chanwoo,
On 10 April 2014 15:07, Chanwoo Choi wrote:
> This patch add Exynos3250's SoC ID. Exynos 3250 is System-On-Chip(SoC) that
> is based on the 32-bit RISC processor for Smartphone. Exynos3250 uses
> Cortex-A7
> dual cores and has a target speed of 1.0GHz.
>
> Signed-off-by: Chanwoo Choi
Thanks Tomasz,
On 10 April 2014 22:47, Tomasz Figa wrote:
> Hi Rahul,
>
> On 02.04.2014 19:13, Rahul Sharma wrote:
>>
>> From: Rahul Sharma
>>
>> Previous SoCs have hdmi phys which are accessible through
>> dedicated i2c lines. Newer SoCs have Apb mapped hdmi phys.
>> Hdmi driver is modified to
On 04/11/2014 10:48 AM, Olof Johansson wrote:
> On Thu, Apr 10, 2014 at 06:37:14PM +0900, Chanwoo Choi wrote:
>> This patch add memory mapping for PMU (Power Management Unit) which is used
>> for power control of Exynos3250.
>>
>> Signed-off-by: Chanwoo Choi
>> Signed-off-by: Kyungmin Park
>
> S
This patch control special clock for ADC in Exynos series's FSYS block.
If special clock of ADC is registerd on clock list of common clk framework,
Exynos ADC drvier have to control this clock.
Exynos3250/Exynos4/Exynos5 has 'adc' clock as following:
- 'adc' clock: bus clock for ADC
Exynos3250 ha
Thanks Tomasz,
This patch is not longer required after rebasing to Tomasz Stanislawski's
Simple Phy patches.
Regards,
Rahul Sharma.
On 10 April 2014 22:30, Tomasz Figa wrote:
> Hi Rahul,
>
> On 02.04.2014 19:13, Rahul Sharma wrote:
>>
>> From: Rahul Sharma
>>
>> Hdmiphy control bit needs to be
Hi Tomasz,
On 10 April 2014 21:02, Tomasz Figa wrote:
> Hi Rahul,
>
> On 02.04.2014 19:13, Rahul Sharma wrote:
>>
>> From: Rahul Sharma
>>
>> Exynos drm hdmi driver used to get dummy hdmiphy clock to
>> control the PMU bit for hdmiphy. This clock is removed
>> during CCF migration. This should a
On Thu, Apr 10, 2014 at 06:37:14PM +0900, Chanwoo Choi wrote:
> This patch add memory mapping for PMU (Power Management Unit) which is used
> for power control of Exynos3250.
>
> Signed-off-by: Chanwoo Choi
> Signed-off-by: Kyungmin Park
Signed-off-by is in the wrong order, if Kyungmin wrote th
On Thu, Apr 10, 2014 at 06:37:12PM +0900, Chanwoo Choi wrote:
> This patch add Exynos3250's SoC ID. Exynos 3250 is System-On-Chip(SoC) that
> is based on the 32-bit RISC processor for Smartphone. Exynos3250 uses
> Cortex-A7
> dual cores and has a target speed of 1.0GHz.
>
> Signed-off-by: Chanwoo
On Thu, Apr 10, 2014 at 06:37:15PM +0900, Chanwoo Choi wrote:
> From: Kyungmin Park
>
> This patch fix the offset of CPU boot address and change parameter of smc call
> of SMC_CMD_CPU1BOOT command for Exynos4212.
>
> Signed-off-by: Kyungmin Park
> ---
> arch/arm/mach-exynos/firmware.c | 14 +++
Hi,
On 04/10/2014 06:43 PM, Arnd Bergmann wrote:
> On Thursday 10 April 2014 18:28:18 Chanwoo Choi wrote:
>> This patch add Exynos3250's SoC ID. Exynos 3250 is System-On-Chip(SoC) that
>> is based on the 32-bit RISC processor for Smartphone. Exynos3250 uses
>> Cortex-A7
>> dual cores and has a ta
Hi,
On 04/11/2014 04:17 AM, Tomasz Figa wrote:
> Hi,
>
> On 10.04.2014 20:42, Linus Walleij wrote:
>> On Thu, Apr 10, 2014 at 11:28 AM, Chanwoo Choi wrote:
>>
>>> From: Tomasz Figa
>>>
>>> This patch adds driver data (bank list and EINT layout) for Exynos3250
>>> to pinctrl-exynos driver. Exyn
On 04/10/2014 09:07 PM, Marc Zyngier wrote:
> On Thu, Apr 10 2014 at 11:56:33 am BST, Chanwoo Choi
> wrote:
>> On 04/10/2014 06:51 PM, Marc Zyngier wrote:
>>> On Thu, Apr 10 2014 at 10:28:23 am BST, Chanwoo Choi
>>> wrote:
This patch decide proper lowpower mode of either a15 or a9 accordin
Hi,
On 10.04.2014 20:42, Linus Walleij wrote:
On Thu, Apr 10, 2014 at 11:28 AM, Chanwoo Choi wrote:
From: Tomasz Figa
This patch adds driver data (bank list and EINT layout) for Exynos3250
to pinctrl-exynos driver. Exynos3250 includes 158 multi-functional input/output
ports. There are 23 ge
On Thu, Apr 10, 2014 at 11:28 AM, Chanwoo Choi wrote:
> From: Tomasz Figa
>
> This patch adds driver data (bank list and EINT layout) for Exynos3250
> to pinctrl-exynos driver. Exynos3250 includes 158 multi-functional
> input/output
> ports. There are 23 general port groups.
>
> Signed-off-by:
Hi Rahul,
On 02.04.2014 19:13, Rahul Sharma wrote:
From: Rahul Sharma
Previous SoCs have hdmi phys which are accessible through
dedicated i2c lines. Newer SoCs have Apb mapped hdmi phys.
Hdmi driver is modified to support apb mapped phys.
Signed-off-by: Rahul Sharma
---
drivers/gpu/drm/exy
On 02.04.2014 19:13, Rahul Sharma wrote:
From: Rahul Sharma
Cleaning up unnecessary i2c read call after hdmiphy configuration.
This check is redundant since check for hdmiphy pll lock status
confirms the correct settings for phy.
Signed-off-by: Rahul Sharma
Signed-off-by: Daniel Kurtz
---
Hi Rahul,
On 02.04.2014 19:13, Rahul Sharma wrote:
From: Rahul Sharma
Hdmiphy control bit needs to be set before setting the resolution
to hdmi hardware. This was handled using dummy hdmiphy clock which
is removed now.
PMU is already defined as system controller for exynos SoC. Registers
of P
On 10.04.2014 16:23, Daniel Lezcano wrote:
On 04/10/2014 03:57 PM, Tomasz Figa wrote:
Hi Daniel,
On 10.04.2014 11:55, Daniel Lezcano wrote:
One more step is moving the clock ratio setting at idle time in pm.c
The macro names have been changed to be consistent with the other macros
name in the
Hi Rahul,
On 02.04.2014 19:13, Rahul Sharma wrote:
From: Rahul Sharma
Exynos drm hdmi driver used to get dummy hdmiphy clock to
control the PMU bit for hdmiphy. This clock is removed
during CCF migration. This should also be cleaned from
hdmi driver.
Signed-off-by: Rahul Sharma
---
drivers
On Thu, 10 Apr 2014, Vivek Gautam wrote:
> Patch 'b8efdaf USB: EHCI: add check for wakeup/suspend race'
> adds a check for possible race between suspend and wakeup interrupt,
> and thereby it returns -EBUSY as error code if there's a wakeup
> interrupt.
> So the platform host controller should not
On Thu, 10 Apr 2014, Vivek Gautam wrote:
> Patch 'b8efdaf USB: EHCI: add check for wakeup/suspend race'
> adds a check for possible race between suspend and wakeup interrupt,
> and thereby it returns -EBUSY as error code if there's a wakeup
> interrupt.
> So the platform host controller should not
On 04/10/2014 03:57 PM, Tomasz Figa wrote:
Hi Daniel,
On 10.04.2014 11:55, Daniel Lezcano wrote:
One more step is moving the clock ratio setting at idle time in pm.c
The macro names have been changed to be consistent with the other macros
name in the file.
Note, the clock divider was working
Hi Daniel,
On 10.04.2014 11:55, Daniel Lezcano wrote:
One more step is moving the clock ratio setting at idle time in pm.c
The macro names have been changed to be consistent with the other macros
name in the file.
Note, the clock divider was working only when cpuidle was enabled because it
was
Add support to consume phy provided by Generic phy framework.
Keeping the support for older usb-phy intact right now, in order
to prevent any functionality break in absence of relevant
device tree side change for ohci-exynos.
Once we move to new phy in the device nodes for ohci, we can
remove the s
On Thu, Apr 10, 2014 at 11:04:59AM +0100, Marc Zyngier wrote:
> On Thu, Apr 10 2014 at 10:28:24 am BST, Chanwoo Choi
> wrote:
> > This patch declare coretex-a7's irqchip to initialze gic from dt
> > with "arm,cortex-a7-gic" data.
> >
> > Cc: Thomas Gleixner
> > Signed-off-by: Chanwoo Choi
> > S
Updated as per the user manual.
Signed-off-by: Sachin Kamat
---
arch/arm/boot/dts/exynos5420.dtsi |6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5420.dtsi
b/arch/arm/boot/dts/exynos5420.dtsi
index c3a9a66c5767..6f662b5cc90d 100644
--- a/arch
Hi,
Zhang, could you please review/merge this patchset?
[ We have been waiting for a review for over 3 months now.. ]
Best regards,
--
Bartlomiej Zolnierkiewicz
Samsung R&D Institute Poland
Samsung Electronics
On Friday, February 07, 2014 03:03:46 PM Naveen Krishna Ch wrote:
> Hello All,
>
>
On 10 April 2014 18:02, Tomasz Figa wrote:
> On 10.04.2014 11:22, Sachin Kamat wrote:
>>
>> Hi Tomasz,
>>
>> On 10 April 2014 14:47, Tomasz Figa wrote:
>>>
>>> Hi Sachin,
>>>
>>>
>>> On 10.04.2014 10:24, Sachin Kamat wrote:
'exynos_subsys' is now local to this file. Make it static
On 10.04.2014 11:22, Sachin Kamat wrote:
Hi Tomasz,
On 10 April 2014 14:47, Tomasz Figa wrote:
Hi Sachin,
On 10.04.2014 10:24, Sachin Kamat wrote:
'exynos_subsys' is now local to this file. Make it static
and remove the declaration from header file.
Signed-off-by: Sachin Kamat
---
arc
Hi,
Zhang, could you please pick this patch up to your tree?
[ Eduardos's tree hasn't been updated for over 4 months and
seems to be dead.. ]
Best regards,
--
Bartlomiej Zolnierkiewicz
Samsung R&D Institute Poland
Samsung Electronics
On Tuesday, November 26, 2013 09:22:31 AM Eduardo Valentin
On Thu, Apr 10 2014 at 11:56:33 am BST, Chanwoo Choi
wrote:
> On 04/10/2014 06:51 PM, Marc Zyngier wrote:
>> On Thu, Apr 10 2014 at 10:28:23 am BST, Chanwoo Choi
>> wrote:
>>> This patch decide proper lowpower mode of either a15 or a9 according to own
>>> ID
>>> from Main ID register.
>>>
>>>
On Wed, Apr 9, 2014 at 7:03 PM, Tomasz Figa wrote:
> On 09.04.2014 13:49, Vivek Gautam wrote:
>>
>> Hi,
>>
>>
>> On Wed, Apr 9, 2014 at 4:36 PM, Tomasz Figa wrote:
>>>
>>> Hi Vivek,
>>>
>>> Please see my comments inline.
>>>
>>>
>>> On 08.04.2014 16:36, Vivek Gautam wrote:
Add a ne
Hi,
On 04/10/2014 07:23 PM, Chanho Park wrote:
> Hi,
>
>> -Original Message-
>> From: linux-arm-kernel [mailto:linux-arm-kernel-
>> boun...@lists.infradead.org] On Behalf Of Chanwoo Choi
>> Sent: Thursday, April 10, 2014 7:06 PM
>> To: kgene@samsung.com; t.f...@samsung.com; linux-sams
Hi,
On Wed, Apr 9, 2014 at 6:08 PM, Tomasz Figa wrote:
> Hi,
>
>
> On 09.04.2014 14:24, Vivek Gautam wrote:
>>
>> Hi Sylwester,
>>
>>
>> On Wed, Apr 9, 2014 at 5:41 PM, Sylwester Nawrocki
>> wrote:
>>>
>>> Hi Vivek,
>>>
>>> On 09/04/14 13:54, Vivek Gautam wrote:
Adding support to enab
On 04/10/2014 06:51 PM, Marc Zyngier wrote:
> On Thu, Apr 10 2014 at 10:28:23 am BST, Chanwoo Choi
> wrote:
>> This patch decide proper lowpower mode of either a15 or a9 according to own
>> ID
>> from Main ID register.
>>
>> Signed-off-by: Chanwoo Choi
>> Signed-off-by: Kyungmin Park
>> ---
>>
On Thu, Apr 10 2014 at 11:42:56 am BST, armdev wrote:
> On 10-Apr-2014, at 4:11 pm, Marc Zyngier wrote:
>
>> On Thu, Apr 10 2014 at 11:30:41 am BST, armdev wrote:
>>> On 10-Apr-2014, at 3:51 pm, Marc Zyngier wrote:
>>>
On Thu, Apr 10 2014 at 11:09:02 am BST, armdev
wrote:
> On
On Thu, Apr 10 2014 at 11:37:12 am BST, Chanho Park
wrote:
> Hi,
>
>> -Original Message-
>> From: linux-arm-kernel [mailto:linux-arm-kernel-
>> boun...@lists.infradead.org] On Behalf Of Marc Zyngier
>> Sent: Thursday, April 10, 2014 7:05 PM
>> To: Chanwoo Choi
>> Cc: mark.rutl...@arm.com;
On 10-Apr-2014, at 4:11 pm, Marc Zyngier wrote:
> On Thu, Apr 10 2014 at 11:30:41 am BST, armdev wrote:
>> On 10-Apr-2014, at 3:51 pm, Marc Zyngier wrote:
>>
>>> On Thu, Apr 10 2014 at 11:09:02 am BST, armdev wrote:
On 10-Apr-2014, at 3:34 pm, Marc Zyngier wrote:
> On Thu, Ap
On Thu, Apr 10 2014 at 11:30:41 am BST, armdev wrote:
> On 10-Apr-2014, at 3:51 pm, Marc Zyngier wrote:
>
>> On Thu, Apr 10 2014 at 11:09:02 am BST, armdev wrote:
>>> On 10-Apr-2014, at 3:34 pm, Marc Zyngier wrote:
>>>
On Thu, Apr 10 2014 at 10:28:24 am BST, Chanwoo Choi
wrote:
>>>
On 04/10/2014 06:40 PM, Arnd Bergmann wrote:
> On Thursday 10 April 2014 18:28:23 Chanwoo Choi wrote:
>> +* while Exynos5 is A15/Exynos7 is A7; check the CPU part
>>
>
> Exynos7 -> Exynos3 ?
>
You're right. I'll fix it.
Best Regards,
Chanwoo Choi
--
To unsubscribe from this list: send
Hi,
> -Original Message-
> From: linux-arm-kernel [mailto:linux-arm-kernel-
> boun...@lists.infradead.org] On Behalf Of Marc Zyngier
> Sent: Thursday, April 10, 2014 7:05 PM
> To: Chanwoo Choi
> Cc: mark.rutl...@arm.com; linux-samsung-soc@vger.kernel.org;
> t.f...@samsung.com; hyunhee@
Hi Kishon,
On Thu, Apr 10, 2014 at 2:39 PM, Kishon Vijay Abraham I wrote:
> Hi.
>
> On Wednesday 09 April 2014 05:24 PM, Vivek Gautam wrote:
>> Adding support to enable/disable VBUS hooked to a gpio
>> to enable vbus supply on the port.
>>
>> Signed-off-by: Vivek Gautam
>> ---
>>
>> Based on 'p
On 10-Apr-2014, at 3:51 pm, Marc Zyngier wrote:
> On Thu, Apr 10 2014 at 11:09:02 am BST, armdev wrote:
>> On 10-Apr-2014, at 3:34 pm, Marc Zyngier wrote:
>>
>>> On Thu, Apr 10 2014 at 10:28:24 am BST, Chanwoo Choi
>>> wrote:
This patch declare coretex-a7's irqchip to initialze gic fro
Patch 'b8efdaf USB: EHCI: add check for wakeup/suspend race'
adds a check for possible race between suspend and wakeup interrupt,
and thereby it returns -EBUSY as error code if there's a wakeup
interrupt.
So the platform host controller should not proceed further with
its suspend callback, rather s
Patch 'b8efdaf USB: EHCI: add check for wakeup/suspend race'
adds a check for possible race between suspend and wakeup interrupt,
and thereby it returns -EBUSY as error code if there's a wakeup
interrupt.
So the platform host controller should not proceed further with
its suspend callback, rather s
Hi,
> -Original Message-
> From: linux-arm-kernel [mailto:linux-arm-kernel-
> boun...@lists.infradead.org] On Behalf Of Chanwoo Choi
> Sent: Thursday, April 10, 2014 7:06 PM
> To: kgene@samsung.com; t.f...@samsung.com; linux-samsung-
> s...@vger.kernel.org
> Cc: hyunhee@samsung.com
On Thu, Apr 10 2014 at 11:09:02 am BST, armdev wrote:
> On 10-Apr-2014, at 3:34 pm, Marc Zyngier wrote:
>
>> On Thu, Apr 10 2014 at 10:28:24 am BST, Chanwoo Choi
>> wrote:
>>> This patch declare coretex-a7's irqchip to initialze gic from dt
>>> with "arm,cortex-a7-gic" data.
>>>
>>> Cc: Thomas
From: Tomasz Figa
This patch adds device tree nodes for pin controllers of Exynos3250
along with definitions of pin banks, external interrupt layout and
avaiable functions.
Signed-off-by: Tomasz Figa
[Fix bug about pinctrl lable by Chanwoo Choi]
Signed-off-by: Chanwoo Choi
[Fix the sd_bus8 gpi
From: Tomasz Figa
This patch add new the clock drvier of Exynos3250 SoC based on Cortex-A7
using common clock framework. The CMU (Clock Management Unit) of Exynos3250
control PLLs(Phase Locked Loops) and generate system clocks for CPU, buses,
and function clocks for individual IPs.
The CMU of Ex
From: Tomasz Figa
This patch add new exynos3250.dtsi to support Exynos3250 SoC and includes
chipid/sys_reg dt node.
Signed-off-by: Tomasz Figa
Signed-off-by: Chanwoo Choi
Signed-off-by: Kyungmin Park
---
arch/arm/boot/dts/exynos3250.dtsi | 34 ++
1 file change
From: Tomasz Figa
This patch add dt node of clock controllers to support Exynos3250 SoC.
Exynos3250's clock drvier divide into two scope for clock controller as
following:
- 'cmu' clock-controller includes CMU_LEFTBUS/RIGHTBUS/TOP/CPU/ISP/ACP clocks
Signed-off-by: Tomasz Figa
[Modify base addr
From: Tomasz Figa
This patch add rtc dt node for Real Time Clock (RTC) which operates with
a backup battery when the system is off and performs the function of an alarm.
Exynos3250's RTC has following rtc interrupt
- ALARM_INT (alarm interrupt)
- ALAREM_WK (alarm wake-up)
Signed-off-by: Tomasz
From: Hyunhee Kim
ARM CPU has its own PMU (Performance Monitoring Unit). This patch add PMU dt
data to support PMU for CPU. Exynos3250 has four PMU interrupts.
Signed-off-by: Hyunhee Kim
Signed-off-by: Kyungmin Park
---
arch/arm/boot/dts/exynos3250.dtsi | 5 +
1 file changed, 5 insertions
This patch add CPUs dt node for Exynos3250 which uses the Cortex-A7 dual core.
Signed-off-by: Chanwoo Choi
Signed-off-by: Kyungmin Park
---
arch/arm/boot/dts/exynos3250.dtsi | 17 +
1 file changed, 17 insertions(+)
diff --git a/arch/arm/boot/dts/exynos3250.dtsi
b/arch/arm/boot
From: Inki Dae
This patch add CAM/MFC/G3D/LCD0/ISP power domain nodes for Exynos3250.
Signed-off-by: Inki Dae
[add CAM/MFC power domain node by Bartlomiej Zolnierkiewicz]
Signed-off-by: Bartlomiej Zolnierkiewicz
[add ISP power domain node by Bartlomiej Zolnierkiewicz]
Signed-off-by: Chanwoo Ch
From: Tomasz Figa
This patch add pwm dt node to support PWM (Pulse Width Modulation) timer.
Exynos uses same IP of Exynos4210 and has five 32-bit PWM timers.
Signed-off-by: Tomasz Figa
Signed-off-by: Kyungmin Park
---
arch/arm/boot/dts/exynos3250.dtsi | 9 +
1 file changed, 9 insertio
From: Tomasz Figa
This patch add amba and pdma dt node to support bus on Exynos3250.
Signed-off-by: Tomasz Figa
Signed-off-by: Kyungmin Park
---
arch/arm/boot/dts/exynos3250.dtsi | 30 ++
1 file changed, 30 insertions(+)
diff --git a/arch/arm/boot/dts/exynos3250.d
From: Inki Dae
Add the DTS nodes for all th i2c busses in the Exynos3250 SoC.
Signed-off-by: Inki Dae
[Add i2c alias by Tomasz Figa]
Signed-off-by: Tomasz Figa
Signed-off-by: Kyungmin Park
---
arch/arm/boot/dts/exynos3250.dtsi | 112 ++
1 file changed, 112
This patch add UART dt node for Exynos3250. Exynos3250 uses same UART IP
of Exynos4 SoC and has only two independent channels.
Signed-off-by: Chanwoo Choi
[Fix incorrect clock id by Tomasz Figa]
Signed-off-by: Tomasz Figa
Signed-off-by: Kyungmin Park
---
arch/arm/boot/dts/exynos3250.dtsi | 18
From: Tomasz Figa
This allows proper ordering of clock registration and is still correct,
because list of external clocks is SoC-specific, just their frequencies
and availability are board-specific.
Signed-off-by: Tomasz Figa
Signed-off-by: Hyunhee Kim
Signed-off-by: Kyungmin Park
---
arch/a
From: Kyungmin Park
This patch add MSHC (Mobile Storage Host Controller) dt node which is an
interface between the system and SD/MMC card. mshc dt node is used for dw_mmc
device driver to operate SD/MMC card.
Signed-off-by: Kyungmin Park
[Modify the sdr/ddr timing for eMMC by Jaehoon Chung]
Sig
On 10-Apr-2014, at 3:34 pm, Marc Zyngier wrote:
> On Thu, Apr 10 2014 at 10:28:24 am BST, Chanwoo Choi
> wrote:
>> This patch declare coretex-a7's irqchip to initialze gic from dt
>> with "arm,cortex-a7-gic" data.
>>
>> Cc: Thomas Gleixner
>> Signed-off-by: Chanwoo Choi
>> Signed-off-by: Ky
This patch add ADC (Analog to Digital Converter) dt node to get raw data with
IIO subsystem. Usually, ADC is used to check temperature, jack type and so on.
Exynos3250 includes ADCv2 which is different from ADCv1 for Exynos4 SoC.
Signed-off-by: Chanwoo Choi
Signed-off-by: Kyungmin Park
---
arch
This patch add MCT (Multi Core Timer) dt node with "samsung,exynos4210-mct"
compatible name bacause Exynos3250 uses SPI interrput type. And Exynos3250
provide one global timer and four local timers for Multi Core CPU.
Signed-off-by: Chanwoo Choi
[Fix incorrect irq number of MCT and remove unneces
This patch add interrupt-parent node to connected with GIC.
All interrupt-related dt nodes need default interrupt-parent node.
Signed-off-by: Chanwoo Choi
Signed-off-by: Kyungmin Park
---
arch/arm/boot/dts/exynos3250.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/exy
From: Tomasz Figa
This patch add spi dt node to support SPI (Serial Peripheral Interface) bus.
SPI in Exynos3250 transfers serial data by using various peripherals. Exynos3250
has two independent interface (spi0/1).
Signed-off-by: Tomasz Figa
Signed-off-by: Kyungmin Park
---
arch/arm/boot/dts
From: Tomasz Figa
This patch adds device tree node for GIC interrupt controller
on Exynos3250.
Signed-off-by: Tomasz Figa
Signed-off-by: Kyungmin Park
---
arch/arm/boot/dts/exynos3250.dtsi | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/exynos3250.dtsi
b/ar
On Thu, Apr 10 2014 at 10:28:24 am BST, Chanwoo Choi
wrote:
> This patch declare coretex-a7's irqchip to initialze gic from dt
> with "arm,cortex-a7-gic" data.
>
> Cc: Thomas Gleixner
> Signed-off-by: Chanwoo Choi
> Signed-off-by: Kyungmin Park
> ---
> drivers/irqchip/irq-gic.c | 1 +
> 1 fil
Hi Arnd,
> -Original Message-
> From: linux-arm-kernel [mailto:linux-arm-kernel-
> boun...@lists.infradead.org] On Behalf Of Arnd Bergmann
> Sent: Thursday, April 10, 2014 6:45 PM
> To: linux-arm-ker...@lists.infradead.org
> Cc: kgene@samsung.com; t.f...@samsung.com; hyunhee@samsun
Signed-off-by: Daniel Lezcano
Reviewed-by: Viresh Kumar
Reviewed-by: Bartlomiej Zolnierkiewicz
Reviewed-by: Tomasz Figa
---
arch/arm/mach-exynos/Makefile |1 -
drivers/cpuidle/Kconfig.arm|6 ++
drivers/cpuidle/Makefile
In order to remove depedency on pm code, let's move the 'exynos_enter_aftr'
function into the pm.c file as well as the other helper functions.
Signed-off-by: Daniel Lezcano
---
arch/arm/mach-exynos/common.h |1 +
arch/arm/mach-exynos/cpuidle.c | 29 -
arch/arm/
The code to initiate and exit the powerdown sequence is the same in pm.c and
cpuidle.c.
Let's split the common part in the pm.c and reuse it from the cpu_pm notifier.
That is one more step forward to make the cpuidle driver arch indenpendant.
Signed-off-by: Daniel Lezcano
Reviewed-by: Viresh Ku
Let's encapsulate the AFTR state specific call into a single function.
Signed-off-by: Daniel Lezcano
---
arch/arm/mach-exynos/cpuidle.c |6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-exynos/cpuidle.c b/arch/arm/mach-exynos/cpuidle.c
index d7091e0..0d3c8
The scu_enable function is already a noop in the scu's header file is
CONFIG_SMP=n, so no need to use these macros in the code.
Signed-off-by: Daniel Lezcano
Reviewed-by: Viresh Kumar
Reviewed-by: Bartlomiej Zolnierkiewicz
Reviewed-by: Tomasz Figa
---
arch/arm/mach-exynos/pm.c |4 +---
1
We make the cpuidle code less arch dependent.
Signed-off-by: Daniel Lezcano
Reviewed-by: Viresh Kumar
Reviewed-by: Bartlomiej Zolnierkiewicz
Reviewed-by: Tomasz Figa
---
arch/arm/mach-exynos/cpuidle.c |6 --
arch/arm/mach-exynos/pm.c |4
2 files changed, 4 insertions(+),
Pass the wakeup mask to 'exynos_set_wakeupmask' as this function could be used
for different idle states with different mask.
Signed-off-by: Daniel Lezcano
---
arch/arm/mach-exynos/cpuidle.c |6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-exynos/cpuidle
Move the code around to differentiate different section of code and prepare it
to be factored out in the next patches.
The call order changed but hat doesn't have a side effect because they are
independent. The important call is cpu_do_idle() which must be done the last.
Signed-off-by: Daniel Lez
There is no point to register the cpuidle driver for the 5440 as it has only
one WFI state which is the default idle function when the cpuidle driver is
disabled.
By disabling cpuidle we prevent to enter to the governor computation for
nothing, thus saving a lot of processing time.
The only drawb
One more step is moving the clock ratio setting at idle time in pm.c
The macro names have been changed to be consistent with the other macros
name in the file.
Note, the clock divider was working only when cpuidle was enabled because it
was in its init routine. With this change, the clock divider
This macro is only used there.
Signed-off-by: Daniel Lezcano
---
arch/arm/mach-exynos/pm.c |3 ++-
arch/arm/mach-exynos/regs-pmu.h |2 --
2 files changed, 2 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
index a943e97..aa23662 1006
This function should be called only when the powerdown sequence fails.
Even if the current code does not hurt, by moving this line, we have the same
code than the one in pm.c.
Signed-off-by: Daniel Lezcano
Reviewed-by: Viresh Kumar
Reviewed-by: Bartlomiej Zolnierkiewicz
Reviewed-by: Tomasz Fig
Signed-off-by: Daniel Lezcano
---
arch/arm/mach-exynos/cpuidle.c | 11 +++
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-exynos/cpuidle.c b/arch/arm/mach-exynos/cpuidle.c
index ddbb2c5..ed7a439 100644
--- a/arch/arm/mach-exynos/cpuidle.c
+++ b/arch/arm/mach
Use the cpu_pm_enter/exit notifier to group some pm code inside the pm file.
The save and restore code is duplicated across pm.c and cpuidle.c. By using
the cpu_pm notifier, we can factor out the routine.
Signed-off-by: Daniel Lezcano
Reviewed-by: Viresh Kumar
Reviewed-by: Bartlomiej Zolnierkie
No more dependency on the arch code. The platform_data field is used to set the
PM callback as the other cpuidle drivers.
Signed-off-by: Daniel Lezcano
Reviewed-by: Viresh Kumar
Reviewed-by: Bartlomiej Zolnierkiewicz
---
arch/arm/mach-exynos/cpuidle.c |4 +++-
arch/arm/mach-exynos/exynos.c
Signed-off-by: Daniel Lezcano
---
arch/arm/mach-exynos/cpuidle.c | 10 --
1 file changed, 10 deletions(-)
diff --git a/arch/arm/mach-exynos/cpuidle.c b/arch/arm/mach-exynos/cpuidle.c
index ef592ad..52ef229a 100644
--- a/arch/arm/mach-exynos/cpuidle.c
+++ b/arch/arm/mach-exynos/cpuidle.
The driver was initially written for exynos4 but the driver is used also for
exynos5.
Change the function prefix name exynos4 -> exynos
Signed-off-by: Daniel Lezcano
Reviewed-by: Viresh Kumar
Reviewed-by: Bartlomiej Zolnierkiewicz
Reviewed-by: Tomasz Figa
---
arch/arm/mach-exynos/cpuidle.c |
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