Hi Tomasz,
On 18 April 2014 19:42, Tomasz Figa wrote:
> Hi Chander,
>
>
> On 15.04.2014 09:38, Chander Kashyap wrote:
>>
>> Currently status/configuration power register values are hard-coded for
>> cpu1.
>>
>> Make it generic so that it is useful for SoC's with more than two cpus.
>>
>> Signed-o
Adds the google peach-pit board dts file which uses
exynos5420 SoC.
Signed-off-by: Arun Kumar K
Signed-off-by: Doug Anderson
---
arch/arm/boot/dts/Makefile |1 +
arch/arm/boot/dts/exynos5420-peach-pit.dts | 225
2 files changed, 226 insertions(+
From: Jonathan Gonzalez V
Performing vma lookups without taking the mm->mmap_sem is asking
for trouble. While doing the search, the vma in question can be
modified or even removed before returning to the caller. Take the
lock (exclusively) in order to avoid races while iterating through
the vmaca
Hi Andrzej
Thank you for comments.
On 04/18/2014 09:32 PM, Andrzej Hajda wrote:
Hi again,
On 04/17/2014 01:53 PM, YoungJun Cho wrote:
In case of using CPU interface panel, the relevant registers should be set.
So this patch adds relevant dt bindings.
Changelog v2:
- Changes "samsung,sysreg-p
Hi Andrzej
Thank you for comments.
On 04/18/2014 09:15 PM, Andrzej Hajda wrote:
Hi YoungJun,
Thanks for the whole patchset.
On 04/15/2014 07:47 AM, YoungJun Cho wrote:
Some phy control registers are not kept after software reset.
So this patch makes the clocks containing phy control to be se
On 19.04.2014 16:35, Sachin Kamat wrote:
Hi Tomasz,
On 19 April 2014 19:21, Tomasz Figa wrote:
Hi Chanwoo, Sachin,
On 19.04.2014 15:43, Chanwoo Choi wrote:
Hi Sachin,
On Fri, Apr 18, 2014 at 5:14 PM, Sachin Kamat
wrote:
Hi Chanwoo,
On 18 April 2014 07:50, Chanwoo Choi wrote:
Thi
Hi Tomasz,
On 19 April 2014 19:21, Tomasz Figa wrote:
> Hi Chanwoo, Sachin,
>
>
> On 19.04.2014 15:43, Chanwoo Choi wrote:
>>
>> Hi Sachin,
>>
>> On Fri, Apr 18, 2014 at 5:14 PM, Sachin Kamat
>> wrote:
>>>
>>> Hi Chanwoo,
>>>
>>> On 18 April 2014 07:50, Chanwoo Choi wrote:
This patch
Hi Chanwoo, Sachin,
On 19.04.2014 15:43, Chanwoo Choi wrote:
Hi Sachin,
On Fri, Apr 18, 2014 at 5:14 PM, Sachin Kamat wrote:
Hi Chanwoo,
On 18 April 2014 07:50, Chanwoo Choi wrote:
This patchset support cpufreq driver for Exynos3250 which uses the Cortex-A7
dual cores and has a target spee
Hi Sachin,
On Fri, Apr 18, 2014 at 5:14 PM, Sachin Kamat wrote:
> Hi Chanwoo,
>
> On 18 April 2014 07:50, Chanwoo Choi wrote:
>> This patchset support cpufreq driver for Exynos3250 which uses the Cortex-A7
>> dual cores and has a target speed of 1.0 GHz and code clean using
>> dev_err/info
>> i
Hi Chanwoo,
On 19.04.2014 09:47, Chanwoo Choi wrote:
Hi Tomasz,
On Fri, Apr 18, 2014 at 11:42 PM, Tomasz Figa wrote:
On SoCs with more than 2 cores there are more than 2 S5P_ARM_CORE_*
registers that can be addressed with fixed stride of 0x80. This patch
renames the definitions of S5P_ARM_COR
Hi Tomasz,
On Fri, Apr 18, 2014 at 11:42 PM, Tomasz Figa wrote:
> On SoCs with more than 2 cores there are more than 2 S5P_ARM_CORE_*
> registers that can be addressed with fixed stride of 0x80. This patch
> renames the definitions of S5P_ARM_CORE1_* registers to be S5P_ARM_CORE_*
> and make them
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