On 06/09/2014 03:43 PM, David Laight wrote:
> From: Of Andrzej Hajda
> ...
>>> You can't error out on module unload, although that's not really relevant
>>> here. gpiochip_remove() is typically called when the device that registered
>>> the GPIO chip is unbound. And despite some remove() callbacks
Hi Kevin,
We tested on 3 "peach-pi" boards. We are not observing this issue.
Even I tried with the below defconfig mentioned by you. No issues observed.
https://chromium.googlesource.com/chromiumos/overlays/chromiumos-overlay/+/master/eclass/cros-kernel/exynos5_defconfig
This is the u-boot versi
On Mon, 9 Jun 2014, Lorenzo Pieralisi wrote:
> I commented on Nico's patch because I did not like how it was
> implemented (at least remove the CPU PM notifier calls please, because
> they are not needed).
OK no problem. That's easy enough. I added them to play it safe as a
test patch in case
On Monday, June 09, 2014 11:51:42 PM Mark Brown wrote:
>
> --fYgRtaZIy+F1uhp1
> Content-Type: text/plain; charset=us-ascii
> Content-Disposition: inline
>
> On Tue, Jun 10, 2014 at 12:22:07AM +0200, Rafael J. Wysocki wrote:
> > On Monday, June 09, 2014 08:49:17 PM Mark Brown wrote:
>
> > > Yes,
Javier,
On Mon, Jun 9, 2014 at 3:55 PM, Javier Martinez Canillas
wrote:
>> * The RTC has many subtle differences between the 77686 and 77802.
>> They expanded it to handle a 200 year timeframe instead of 100 and
>> that meant that they had to shuffle the bits around everywhere. They
>> also move
Hello Mark,
On 06/09/2014 09:47 PM, Mark Brown wrote:
> On Mon, Jun 09, 2014 at 11:37:46AM +0200, Javier Martinez Canillas wrote:
>
>> +Optional node:
>> +- voltage-regulators : The regulators of max77802 have to be instantiated
>> + under subnode named "voltage-regulators" using the following f
Hello Mark,
Thanks a lot for your feedback.
On 06/09/2014 09:38 PM, Mark Brown wrote:
> On Mon, Jun 09, 2014 at 11:37:47AM +0200, Javier Martinez Canillas wrote:
>
>> +case REGULATOR_MODE_STANDBY:/* switch off */
>> +if (id != MAX77802_LDO1 && id != MAX77802_L
Hello Krzysztof,
On 06/09/2014 12:22 PM, Krzysztof Kozlowski wrote:
> On pon, 2014-06-09 at 11:37 +0200, Javier Martinez Canillas wrote:
>> Maxim MAX77802 is a power management chip that contains 10 high
>> efficiency Buck regulators, 32 Low-dropout (LDO) regulators used
>> to power up application
Hello Krzystof,
Thanks a lot for your feedback.
On 06/09/2014 06:04 PM, Doug Anderson wrote:
> Krzystof,
>
> On Mon, Jun 9, 2014 at 3:16 AM, Krzysztof Kozlowski
> wrote:
>> On pon, 2014-06-09 at 11:37 +0200, Javier Martinez Canillas wrote:
>>> MAX77802 is a PMIC that contains 10 high efficiency
On Tue, Jun 10, 2014 at 12:22:07AM +0200, Rafael J. Wysocki wrote:
> On Monday, June 09, 2014 08:49:17 PM Mark Brown wrote:
> > Yes, looks like it is.
> But it doesn't apply for me on top of the current Linus' tree.
> Can you please rebase?
It probably depends on other people's trees too, I jus
On Mon, Jun 09, 2014 at 06:03:31PM +0100, Doug Anderson wrote:
[...]
> Cold boot and resume from suspend are detected via various special
> flags in various special locations. Resume from suspend looks at
> INFORM1 (0x10048004) for flags. This register is 0 during a cold boot
> and has special
On Mon, Jun 09, 2014 at 09:47:42PM +0100, Kevin Hilman wrote:
> Nicolas Pitre writes:
>
> > On Sun, 8 Jun 2014, Lorenzo Pieralisi wrote:
> >
> >> On Sun, Jun 08, 2014 at 12:53:34AM +0100, Olof Johansson wrote:
> >> > Lorenzo,
> >> >
> >> > Since you're emailing from @arm.com, some of this is to
On Monday, June 09, 2014 08:49:17 PM Mark Brown wrote:
> On Fri, Jun 06, 2014 at 11:15:06PM +0200, Rafael J. Wysocki wrote:
> > On Friday, June 06, 2014 02:08:50 PM Mark Brown wrote:
>
> > > Yes, the conversion to make ARCH_HAS_OPP unused is in Raphael's tree for
> > > the merge window.
>
> > Per
This patch changes the fifo reset code to follow the reset procedure
outlined in the documentation of Synopsys Mobile storage host databook.
Signed-off-by: Sonny Rao
Signed-off-by: Yuvaraj Kumar C D
---
v2: Add Generic DMA support
per the documentation, move interrupt clear before wait
m
ping for any Samsung folks that might be able to explain this.
On Thu, Jun 5, 2014 at 5:15 PM, Kevin Hilman wrote:
> Hello,
>
> I'm trying to boot next-20140605[1] on my recently arrived Chromebook2
> (peach-pi) and was not getting to userspace. Comparing notes with Doug
> Anderson, his was boot
On Wed, May 28, 2014 at 10:17 PM, Jaehoon Chung wrote:
> Hi, Sonny.
>
> On 05/29/2014 09:35 AM, Sonny Rao wrote:
>> This patch changes the fifo reset code to follow the reset procedure
>> outlined in the documentation of Synopsys Mobile storage host databook.
>>
>> Signed-off-by: Sonny Rao
>> Sig
On Mon, 9 Jun 2014, Kevin Hilman wrote:
> On Mon, Jun 9, 2014 at 1:22 PM, Nicolas Pitre
> wrote:
> > On Mon, 9 Jun 2014, Andrew Bresticker wrote:
> >
> >> > [1] While waiting for the forth-coming patch from Andrew to enable the
> >> > CCI port for the boot cluster), I do this from u-boot bef
Nicolas Pitre writes:
> On Sun, 8 Jun 2014, Lorenzo Pieralisi wrote:
>
>> On Sun, Jun 08, 2014 at 12:53:34AM +0100, Olof Johansson wrote:
>> > Lorenzo,
>> >
>> > Since you're emailing from @arm.com, some of this is to the wider
>> > recipient and maybe not directly to you:
>>
>> I am glad to re
On Mon, Jun 9, 2014 at 1:22 PM, Nicolas Pitre wrote:
> On Mon, 9 Jun 2014, Andrew Bresticker wrote:
>
>> > [1] While waiting for the forth-coming patch from Andrew to enable the
>> > CCI port for the boot cluster), I do this from u-boot before starting
>> > the kernel (based on earlier ema
Kevin and Nicolas,
On Mon, Jun 9, 2014 at 1:27 PM, Kevin Hilman wrote:
> Nicolas Pitre writes:
>
>> On Sat, 7 Jun 2014, Abhilash Kesavan wrote:
>>
>>> Hi Nicolas,
>>>
>>> The first man of the incoming cluster enables its snoops via the
>>> power_up_setup function. During secondary boot-up, this
Nicolas Pitre writes:
> On Sat, 7 Jun 2014, Abhilash Kesavan wrote:
>
>> Hi Nicolas,
>>
>> The first man of the incoming cluster enables its snoops via the
>> power_up_setup function. During secondary boot-up, this does not occur
>> for the boot cluster. Hence, I enable the snoops for the boot c
On Mon, 9 Jun 2014, Andrew Bresticker wrote:
> > [1] While waiting for the forth-coming patch from Andrew to enable the
> > CCI port for the boot cluster), I do this from u-boot before starting
> > the kernel (based on earlier email from Doug):
> >
> > mw.l 10d25000 3 # Enable CCI fro
> diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h
> index 9ffecd5..453d89e 100644
> --- a/drivers/usb/host/xhci.h
> +++ b/drivers/usb/host/xhci.h
> @@ -1582,6 +1582,9 @@ struct xhci_hcd {
> u32 port_status_u0;
> /* Compliance Mode Timer Triggered every 2
> [1] While waiting for the forth-coming patch from Andrew to enable the
> CCI port for the boot cluster), I do this from u-boot before starting
> the kernel (based on earlier email from Doug):
>
> mw.l 10d25000 3 # Enable CCI from U-Boot
>From the other thread, it sounds like Nicolas
On Fri, Jun 06, 2014 at 11:15:06PM +0200, Rafael J. Wysocki wrote:
> On Friday, June 06, 2014 02:08:50 PM Mark Brown wrote:
> > Yes, the conversion to make ARCH_HAS_OPP unused is in Raphael's tree for
> > the merge window.
> Perhaps already merged?
Yes, looks like it is.
signature.asc
Descript
On Mon, Jun 09, 2014 at 11:37:46AM +0200, Javier Martinez Canillas wrote:
> +Optional node:
> +- voltage-regulators : The regulators of max77802 have to be instantiated
> + under subnode named "voltage-regulators" using the following format.
Every other PMIC calls this node regulators...
> +
On Mon, Jun 09, 2014 at 11:37:47AM +0200, Javier Martinez Canillas wrote:
> + case REGULATOR_MODE_STANDBY:/* switch off */
> + if (id != MAX77802_LDO1 && id != MAX77802_LDO20 &&
> + id != MAX77802_LDO21 && id != MAX77802_LDO3) {
> +
Tomasz,
On Fri, Jun 6, 2014 at 4:41 PM, Mike Turquette wrote:
> Quoting Tomasz Figa (2014-06-05 15:26:31)
>> On 05.06.2014 22:35, Doug Anderson wrote:
>> > The "aclk66_peric" clock is a gate clock with a whole bunch of gates
>> > underneath it. This big gate isn't very useful to include in our
>
Doug Anderson writes:
> On exynos mcpm systems the firmware is hardcoded to jump to an address
> in SRAM (0x02073000) when secondary CPUs come up. By default the
> firmware puts a bunch of code at that location. That code expects the
> kernel to fill in a few slots with addresses that it uses t
Lorenzo,
On Sat, Jun 7, 2014 at 11:12 AM, Lorenzo Pieralisi
wrote:
> On Fri, Jun 06, 2014 at 10:43:05PM +0100, Doug Anderson wrote:
>> On exynos mcpm systems the firmware is hardcoded to jump to an address
>> in SRAM (0x02073000) when secondary CPUs come up. By default the
>> firmware puts a bun
Krzystof,
On Mon, Jun 9, 2014 at 3:16 AM, Krzysztof Kozlowski
wrote:
> On pon, 2014-06-09 at 11:37 +0200, Javier Martinez Canillas wrote:
>> MAX77802 is a PMIC that contains 10 high efficiency Buck regulators,
>> 32 Low-dropout (LDO) regulators, two 32kHz buffered clock outputs,
>> a Real-Time-Cl
On Mon, Jun 09, 2014 at 12:22:41PM +0200, Krzysztof Kozlowski wrote:
> On pon, 2014-06-09 at 11:37 +0200, Javier Martinez Canillas wrote:
> > +static const struct max77802_irq_data max77802_irqs[] = {
> > + DECLARE_IRQ(MAX77802_PMICIRQ_PWRONF,PMIC_INT1, 1 << 0),
> > + DECLARE_IRQ(MAX77802_
Display domain is removed due to instability issues. Explaining
the problem below:
exynos_init_late triggers the pm_genpd_poweroff_unused which
powers off the unused power domains. This call hits before
the trigger to deferred probes.
DRM DP Panel defers the probe due to supply get failure. By th
On 09/06/14 12:44, Tushar Behera wrote:
> IMHO, the clock entries belong here as the audss clock provider
> essentially remains same for all Exynos4 based systems.
>
> As for pin-control entry, I believe we can move them to respective SoC
> dtsi files.
>
> Does that sound okay to you?
I guess th
On Sat, Jun 07, 2014 at 03:22:13PM +0200, Arnd Bergmann wrote:
> On Saturday 07 June 2014 00:45:45 Thierry Reding wrote:
> > This is somewhat off-topic, but given the various concepts discussed in
> > this thread I'm beginning to wonder how they will be implemented.
>
> I think it's good you raise
On 06/09/2014 03:23 PM, Sylwester Nawrocki wrote:
> Hi Tushar,
>
> On 07/06/14 11:30, Tushar Behera wrote:
>> I2S driver uses 3 clocks under different conditions. Added two
>> missing clocks.
>>
>> Additionally updated pin-control property for this node.
>>
>> Signed-off-by: Tushar Behera
>> ---
On pon, 2014-06-09 at 11:37 +0200, Javier Martinez Canillas wrote:
> Maxim MAX77802 is a power management chip that contains 10 high
> efficiency Buck regulators, 32 Low-dropout (LDO) regulators used
> to power up application processors and peripherals, a 2-channel
> 32kHz clock outputs, a Real-Tim
On pon, 2014-06-09 at 11:37 +0200, Javier Martinez Canillas wrote:
> MAX77802 is a PMIC that contains 10 high efficiency Buck regulators,
> 32 Low-dropout (LDO) regulators, two 32kHz buffered clock outputs,
> a Real-Time-Clock (RTC) and a I2C interface to program the individual
> regulators, clocks
Hi Tushar,
On 07/06/14 11:30, Tushar Behera wrote:
> I2S driver uses 3 clocks under different conditions. Added two
> missing clocks.
>
> Additionally updated pin-control property for this node.
>
> Signed-off-by: Tushar Behera
> ---
> Based on next-20140606.
>
> Tested on Exynos4210-based Ori
The MAX77802 PMIC has 10 high-efficiency Buck and 32 Low-dropout
(LDO) regulators. This patch adds support for all these regulators
found on the MAX77802 PMIC and is based on a driver added by Simon
Glass to the Chrome OS kernel 3.8 tree.
Signed-off-by: Javier Martinez Canillas
---
drivers/regul
The MAX7802 PMIC has a Real-Time-Clock (RTC) with two alarms.
This patch adds support for the RTC and is based on a driver
added by Simon Glass to the Chrome OS kernel 3.8 tree.
Signed-off-by: Javier Martinez Canillas
---
drivers/mfd/max77802.c | 3 +
drivers/rtc/Kconfig| 10 +
dr
The MAX77802 PMIC has two 32.768kHz Buffered Clock Outputs with
Low Jitter Mode. This patch adds support for these two clocks.
Signed-off-by: Javier Martinez Canillas
---
.../devicetree/bindings/clock/maxim,max77802.txt | 40
drivers/clk/Kconfig| 6 +
dr
Maxim MAX77802 is a power management chip that contains 10 high
efficiency Buck regulators, 32 Low-dropout (LDO) regulators used
to power up application processors and peripherals, a 2-channel
32kHz clock outputs, a Real-Time-Clock (RTC) and a I2C interface
to program the individual regulators, clo
MAX77802 is a PMIC that contains 10 high efficiency Buck regulators,
32 Low-dropout (LDO) regulators, two 32kHz buffered clock outputs,
a Real-Time-Clock (RTC) and a I2C interface to program the individual
regulators, clocks and the RTC.
This series are based on drivers added by Simon Glass to the
Peach pit board uses a Maxim 77802 Power Management IC to
drive regulators and its Real Time Clock. This patch adds
support for this chip.
These are the device nodes and pinctrl configuration that
is present on the Peach pit DeviceTree source file in the
the Chrome OS kernel 3.8 tree.
Signed-off-
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