Re: mainline boot: 64 boots: 62 pass, 2 fail (v3.16-rc1-2-gebe0618)

On 06/26/2014 03:27 AM, Laura Abbott wrote: > On 6/25/2014 5:13 AM, Tushar Behera wrote: >> On 06/25/2014 03:59 AM, Laura Abbott wrote: >>> On 6/24/2014 10:47 AM, Laura Abbott wrote: On 6/23/2014 11:32 AM, Kevin Hilman wrote: > On Sun, Jun 22, 2014 at 8:56 PM, Tushar Behera wrote: >>

Re: Using s5p-sss hw crypto causes ipsec to break

Sonny Rao wrote: > Hi, I've been investigating an issue relating to hardware crypto which > is that when I enable the s5p-sss module for hardware cryptographic > acceleration on Samsung Exynos SoCs the in-kernel IPSec seems to > break, although cryptographic operations on filesystems/block devices

Re: [PATCH 4/4 v2] ARM: DTS: Add NTC thermistor nodes to Exynos5420 based Peach_PIT

Doug, On 26 June 2014 02:10, Doug Anderson wrote: > Naveen, > > On Tue, Jun 24, 2014 at 11:29 PM, Naveen Krishna Chatradhi > wrote: >> Exynos5420 based Peach PIT board has 4 NTC thermistors to measure >> temperatures at various points on the board. >> >> IIO based ADC becomes the parent and NTC

Re: [PATCH 1/3] drm/exynos: Control DISP1BLK system register in FIMD

Hi Ajay, On 25 June 2014 19:45, Ajay Kumar wrote: > Exynos SOC have a DISP1BLK register where we can select > the path for FIMD output. We can redirect the video data > directly to DP/MIPI interface, or we can pass it via > image enhancement chips. > > Since we don't use any image enhancement chi

Re: [PATCH v2 3/5] ARM: dts: exynos4412-odroidx: add support for USB (phy, host, device)

Hello, On 2014-06-25 15:58, Vivek Gautam wrote: On Wed, Jun 25, 2014 at 6:56 PM, Marek Szyprowski wrote: From: Kamil Debski This patch adds basic support for USB modules (host and device) on OdroidX board. Signed-off-by: Kamil Debski [removed incorrect port@2 node] Signed-off-by: Marek Szy

Re: [PATCH 2/2] usb: dwc3: Kconfig: Select PHY drivers for Exynos DWC3

On 06/26/2014 11:09 AM, Sachin Kamat wrote: > USB DWC3 driver on Exynos platforms does not work without its > corresponding phy driver. Hence it makes no sense to keep the > phy driver as user selectable. Instead select it from USB config > to make things easier for the end user. > While at it make

Re: [PATCH 0/3] drm/exynos: add framework to control DISP1BLK setting

Hi YoungJun, On Thu, Jun 26, 2014 at 11:23 AM, Ajay kumar wrote: > On Thu, Jun 26, 2014 at 5:24 AM, YoungJun Cho wrote: >> Hi Ajay, >> >> I'm sorry for say that the patchset for exynos drm supporting I80 i/f >> includes yours. >> >> The patchset is still in reviewing and I'm preparing v5. >> >>

Re: [PATCH 1/2] usb: host: Kconfig: Select PHY drivers for Exynos EHCI/OHCI

On 06/26/2014 11:09 AM, Sachin Kamat wrote: > EHCI and OHCI drivers on Exynos platforms do not work without their > corresponding SoC specific phy drivers. Hence it makes no sense to > keep these phy drivers as user selectable. Instead select them from > the respective USB configs to make things ea

Re: [PATCH 0/3] drm/exynos: add framework to control DISP1BLK setting

On Thu, Jun 26, 2014 at 5:24 AM, YoungJun Cho wrote: > Hi Ajay, > > I'm sorry for say that the patchset for exynos drm supporting I80 i/f > includes yours. > > The patchset is still in reviewing and I'm preparing v5. > > Please check this: > http://www.spinics.net/lists/dri-devel/msg60943.html > >

[PATCH 2/2] usb: dwc3: Kconfig: Select PHY drivers for Exynos DWC3

USB DWC3 driver on Exynos platforms does not work without its corresponding phy driver. Hence it makes no sense to keep the phy driver as user selectable. Instead select it from USB config to make things easier for the end user. While at it make the config depend on ARCH_EXYNOS5 instead of ARCH_EXY

[PATCH 1/2] usb: host: Kconfig: Select PHY drivers for Exynos EHCI/OHCI

EHCI and OHCI drivers on Exynos platforms do not work without their corresponding SoC specific phy drivers. Hence it makes no sense to keep these phy drivers as user selectable. Instead select them from the respective USB configs to make things easier for the end user. While at it enable 5250 phy f

[PATCH] ARM: dts: add hdmi regulators for exynos5800 based peach-pi board

Adding regulators for HDMI for exynos5800 based Peach-pi board. Signed-off-by: Rahul Sharma --- Based on Kukjin's for-next branch. Depends on: 1) PMIC addition to Peach-pi: http://www.spinics.net/lists/linux-samsung-soc/msg33166.html 2) tps65090 addition to Peach-pi: http://www.spinics.net/list

[PATCH 2/2 v2] i2c: exynos5: remove extra line and fix an assignment

This patch does the following in exynos5_i2c_message_start() function 1. Fixes an assignment As, "i2c_auto_conf" is initialized to '0' at the beginning of the function and HSI2C_READ_WRITE is defined as (1u << 16) Using "|=" for the first assignment is more readable. 2. Removes an extra

[PATCH 1/2 v2] i2c: exynos5: remove an unnecessary read of FIFO_STATUS register

This patch removes an extra read of FIFO_STATUS register in the interrrupt service routine. Which is read again before the actual use. Signed-off-by: Naveen Krishna Chatradhi --- Changes since v1: None drivers/i2c/busses/i2c-exynos5.c |1 - 1 file changed, 1 deletion(-) diff --git a/driver

Re: [PATCH 2/2] i2c: exynos5: fix minor styling nits

Hello Sachin, On 25 June 2014 16:19, Sachin Kamat wrote: > Hi Naveen, > > On Wed, Jun 25, 2014 at 4:08 PM, Naveen Krishna Chatradhi > wrote: >> This patch removes an extra line and fixes a styling nit >> in exynos5_i2c_message_start() >> >> Signed-off-by: Naveen Krishna Chatradhi >> --- >> dri

Re: [PATCH 2/3] ARM: dts: Update the parent for Audss clocks in Exynos5420

On Thu, Jun 26, 2014 at 4:51 AM, Kevin Hilman wrote: > Doug Anderson writes: > >> Tushar, >> >> On Tue, Jun 10, 2014 at 10:32 PM, Tushar Behera wrote: >>> Currently CLK_FOUT_EPLL was set as one of the parents of AUDSS mux. >>> As per the user manual, it should be CLK_MAU_EPLL. >>> >>> The proble

Re: [PATCH 0/3] MCPM: clarify boot CPU situation wrt CCI

On Tue, Jun 24, 2014 at 3:57 PM, Doug Anderson wrote: > Kevin, > > On Tue, Jun 24, 2014 at 8:35 AM, Kevin Hilman wrote: >> - Leave mau_epll enabled >> http://lists.infradead.org/pipermail/linux-arm-kernel/2014-June/262259.html > > Can you drop your mau_epll one and instead pick just >

Re: [PATCH 1/2] ARM: firmware: Introduce suspend and resume operations

On 06/26/2014 01:18 AM, Tomasz Figa wrote: This patch extends the firmware_ops structure with two new callbacks: .suspend() and .resume(). The former is intended to ask the firmware to save all its volatile state and suspend the system, without returning back to the kernel in between. The latter

Re: [PATCH 2/3] ARM: dts: Update the parent for Audss clocks in Exynos5420

Doug Anderson writes: > Tushar, > > On Tue, Jun 10, 2014 at 10:32 PM, Tushar Behera wrote: >> Currently CLK_FOUT_EPLL was set as one of the parents of AUDSS mux. >> As per the user manual, it should be CLK_MAU_EPLL. >> >> The problem surfaced when the bootloader in Peach-pit board set >> the EPL

[PATCH v2] Documentation: devicetree: Fix tps65090 typos in example

Specification and existing device trees use vsys-l{1,2}-supply, not vsys_l{1,2}-supply. Fix the example to match the specification. Reviewed-by: Doug Anderson Acked-by: Mark Rutland Signed-off-by: Andreas Färber --- v1 -> v2: * More verbose commit message (requested by Mark Rutland) Documen

Re: [PATCH 2/2] ARM: EXYNOS: Add support for firmware-assisted suspend/resume

On Wed, Jun 25, 2014 at 06:18:34PM +0200, Tomasz Figa wrote: > +static int exynos_suspend(void) > +{ > + /* Save Power control and Diagnostic registers */ > + asm ("mrc p15, 0, %0, c15, c0, 0\n" > + "mrc p15, 0, %1, c15, c0, 1\n" > + : "=r" (cp15_power), "=r" (cp15_d

Re: [PATCH 4/4] ARM: dts: refactor Odroid DTS file and add support for Odroid X2 and U2/U3

Hi Marek, Daniel, On 24.06.2014 13:47, Marek Szyprowski wrote: > Hello, > > On 2014-06-19 14:43, Daniel Drake wrote: >> On Tue, Jun 17, 2014 at 10:25 AM, Marek Szyprowski >> wrote: >>> This patch moves some parts of exynos4412-odroidx.dts to common >>> exynos4412-odroid-common.dtsi file and adds

Re: mainline boot: 64 boots: 62 pass, 2 fail (v3.16-rc1-2-gebe0618)

On 6/25/2014 5:13 AM, Tushar Behera wrote: > On 06/25/2014 03:59 AM, Laura Abbott wrote: >> On 6/24/2014 10:47 AM, Laura Abbott wrote: >>> On 6/23/2014 11:32 AM, Kevin Hilman wrote: On Sun, Jun 22, 2014 at 8:56 PM, Tushar Behera wrote: > Adding linux-samsung-soc and linux-arm-kernel ML fo

Re: [PATCH 4/4 v2] ARM: DTS: Add NTC thermistor nodes to Exynos5420 based Peach_PIT

Naveen, On Tue, Jun 24, 2014 at 11:29 PM, Naveen Krishna Chatradhi wrote: > Exynos5420 based Peach PIT board has 4 NTC thermistors to measure > temperatures at various points on the board. > > IIO based ADC becomes the parent and NTC thermistors are the childs, > via the HWMON interface. > > Sign

Re: [PATCH v4 04/14] clk: max77686: Improve Maxim 77686 PMIC clocks binding

Javier, On Wed, Jun 25, 2014 at 12:03 PM, Javier Martinez Canillas wrote: > Like most clock drivers, the Maxim 77686 PMIC clock binding > follows the convention that the "#clock-cells" property is > used to specify the number of cells in a clock provider. > > But the binding document is not clear

[PATCH v4 03/14] clk: max77686: Add DT include for MAX77686 PMIC clock

This patch adds a dt-binding include for Maxim 77686 PMIC clock IDs that can be to be shared between the clk-max77686 clock driver and DeviceTree source files. Signed-off-by: Javier Martinez Canillas Reviewed-by: Krzysztof Kozlowski --- Changes since v3: None drivers/clk/clk-max77686.c

[PATCH v4 04/14] clk: max77686: Improve Maxim 77686 PMIC clocks binding

Like most clock drivers, the Maxim 77686 PMIC clock binding follows the convention that the "#clock-cells" property is used to specify the number of cells in a clock provider. But the binding document is not clear enough that it shall be set to 1 since the PMIC support multiple clocks outputs. Al

[PATCH v4 02/14] mfd: max77686: Allow the max77686 rtc to wakeup the system

From: Doug Anderson The max77686 includes an RTC that keeps power during suspend. It's convenient to be able to use it as a wakeup source. NOTE: due to wakeup ordering problems this patch alone doesn't work so well on exynos5250-snow. You also need something that brings the i2c bus up before t

[PATCH v4 01/14] mfd: max77686: Convert to use regmap_irq

By using the generic IRQ support in the Register map API, it is possible to get rid max77686-irq.c and simplify the code. Suggested-by: Krzysztof Kozlowski Signed-off-by: Javier Martinez Canillas Acked-by: Lee Jones Reviewed-by: Doug Anderson Tested-by: Doug Anderson --- Changes since v3: No

[PATCH v4 06/14] clk: max77686: Convert to the generic max clock driver

Clocks drivers for Maxim PMIC are very similar so they can be converted to use the generic Maxim clock driver. Also, while being there use module_platform_driver() helper macro to eliminate more boilerplate code. Signed-off-by: Javier Martinez Canillas Reviewed-by: Krzysztof Kozlowski --- Chan

[PATCH v4 08/14] mfd: max77802: Add DT binding documentation

Add Device Tree binding documentation for Maxim 77802 PMIC. Signed-off-by: Javier Martinez Canillas --- Changes since v3: None Changes since v2: - Explain better the Dynamic Voltage Scaling (DVS) support in some Buck regulators and the max77802,pmic-buck-{dvs,selb}-gpios properties. Sugg

[PATCH v4 09/14] regmap: Add regmap_reg_copy function

Some device drivers using the register map API need to copy the value from one register to another. Even though it can be done with a combination of regmap_read() and regmap_write(), it is better to have a function to avoid code duplication and also it sanity check and do it atomically by holding t

[PATCH v4 07/14] mfd: Add driver for Maxim 77802 Power Management IC

Maxim MAX77802 is a power management chip that contains 10 high efficiency Buck regulators, 32 Low-dropout (LDO) regulators used to power up application processors and peripherals, a 2-channel 32kHz clock outputs, a Real-Time-Clock (RTC) and a I2C interface to program the individual regulators, clo

[PATCH v4 12/14] clk: max77802: Add DT binding documentation

Add Device Tree binding documentation for the clocks outputs in the Maxim 77802 Power Management IC. Signed-off-by: Javier Martinez Canillas --- Changes since v3: - Don't use the same clock driver name in clock-names since it's a consumer concept and most probably will be different. Suggeste

[PATCH v4 10/14] regulator: Add driver for Maxim 77802 PMIC regulators

The MAX77802 PMIC has 10 high-efficiency Buck and 32 Low-dropout (LDO) regulators. This patch adds support for all these regulators found on the MAX77802 PMIC and is based on a driver added by Simon Glass to the Chrome OS kernel 3.8 tree. Signed-off-by: Javier Martinez Canillas --- Changes since

[PATCH v4 05/14] clk: Add generic driver for Maxim PMIC clocks

Maxim Integrated Power Management ICs are very similar with regard to their clock outputs. Most of the clock drivers for these chips are duplicating code and are simpler enough that can be converted to use a generic driver to consolidate code and avoid duplication. Signed-off-by: Javier Martinez C

[PATCH v4 14/14] ARM: dts: Add max77802 to exynos5420-peach-pit and exynos5800-peach-pi

Peach pit and pi boards uses a Maxim 77802 power management IC to drive regulators and its Real Time Clock. This patch adds support for this chip. These are the device nodes and pinctrl configuration that are present on the Peach pit DeviceTree source file in the the Chrome OS kernel 3.8 tree. Si

[PATCH v4 11/14] clk: Add driver for Maxim 77802 PMIC clocks

The MAX77802 PMIC has two 32.768kHz Buffered Clock Outputs with Low Jitter Mode. This patch adds support for these two clocks. Signed-off-by: Javier Martinez Canillas --- Changes since v3: None Changes since v2: None Changes since v1: - Use module_platform_driver() instead of having init/exit

[PATCH v4 13/14] rtc: Add driver for Maxim 77802 PMIC Real-Time-Clock

The MAX7802 PMIC has a Real-Time-Clock (RTC) with two alarms. This patch adds support for the RTC and is based on a driver added by Simon Glass to the Chrome OS kernel 3.8 tree. Signed-off-by: Javier Martinez Canillas --- Changes since v3: None drivers/rtc/Kconfig| 10 + drivers/rtc/M

[PATCH v4 00/14] Add Maxim 77802 PMIC support

MAX77802 is a PMIC that contains 10 high efficiency Buck regulators, 32 Low-dropout (LDO) regulators, two 32kHz buffered clock outputs, a Real-Time-Clock (RTC) and a I2C interface to program the individual regulators, clocks and the RTC. This fourth version of the patch-set addresses several issue

Re: [PATCH v3 04/14] clk: max77686: Improve Maxim 77686 PMIC clocks binding

Hello Doug, Thanks a lot for your feedback. On 06/25/2014 08:06 PM, Doug Anderson wrote: > Javier, > > On Thu, Jun 19, 2014 at 11:20 AM, Javier Martinez Canillas > wrote: >> @@ -33,6 +38,6 @@ Example: Clock consumer node >> foo@0 { >> compatible = "bar,foo"; >>

Re: [PATCH v3 02/14] mfd: max77686: Allow the max77686 rtc to wakeup the system

On 06/25/2014 07:24 PM, Doug Anderson wrote: > Hi, > > On Wed, Jun 25, 2014 at 3:29 AM, Javier Martinez Canillas > wrote: >> Yes, the original Chrome OS 3.8 max77xxx also called the irq worker thread to >> ack the interrupt. >> >> So the real problem is that an interrupt occurs before the I2C bus

Re: [PATCH v2] i2c: s3c2410: resume the I2C controller earlier

Hello Doug, On 06/25/2014 01:56 AM, Doug Anderson wrote: > From: Vincent Palatin > > When the wake-up is triggered by the PMIC RTC, the RTC driver is trying > to read the PMIC interrupt status over I2C and fails because the I2C > controller is not resumed yet. > Let's resume the I2C controller e

Re: [PATCH v3 04/14] clk: max77686: Improve Maxim 77686 PMIC clocks binding

Javier, On Thu, Jun 19, 2014 at 11:20 AM, Javier Martinez Canillas wrote: > @@ -33,6 +38,6 @@ Example: Clock consumer node > foo@0 { > compatible = "bar,foo"; > /* ... */ > - clock-names = "my-clock"; > - clocks = <&max77686 2>;

Re: [PATCH 1/1] i2c: Kconfig: Enable HSI2C for Exynos5 platform

Sachin, On Wed, Jun 25, 2014 at 3:02 AM, Sachin Kamat wrote: > All Exynos5 platforms have HSI2C controllers and are needed by > various IPs connected to the boards based on these SoCs. Thus > select this by default for Exynos5 platforms. > > Signed-off-by: Sachin Kamat > Cc: Doug Anderson > ---

Re: [PATCH 3/3] mmc: dw_mmc: Support voltage changes

Seungwon, On Wed, Jun 25, 2014 at 6:08 AM, Seungwon Jeon wrote: > On Mon, June 23, 2014, Yuvaraj Kumar C D wrote: >> Subject: [PATCH 3/3] mmc: dw_mmc: Support voltage changes >> >> From: Doug Anderson >> >> For UHS cards we need the ability to switch voltages from 3.3V to >> 1.8V. Add support t

Re: [PATCH 1/3] mmc: dw_mmc: use mmc_regulator_get_supply to handle regulators

Seungwon, On Wed, Jun 25, 2014 at 4:18 AM, Seungwon Jeon wrote: >> >> + case MMC_POWER_ON: >> >> + if (!IS_ERR(mmc->supply.vqmmc) && >> >> + !test_bit(DW_MMC_IO_POWERED, >> >> &slot->flags)) { > You can use regulator_is_enabled() instead of flag

Re: [PATCH v3 02/14] mfd: max77686: Allow the max77686 rtc to wakeup the system

Hi, On Wed, Jun 25, 2014 at 3:29 AM, Javier Martinez Canillas wrote: > Yes, the original Chrome OS 3.8 max77xxx also called the irq worker thread to > ack the interrupt. > > So the real problem is that an interrupt occurs before the I2C bus controller > is > resumed and so the interrupt handler

Re: [PATCH 4/4] ARM: DTS: Add NTC thermistor nodes as child nodes to ADC

Naveen, On Tue, Jun 24, 2014 at 10:04 PM, Naveen Krishna Ch wrote: > Also, we have few similar nodes on Peach PI and Peach PIT. > Any plans or discussion on merging the common nodes ? There was some discussion about this in another thread with Javier. We were thinking of doing more "config frag

[PATCH v3] i2c: exynos5: Properly use the "noirq" variants of suspend/resume

The original code for the exynos i2c controller registered for the "noirq" variants. However during review feedback it was moved to SIMPLE_DEV_PM_OPS without anyone noticing that it meant we were no longer actually "noirq" (despite functions named exynos5_i2c_suspend_noirq and exynos5_i2c_resume_n

Re: [PATCH v2] i2c: exynos5: Properly use the "noirq" variants of suspend/resume

Kukjin, On Wed, Jun 25, 2014 at 4:13 AM, Kukjin Kim wrote: > Doug Anderson wrote: >> >> The original code for the exynos i2c controller registered for the >> "noirq" variants. However during review feedback it was moved to >> SIMPLE_DEV_PM_OPS without anyone noticing that it meant we were no >>

[PATCH 0/2] Firmware-assisted suspend/resume of Exynos SoCs

On Exynos-based boards running secure firmware the sequence of low level operations to enter and leave system-wide sleep mode is different than on those without the firmware. Namely: - CP15 power control and diagnostic registers cannot be written directly, - the way of setting boot address and bo

[PATCH 2/2] ARM: EXYNOS: Add support for firmware-assisted suspend/resume

On a numer of Exynos-based boards Linux kernel is running in non-secure mode under a secure firmware. This means that certain operations need to be handled in special way, with firmware assistance. System-wide suspend/resume is an example of such operations. This patch adds support for firmware-as

[PATCH 1/2] ARM: firmware: Introduce suspend and resume operations

This patch extends the firmware_ops structure with two new callbacks: .suspend() and .resume(). The former is intended to ask the firmware to save all its volatile state and suspend the system, without returning back to the kernel in between. The latter is to be called early by very low level platf

Re: [PATCH v2 0/6] Enable L2 cache support on Exynos4210/4x12 SoCs

On 25.06.2014 16:37, Russell King - ARM Linux wrote: > On Wed, Jun 25, 2014 at 04:13:16PM +0200, Tomasz Figa wrote: >> On 25.06.2014 15:50, Russell King - ARM Linux wrote: >>> On Wed, Jun 25, 2014 at 03:37:25PM +0200, Tomasz Figa wrote: This series intends to add support for L2 cache on Exynos

Re: [PATCH v2 0/6] Enable L2 cache support on Exynos4210/4x12 SoCs

On Wed, Jun 25, 2014 at 04:13:16PM +0200, Tomasz Figa wrote: > On 25.06.2014 15:50, Russell King - ARM Linux wrote: > > On Wed, Jun 25, 2014 at 03:37:25PM +0200, Tomasz Figa wrote: > >> This series intends to add support for L2 cache on Exynos4 SoCs on boards > >> running under secure firmware, whi

Re: [PATCH v3 05/14] clk: Add generic driver for Maxim PMIC clocks

Hello Krzysztof, On 06/25/2014 04:19 PM, Krzysztof Kozlowski wrote: > On czw, 2014-06-19 at 20:20 +0200, Javier Martinez Canillas wrote: >> Maxim Integrated Power Management ICs are very similar with >> regard to their clock outputs. Most of the clock drivers for >> these chips are duplicating cod

Re: [PATCH v3 06/14] clk: max77686: Convert to the generic max clock driver

On czw, 2014-06-19 at 20:20 +0200, Javier Martinez Canillas wrote: > Clocks drivers for Maxim PMIC are very similar so they can > be converted to use the generic Maxim clock driver. > > Also, while being there use module_platform_driver() helper > macro to eliminate more boilerplate code. > > Sig

[PATCH 3/3] ARM: dts: exynos5250: Add sysreg phandle to FIMD node

Add sysreg phandle to FIMD node so that we are able to control DISP1BLK configuration in FIMD driver. Signed-off-by: Ajay Kumar --- arch/arm/boot/dts/exynos5250.dtsi |1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi inde

[PATCH 2/3] ARM: dts: exynos5420: Add sysreg phandle to FIMD node

Add sysreg phandle to FIMD node so that we are able to control DISP1BLK configuration in FIMD driver. Signed-off-by: Ajay Kumar --- arch/arm/boot/dts/exynos5420.dtsi |1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi inde

Re: [PATCH v3 05/14] clk: Add generic driver for Maxim PMIC clocks

On czw, 2014-06-19 at 20:20 +0200, Javier Martinez Canillas wrote: > Maxim Integrated Power Management ICs are very similar with > regard to their clock outputs. Most of the clock drivers for > these chips are duplicating code and are simpler enough that > can be converted to use a generic driver t

[PATCH 1/3] drm/exynos: Control DISP1BLK system register in FIMD

Exynos SOC have a DISP1BLK register where we can select the path for FIMD output. We can redirect the video data directly to DP/MIPI interface, or we can pass it via image enhancement chips. Since we don't use any image enhancement chips in exynos-drm, we need to set FIMD BYPASS in DISP1BLK. Sign

[PATCH 0/3] drm/exynos: add framework to control DISP1BLK setting

This series is based on exynos-drm-next branch of Inki Dae's tree at: git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos.git Exynos SOC have a DISP1BLK register where we can select the path for FIMD output. We can redirect the video data directly to DP/MIPI interface, or we can pass

[PATCH v5 5/5] ARM: EXYNOS: Move PMU specific definitions from common.h

This patch moves PMU specific definitions into a new file as exynos-pmu.h. This will help in reducing dependency of common.h in pmu.c. Signed-off-by: Pankaj Dubey --- arch/arm/mach-exynos/common.h | 17 - arch/arm/mach-exynos/exynos-pmu.h | 31

Re: [PATCH 0/4 v2] hwmon: ntc_thermistor: prepose vendor prefix change

On 06/25/2014 03:57 AM, Kukjin Kim wrote: Naveen Krishna Chatradhi wrote: + Jean Delvare, Guenter Roeck I'm adding maintainers for drivers/hwmon/ntc* but I'm not sure. Hi, This series looks good to me. I will take 3/4 and 4/4 for exynos DT changes once hwmon/ntc maintainer pick the others.

Re: [PATCH v2 0/6] Enable L2 cache support on Exynos4210/4x12 SoCs

On 25.06.2014 15:50, Russell King - ARM Linux wrote: > On Wed, Jun 25, 2014 at 03:37:25PM +0200, Tomasz Figa wrote: >> This series intends to add support for L2 cache on Exynos4 SoCs on boards >> running under secure firmware, which requires certain initialization steps >> to be done with help of f

Re: [PATCH 2/4 v2] hwmon: ntc_thermistor: Use the manufacturer name properly

On 06/24/2014 11:29 PM, Naveen Krishna Chatradhi wrote: Murata Manufacturing Co., Ltd is the vendor for NTC (Negative Temperature coefficient) based Thermistors. But, the driver extensively uses "NTC" as the vendor name. This patch corrects the vendor name also updates the compatibility strings

Re: [PATCH 1/4 v2] devicetree: bindings: Document murata vendor prefix

On 06/24/2014 11:29 PM, Naveen Krishna Chatradhi wrote: Add Murata Manufacturing Co., Ltd. to the list of device tree vendor prefixes. Murata manufactures NTC (Negative Temperature Coefficient) based Thermistors for small scale applications like Mobiles and PDAs. Signed-off-by: Naveen Krishna C

[PATCH v5 4/5] ARM: EXYNOS: Add platform driver support for Exynos PMU

This patch modifies Exynos Power Management Unit (PMU) initialization implementation in following way: - Added platform driver support and probe function where Exynos PMU driver will register itself as syscon provider with syscon framework. - Added platform struct exynos_pmu_data to hold platfor

[PATCH v5 2/5] ARM: EXYNOS: Refactored code for using PMU address via DT

Under "arm/mach-exynos" many files are using PMU register offsets. Since we have added support for accessing PMU base address via DT, now we can remove PMU mapping from exynosX_iodesc. Let's convert all these access using iomapped address. This will help us in removing static mapping of PMU base ad

[PATCH v5 3/5] ARM: EXYNOS: Move "mach/map.h" inclusion from regs-pmu.h to platsmp.c

As we have removed static mappings from "regs-pmu.h" it does not need map.h anymore. But "platsmp.c" needed this and till now it got included indirectly. So lets move header inclusion of "mach/map.h" from "regs-pmu.h" to "platsmp.c". Signed-off-by: Pankaj Dubey Reviewed-by: Tomasz Figa --- arch

[PATCH v5 1/5] ARM: EXYNOS: Add support for mapping PMU base address via DT

Add support for mapping Samsung Power Management Unit (PMU) base address from device tree. Signed-off-by: Pankaj Dubey --- arch/arm/mach-exynos/common.h |1 + arch/arm/mach-exynos/exynos.c | 45 + 2 files changed, 46 insertions(+) diff --git a/arch/

[PATCH v5 0/5] ARM: Exynos: PMU cleanup and refactoring for using DT

This patch series, modifies Exynos Power Management Unit (PMU) related code for converting it into a platform_driver. This is also preparation for moving PMU related code out of machine folder into a either "drivers/mfd", or "drivers/power" or some other suitable place so that ARM64 based SoC can u

Re: [PATCH v2 3/5] ARM: dts: exynos4412-odroidx: add support for USB (phy, host, device)

On Wed, Jun 25, 2014 at 6:56 PM, Marek Szyprowski wrote: > From: Kamil Debski > > This patch adds basic support for USB modules (host and device) on > OdroidX board. > > Signed-off-by: Kamil Debski > [removed incorrect port@2 node] > Signed-off-by: Marek Szyprowski > --- > arch/arm/boot/dts/ex

Re: [PATCH v2 0/6] Enable L2 cache support on Exynos4210/4x12 SoCs

On Wed, Jun 25, 2014 at 03:37:25PM +0200, Tomasz Figa wrote: > This series intends to add support for L2 cache on Exynos4 SoCs on boards > running under secure firmware, which requires certain initialization steps > to be done with help of firmware, as selected registers are writable only > from se

[PATCH v2 1/6] ARM: mm: cache-l2x0: Add base address argument to write_sec callback

For certain platforms (e.g. Exynos) it is necessary to read back some values from registers before they can be written (i.e. SMC calls that set multiple registers per call), so base address of L2C controller is needed for .write_sec operation. This patch adds base argument to .write_sec callback so

[PATCH v2 0/6] Enable L2 cache support on Exynos4210/4x12 SoCs

This series intends to add support for L2 cache on Exynos4 SoCs on boards running under secure firmware, which requires certain initialization steps to be done with help of firmware, as selected registers are writable only from secure mode. First four patches extend existing support for secure wri

[PATCH v2 6/6] ARM: dts: exynos4: Add nodes for L2 cache controller

This patch adds device tree nodes for L2 cache controller present on Exynos4 SoCs. Signed-off-by: Tomasz Figa --- arch/arm/boot/dts/exynos4210.dtsi | 9 + arch/arm/boot/dts/exynos4x12.dtsi | 14 ++ 2 files changed, 23 insertions(+) diff --git a/arch/arm/boot/dts/exynos4210.

[PATCH v2 3/6] ARM: mm: cache-l2x0: Use l2c_write_sec() for LATENCY_CTRL registers

According to the documentation, TAG_LATENCY_CTRL and DATA_LATENCY_CTRL registers of L2C-310 can be written only in secure mode, so l2c_write_sec() should be used to change them, instead of plain writel_relaxed(). Signed-off-by: Tomasz Figa --- arch/arm/mm/cache-l2x0.c | 16 1 fi

[PATCH v2 5/6] ARM: EXYNOS: Add .write_sec outer cache callback for L2C-310

Exynos4 SoCs equipped with an L2C-310 cache controller and running under secure firmware require certain registers of aforementioned IP to be accessed only from secure mode. This means that SMC calls are required for certain register writes. To handle this, an implementation of .write_sec callback

[PATCH v2 2/6] ARM: Get outer cache .write_sec callback from mach_desc only if not NULL

Certain platforms (i.e. Exynos) might need to set .write_sec callback from firmware initialization which is happenning in .init_early callback of machine descriptor. However current code will overwrite the pointer with whatever is present in machine descriptor, even though it can be already set ear

[PATCH v2 4/6] ARM: mm: l2x0: Add support for overriding prefetch settings

Signed-off-by: Tomasz Figa --- Documentation/devicetree/bindings/arm/l2cc.txt | 10 ++ arch/arm/mm/cache-l2x0.c | 46 ++ 2 files changed, 56 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/l2cc.txt b/Documentation/devicetree/bin

Re: [PATCH] arm/arm64: DT: Fix GICv2 CPU interface size

On Wed, Jun 25, 2014 at 11:37:54AM +0100, Marc Zyngier wrote: > All the Cortex-{A7,A15} implementations are using a GICv2. Same for > the current arm64 platforms. > > Turns out that most of these platforms have described their GIC CPU > interface size as being 4kB. while it is actually 8kB (the GI

[PATCH v2 3/5] ARM: dts: exynos4412-odroidx: add support for USB (phy, host, device)

From: Kamil Debski This patch adds basic support for USB modules (host and device) on OdroidX board. Signed-off-by: Kamil Debski [removed incorrect port@2 node] Signed-off-by: Marek Szyprowski --- arch/arm/boot/dts/exynos4412-odroidx.dts | 27 +++ 1 file changed, 27 in

[PATCH v2 5/5] ARM: dts: exynos4412-odroid-common: disable 'always on' for BUCK8 regulator

From: Kamil Debski On Odroid U2/U3 BUCK8 is used for providing power to also to P3V3 source, which is also connected to LAN9730 chip's nRESET signal. To reset lan chip on system reboot, the BUCK8 output should not be used in 'always on' mode. This change has no impact on X/X2 boards. Signed-off-

[PATCH v2 2/5] ARM: dts: exynos4412-odroidx: enable common hardware blocks

This patch adds support for common hardware modules available on all Exynos4412-based Odroid boards, which already have complete support in mainline kernel. This includes secure firmware calls, watchdog, g2d and fimc (mem2mem) multimedia accelerators. Signed-off-by: Marek Szyprowski --- arch/arm

[PATCH v2 1/5] ARM: dts: exynos4: add port sub-nodes to exynos usb host modules

This patch adds port sub-nodes to exynos4 ehci and ohci modules, which are required by recently merged new exynos4 usb2 phy support. Signed-off-by: Marek Szyprowski --- arch/arm/boot/dts/exynos4.dtsi | 24 1 file changed, 24 insertions(+) diff --git a/arch/arm/boot/dts/

[PATCH v2 4/5] ARM: dts: refactor Odroid DTS file and add support for Odroid X2 and U2/U3

This patch moves some parts of exynos4412-odroidx.dts to common exynos4412-odroid-common.dtsi file and adds support for Odroid X2 and U2/U3 boards. X2 is same as X, but it has faster SoC module (1.7GHz instead of 1.4GHz), while U2/U3 differs from X2 by different way of routing signals to host USB h

[PATCH v2 0/4] Add Exynos4412 based Odroid X2 and U2/U3/U3+ support

Hello, This is the second version of the initial patch series adding support for Exynos 4412 based Odroid X2 and U2/U3/U3+ boards and improving support for Odroid X. Complete USB support for Odroid U2/U3/U3+ still requires some fixes in Exynos4 USB2 Phy driver and clock driver for CLKOUT: http://

RE: [PATCH 3/3] mmc: dw_mmc: Support voltage changes

On Mon, June 23, 2014, Yuvaraj Kumar C D wrote: > Subject: [PATCH 3/3] mmc: dw_mmc: Support voltage changes > > From: Doug Anderson > > For UHS cards we need the ability to switch voltages from 3.3V to > 1.8V. Add support to the dw_mmc driver to handle this. Note that > dw_mmc needs a little b

Re: [PATCH] clk/exynos5250: fix bit number for tv sysmmu clock

Sure Tomasz, Kukjin. Thanks for the update. Regards. On 25 June 2014 16:56, Kukjin Kim wrote: > Tomasz Figa wrote: >> >> Hi Rahul, >> >> On 25.06.2014 13:22, Rahul Sharma wrote: >> > Hi Kukjin, >> > >> > Please take this fix in your tree. >> >> This is a patch for Samsung clock drivers, so I'll

[PATCH v5 5/6] ARM: EXYNOS: Remove regs-pmu.h header dependency from pm_domain

Current "pm_domain.c" file uses "S5P_INT_LOCAL_PWR_EN" definition from "regs-pmu.h" and hence needs to include this header file. As there is no other user of "S5P_INT_LOCAL_PWR_EN" definition other than pm_domain, to remove "regs-pmu.h" header file dependency from "pm_domain.c" it's better we defi

[PATCH v5 4/6] ARM: EXYNOS: Remove file path from comment section

Many files under "arm/mach-exynos" are having file path in file comment section which is invalid now. So for better code maintainability let's remove them. Signed-off-by: Pankaj Dubey Reviewed-by: Tomasz Figa --- arch/arm/mach-exynos/headsmp.S |1 - arch/arm/mach-exynos/hotplug.

[PATCH v5 6/6] ARM: EXYNOS: Remove "linux/bug.h" from pmu.c

This patch removes unnecessary header file inclusion from pmu.c. Signed-off-by: Pankaj Dubey Reviewed-by: Tomasz Figa --- arch/arm/mach-exynos/pmu.c |1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/mach-exynos/pmu.c b/arch/arm/mach-exynos/pmu.c index fb0deda..dcfcb44 100644 --- a/

Re: [PATCH 1/1] ARM: Kconfig.debug: Update Samsung UART config options

On Wed, Jun 25, 2014 at 08:41:13PM +0900, Kukjin Kim wrote: > Sachin Kamat wrote: > > > + Russell > > > In a multiplatform config, the low level debug option shows several > > UART port entries. Improve the user visible string so that it becomes > > clear to the user about Samsung UART ports. > >

[PATCH v5 3/6] ARM: EXYNOS: Move SYSREG definition into sys-reg specific file

While making PMU implementation to be device tree based, there are few register offsets related with SYSREG present in regs-pmu.h, so let's make a new header file "regs-sys.h" to keep all such SYSREG related register offsets and remove them from "regs-pmu.h" Signed-off-by: Pankaj Dubey Reviewed-b

[PATCH v5 2/6] ARM: EXYNOS: Move cpufreq and cpuidle device registration to init_machine

As exynos_cpuidle_init and exynos_cpufreq_init function have just one lines of code for registering platform devices. We can move these lines to exynos_dt_machine_init and delete exynos_cpuidle_init and exynos_cpufreq_init function. This will help in reducing lines of code in exynos.c, making it mo

[PATCH v5 1/6] ARM: EXYNOS: Make exynos machine_ops as static

As machine function ops are used only in this file let's make them static. Also remove unused and unwanted declarations from common.h. Signed-off-by: Pankaj Dubey Reviewed-by: Tomasz Figa --- arch/arm/mach-exynos/common.h |8 arch/arm/mach-exynos/exynos.c |6 +++--- 2 files cha

[PATCH v5 0/6] Cleanup patches for mach-exynos

This series is doing code cleanup under arch/arm/mach-exynos. These patches have been separated from main exynos pmu v4 patch posted here [1]. [1]: https://lkml.org/lkml/2014/5/10/29 Changes Since v4: - Rebased on latest for-next of Kukjin Kim's tree. - Removing file path comment from mach-exyn

[PATCH v3 2/2] usb: ohci-exynos: Make provision for vdd regulators

Facilitate getting required 3.3V and 1.0V VDD supply for OHCI controller on Exynos. With patches for regulators' nodes merged in 3.15: c8c253f ARM: dts: Add regulator entries to smdk5420 275dcd2 ARM: dts: add max77686 pmic node for smdk5250, the exynos systems turn on only minimal number of regula

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