Hi Wolfram,
On Thu, Jul 10, 2014 at 5:16 PM, Wolfram Sang w...@the-dreams.de wrote:
This driver has been flagged to drop class based instantiation. The removal
improves boot-up time and is unneeded for embedded controllers. Users have
been
warned to switch for some time now, so we can
Hello Pankaj,
On 9 July 2014 09:30, Pankaj Dubey pankaj.du...@samsung.com wrote:
This patch series, modifies Exynos Power Management Unit (PMU) related code
for converting it into a platform_driver. This is also preparation for moving
PMU related code out of machine folder into a either
Hello Vikas,
On 7 July 2014 18:25, Vikas Sajjan vikas.saj...@samsung.com wrote:
Rebased on
1] Kukjin Kim's tree, for-next branch
https://git.kernel.org/cgit/linux/kernel/git/kgene/linux-samsung.git/log/?h=for-next
2] Pankaj Dubey's v6 PMU patchset
On 06/13/2014 02:39 AM, Mike Turquette wrote:
Quoting Tushar Behera (2014-06-12 00:29:23)
On Wed, Jun 11, 2014 at 10:20 PM, Mike Turquette mturque...@linaro.org
wrote:
Quoting Tushar Behera (2014-06-10 22:32:17)
When the output clock of AUDSS mux is disabled, we are getting kernel
oops
The DT bindings in exynos-adc.txt applies to the ADC
driver (exynos-adc.c) developed based on IIO framework.
The bindings are more appropriate to be under
Documentation/devicetree/bindings/iio/adc/
Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
To: devicet...@vger.kernel.org
---
This patch does the following
1. Use the syscon and Regmap API instead of ioremappaing the
ADC_PHY register from PMU.
2. Moves the exynos-adc.txt from bindings/arm/samsung/
to bindings/iio/adc/.
3. Updates the Documentation in exynos-adc.txt with syscon phandle
for the ADC nodes.
4.
This patch updates the IIO based ADC driver to use syscon and regmap
APIs to access and use PMU registers instead of remapping the PMU
registers in the driver.
Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
To: linux-...@vger.kernel.org
---
drivers/iio/adc/exynos_adc.c | 29
Instead of using the ADC_PHY register base address, use sysreg phandle
in ADC node to control ADC_PHY configuration register.
This patch adds syscon node for Exynos3250, Exynos4x12, Exynos5250,
and Exynos5420, Exynos5800.
Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
To:
Hi Naveen,
On Fri, Jul 11, 2014 at 2:36 PM, Naveen Krishna Chatradhi
ch.nav...@samsung.com wrote:
The DT bindings in exynos-adc.txt applies to the ADC
driver (exynos-adc.c) developed based on IIO framework.
The bindings are more appropriate to be under
Hello Sachin,
On 11 July 2014 14:47, Sachin Kamat spk.li...@gmail.com wrote:
Hi Naveen,
On Fri, Jul 11, 2014 at 2:36 PM, Naveen Krishna Chatradhi
ch.nav...@samsung.com wrote:
The DT bindings in exynos-adc.txt applies to the ADC
driver (exynos-adc.c) developed based on IIO framework.
The
On Fri, Jul 11, 2014 at 7:33 AM, Javier Martinez Canillas
javier.marti...@collabora.co.uk wrote:
Hello Amit,
On 07/10/2014 12:08 PM, amit daniel kachhap wrote:
On Fri, Jul 4, 2014 at 3:25 PM, Javier Martinez Canillas
javier.marti...@collabora.co.uk wrote:
MAX77686 PMIC support Dyamic Voltage
On Fri, Jul 11, 2014 at 7:15 AM, Javier Martinez Canillas
javier.marti...@collabora.co.uk wrote:
Hello Amit,
On 07/10/2014 11:59 AM, amit daniel kachhap wrote:
On Sat, Jul 5, 2014 at 1:54 AM, Javier Martinez Canillas
javier.marti...@collabora.co.uk wrote:
Some regulators on the MAX77686 PMIC
Instead of getting the clock names individually, it would be good to put
the logic within a loop.
Signed-off-by: Tushar Behera tusha...@samsung.com
---
drivers/clk/samsung/clk-exynos-audss.c | 33
1 file changed, 17 insertions(+), 16 deletions(-)
diff --git
The patchset is targetted as moving exising exynos-audss clock driver from being
a module driver. The driver is now registered through CLK_OF_DECLARE and is
inline with other Samsung clock drivers.
The patches are tested on Exynos5800 based Peach-Pi board. More tests are
welcome.
Tushar Behera
Change exynos-audss clock driver as per existing clock framework from
the existing module driver framework.
Signed-off-by: Tushar Behera tusha...@samsung.com
---
drivers/clk/samsung/clk-exynos-audss.c | 239
1 file changed, 87 insertions(+), 152 deletions(-)
Hi Javier,
On 11.07.2014 03:45, Javier Martinez Canillas wrote:
On 07/10/2014 11:59 AM, amit daniel kachhap wrote:
On Sat, Jul 5, 2014 at 1:54 AM, Javier Martinez Canillas
javier.marti...@collabora.co.uk wrote:
[snip]
@@ -111,6 +223,13 @@ static struct max77686_platform_data
Hi Tushar,
On 11.07.2014 11:37, Tushar Behera wrote:
The patchset is targetted as moving exising exynos-audss clock driver from
being
a module driver. The driver is now registered through CLK_OF_DECLARE and is
inline with other Samsung clock drivers.
I'm afraid I have to NAK this series or
On 07/11/2014 03:21 PM, Tomasz Figa wrote:
Hi Tushar,
On 11.07.2014 11:37, Tushar Behera wrote:
The patchset is targetted as moving exising exynos-audss clock driver from
being
a module driver. The driver is now registered through CLK_OF_DECLARE and is
inline with other Samsung clock
Hello Tomasz,
On 07/11/2014 11:43 AM, Tomasz Figa wrote:
Hi Javier,
On 11.07.2014 03:45, Javier Martinez Canillas wrote:
On 07/10/2014 11:59 AM, amit daniel kachhap wrote:
On Sat, Jul 5, 2014 at 1:54 AM, Javier Martinez Canillas
javier.marti...@collabora.co.uk wrote:
[snip]
@@ -111,6
On Fri, July 11, 2014, Sonny Rao wrote:
On Thu, Jul 10, 2014 at 5:28 AM, Seungwon Jeon tgih@samsung.com wrote:
Hi Sonny,
I have missed this patch.
You finally choose to take extra interrupt handling.
If it is not harm, it's fine.
Hi, thanks for coming back to it. Based on my
Hi Tushar,
On 11/07/14 11:37, Tushar Behera wrote:
Change exynos-audss clock driver as per existing clock framework from
the existing module driver framework.
Can you explain what's the actual issue you're trying to solve with that
patch ? What's the problem with this driver being a platform
Hello Naveen and Mark,
On Mon, Jul 7, 2014 at 1:22 PM, Javier Martinez Canillas
jav...@dowhile0.org wrote:
On Mon, Jul 7, 2014 at 10:31 AM, Naveen Krishna Ch
naveenkrishna...@gmail.com wrote:
Hence, spi-s3c64xx.c is broken since Jun 21 11:26:12 2013 and
considering the time with no
Instead of getting the clock names individually, it would be good to put
the logic within a loop.
Signed-off-by: Tushar Behera tusha...@samsung.com
---
Changes for V2:
* Calling clk_put as soon as the clock is not required anymore
drivers/clk/samsung/clk-exynos-audss.c | 35
Added an API to unregister all the clocks defined within a context. This
is helpful in case where the clock is registered through a platform
driver and we want to unregister the clocks during remove callback.
Signed-off-by: Tushar Behera tusha...@samsung.com
---
Changelog:
This is new patch
Using samsung clock APIs to register/unregister clocks will save some
lines of code.
Signed-off-by: Tushar Behera tusha...@samsung.com
---
Changes of v2:
* Retain platform driver structure.
drivers/clk/samsung/clk-exynos-audss.c | 146
1 file changed, 56
Generic cleanup and usage of samsung clock register/unregister APIs.
The patches are tested on Exynos5800 based Peach-Pi board. More tests are
welcome.
Tushar Behera (3):
clk: exynos-audss: Simplify code to get clock names
clk: samsung: Add API to unregister clocks
clk: exynos-audss: Use
On 07/11/2014 04:10 PM, Sylwester Nawrocki wrote:
Hi Tushar,
On 11/07/14 11:37, Tushar Behera wrote:
Change exynos-audss clock driver as per existing clock framework from
the existing module driver framework.
Can you explain what's the actual issue you're trying to solve with that
patch
On Thu, Jul 10, 2014 at 11:32:16PM +0100, Olav Haugan wrote:
On 7/9/2014 3:54 AM, Will Deacon wrote:
On Wed, Jul 09, 2014 at 02:07:38AM +0100, Olav Haugan wrote:
So how does an algorithm figure this out in both my examples? The
algorithm would have to know about both (all) bus masters and
On Thu, Jul 10, 2014 at 06:11:13PM +0200, Sylwester Nawrocki wrote:
Currently configuration of the CDCLK pad is being overwritten in
the i2s_shutdown() callback in order to gate the SoC output clock.
Applied, thanks.
signature.asc
Description: Digital signature
Fix building of exynos defconfig with disabled PM_SLEEP:
CONFIG_PM_SLEEP=n
CONFIG_PM_SLEEP_SMP=n
CONFIG_SUSPEND=n
The build error messages:
arch/arm/mach-exynos/built-in.o: In function `exynos_boot_secondary':
arch/arm/mach-exynos/platsmp.c:111: undefined reference to
`exynos_cpu_power_state'
The s3c_dma_client structures and the 'ch' and 'ops' members in
s3c_dma_params were only used by the legacy DMA driver and serve
no function any more. This removes any reference to them.
Signed-off-by: Arnd Bergmann a...@arndb.de
Cc: Heiko Stuebner he...@sntech.de
Cc: Sangbeom Kim
Commit ae602456e83c92 (ASoC: samsung: drop support for legacy
S3C24XX DMA API) removed the old code for the samsung specific
DMA interfaces, now that everybody can use dmaengine.
This picks up the few remaining pieces left over by that patch:
The most important one is the removal of the
On 07/07/14 18:32, Jacek Anaszewski wrote:
JPEG IP on Exynos3250 SoC requires enabling two clock
gates for its operation. This patch documents this
requirement.
Signed-off-by: Jacek Anaszewski j.anaszew...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Cc: Rob Herring
On Fri, Jul 11, 2014 at 01:04:07PM +0200, Javier Martinez Canillas wrote:
Hello Naveen and Mark,
On Mon, Jul 7, 2014 at 1:22 PM, Javier Martinez Canillas
jav...@dowhile0.org wrote:
On Mon, Jul 7, 2014 at 10:31 AM, Naveen Krishna Ch
naveenkrishna...@gmail.com wrote:
Please delete irrelevant
On 07/07/14 18:32, Jacek Anaszewski wrote:
+void exynos3250_jpeg_dec_scaling_ratio(void __iomem *regs,
+ unsigned int sratio)
+{
+ switch (sratio) {
+ case 1:
+ sratio = EXYNOS3250_DEC_SCALE_FACTOR_8_8;
+ break;
+
On 07/07/14 18:32, Jacek Anaszewski wrote:
Signed-off-by: Jacek Anaszewski j.anaszew...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Cc: Rob Herring robh...@kernel.org
Cc: Pawel Moll pawel.m...@arm.com
Cc: Mark Rutland mark.rutl...@arm.com
Cc: Ian Campbell
Signed-off-by: Jacek Anaszewski j.anaszew...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Cc: Kukjin Kim kgene@samsung.com
---
arch/arm/boot/dts/exynos3250.dtsi | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/exynos3250.dtsi
On Fri, Jul 11, 2014 at 3:20 AM, Seungwon Jeon tgih@samsung.com wrote:
On Fri, July 11, 2014, Sonny Rao wrote:
On Thu, Jul 10, 2014 at 5:28 AM, Seungwon Jeon tgih@samsung.com wrote:
Hi Sonny,
I have missed this patch.
You finally choose to take extra interrupt handling.
If it
This patch changes the fifo reset code to follow the reset procedure
outlined in the documentation of Synopsys Mobile storage host databook.
Signed-off-by: Sonny Rao sonny...@chromium.org
Signed-off-by: Yuvaraj Kumar C D yuvaraj...@samsung.com
---
v2: Add Generic DMA support
per the
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