Hi Pankaj,
On 09/27/2014 01:58 PM, Pankaj Dubey wrote:
Exynos3250 has four UART channels UART0,1,2 and 3. This patch adds
missing clock entries for UART2 and UART3.
CC: Mike Turquette mturque...@linaro.org
CC: Sylwester Nawrocki s.nawro...@samsung.com
Signed-off-by: Pankaj Dubey
Hi Chanwoo,
On Monday, September 29, 2014 7:42 AM, Chanwoo Choi wrote,
To: Pankaj Dubey
Cc: linux-arm-ker...@lists.infradead.org;
linux-samsung-soc@vger.kernel.org;
kgene@samsung.com; tomasz.f...@gmail.com; robh...@kernel.org;
li...@arm.linux.org.uk; naus...@samsung.com; Mike Turquette;
On Mon, Sep 29, 2014 at 11:47 AM, Pankaj Dubey pankaj.du...@samsung.com wrote:
Hi Chanwoo,
On Monday, September 29, 2014 7:42 AM, Chanwoo Choi wrote,
To: Pankaj Dubey
Cc: linux-arm-ker...@lists.infradead.org;
linux-samsung-soc@vger.kernel.org;
kgene@samsung.com; tomasz.f...@gmail.com;
The function exynos_irq_demux_eint16_31 uses pre-defined offsets for external
interrupt pending status and mask registers. So this function is not extensible
for Exynos7 SoC which has these registers at different offsets. Generalize
the exynos_irq_demux_eint16_31 function by using the pending/mask
Changes since v1:
- Marked the newly created irq_chip instances as __initdata
- Used kmemdup to keep a copy of the irq_chip
- Change the pinctrl name from sd0_rdqs to sd0_ds as per UM
- Moved the pinctrl enablement for exynos7 into a separate patch
- Added
Adding a irq_chip field to the samsung_pin_bank struct helps in
consolidating the irq domain callbacks for external gpio and wakeup
interrupt controllers. The exynos_wkup_irqd_ops and exynos_gpio_irqd_ops
have now been merged into a single exynos_eint_irqd_ops.
Signed-off-by: Abhilash Kesavan
From: Naveen Krishna Ch naveenkrishna...@gmail.com
Enable pinctrl support for exynos7 SoCs.
Signed-off-by: Naveen Krishna Ch naveenkrishna...@gmail.com
Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
Reviewed-by: Thomas Abraham thomas...@samsung.com
Tested-by: Thomas Abraham
From: Naveen Krishna Ch naveenkrishna...@gmail.com
This patch adds initial driver data for Exynos7 pinctrl support.
Signed-off-by: Naveen Krishna Ch naveenkrishna...@gmail.com
Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
Reviewed-by: Thomas Abraham thomas...@samsung.com
Tested-by:
From: Naveen Krishna Ch naveenkrishna...@gmail.com
Add intial pin configuration nodes for EXYNOS7.
Signed-off-by: Naveen Krishna Ch naveenkrishna...@gmail.com
Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
Reviewed-by: Thomas Abraham thomas...@samsung.com
Tested-by: Thomas Abraham
Exynos7 uses different offsets for wakeup interrupt configuration registers.
So a new irq_chip instance for Exynos7 wakeup interrupts is added. The irq_chip
selection is now based on the wakeup interrupt controller compatible string.
Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
From: Pankaj Dubey pankaj.du...@samsung.com
Exynos7 has a similar serial controller to that present in older Samsung
SoCs. To re-use the existing serial driver on Exynos7 we need to have
SERIAL_SAMSUNG_UARTS_4 and SERIAL_SAMSUNG_UARTS selected. This is not
possible because these symbols are
Hi Tomasz,
On Tue, Sep 23, 2014 at 8:19 PM, Tomasz Figa tomasz.f...@gmail.com wrote:
On 23.09.2014 10:16, Abhilash Kesavan wrote:
[snip]
@@ -383,9 +377,11 @@ static int exynos_wkup_irq_set_wake(struct irq_data
*irqd, unsigned int on)
/*
* irq_chip for wakeup interrupts
*/
-static
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