On 05/04/2015 07:32 PM, Kamil Debski wrote:
> Hi,
>
> The sixth version of this patchset addresses recent comments on the mailing
> list. Please see the changelog below for details.
Just in case people are wondering what happened to this: about a month ago I
took over from Kamil and I am working
On Mon, Jun 15, 2015 at 7:53 PM, Krzysztof Kozlowski
wrote:
> On 16.06.2015 08:47, Rafael J. Wysocki wrote:
>> On Wednesday, June 03, 2015 05:18:18 PM Paul Gortmaker wrote:
>>> This file is built off of a tristate Kconfig option ("ARM_EXYNOS_CPUFREQ")
>>> and also contains modular function calls s
Hello Krzysztof,
On 06/16/2015 01:57 AM, Krzysztof Kozlowski wrote:
> On 16.06.2015 00:23, Javier Martinez Canillas wrote: (...)
To do a more intrusive change, I should better understand the
interactions between the Exynos pinctrl / GPIO, interrupt
combiner and the GIC and in the me
On 16.06.2015 00:23, Javier Martinez Canillas wrote:
(...)
>>> To do a more intrusive change, I should better understand the interactions
>>> between the Exynos pinctrl / GPIO, interrupt combiner and the GIC and in the
>>> meantime S2R will continue to be broken on these platforms unless someone
>>
On 16.06.2015 08:47, Rafael J. Wysocki wrote:
> On Wednesday, June 03, 2015 05:18:18 PM Paul Gortmaker wrote:
>> This file is built off of a tristate Kconfig option ("ARM_EXYNOS_CPUFREQ")
>> and also contains modular function calls so it should explicitly include
>> module.h to avoid compile breaka
On Wednesday, June 03, 2015 05:18:18 PM Paul Gortmaker wrote:
> This file is built off of a tristate Kconfig option ("ARM_EXYNOS_CPUFREQ")
> and also contains modular function calls so it should explicitly include
> module.h to avoid compile breakage during pending header shuffles.
>
> Cc: "Rafael
Hi Joonyoung,
2015-06-12 Joonyoung Shim :
> When the fimd is disabled by fimd_disable(), enabled overlay layers also
> are disabled. If clocks for fimd are enabled by fimd_enable() on this
> case, it can lead IOMMU page fault. The reason is that VIDCON0_ENVID and
> VIDCON0_ENVID_F bits of VIDCON0
Hi Joonyoung,
2015-06-12 Joonyoung Shim :
> With atomic modesetting all the control for CRTC, Planes, Encoders and
> Connectors should come from DRM core, so the driver is not allowed to
> enable or disable planes from inside the crtc_enable()/disable() call.
>
> But it needs to disable planes w
Hi Joonyoung,
2015-06-12 Joonyoung Shim :
> The reason waiting vblank is to be power gated and disabled clocks after
> dma operation is completed. The dma operation is stopped already before
> be power gated and clocks are disabled when mixer is disabled by commit
> 381be025ac1a6("drm/exynos: sto
On 06/15, Alexey Klimov wrote:
>
> Patch removes unneeded container_of() macro
> in exynos4_local_timer_setup(). Instead let's pass mevt pointer
> to setup and stop functions from exynos4_mct_cpu_notify()
> and let them get evt pointer.
>
> Signed-off-by: Alexey Klimov
> ---
Acked-by: Stephen
Przemyslaw Marczak writes:
> On 06/15/2015 01:19 PM, Amit Kucheria wrote:
>> On Mon, Jun 15, 2015 at 3:49 PM, Przemyslaw Marczak
>> wrote:
>>> Hello Krzysztof,
>>>
>>>
>>> On 06/14/2015 10:56 AM, Krzysztof Kozłowski wrote:
>>
>>
>>
>>> I'm trying port the hardkernel's SPL to the mainline U-Boot
Krzysztof Kozłowski writes:
> 2014-11-25 15:21 GMT+09:00 Kevin Hilman :
>> From: Kevin Hilman
>>
>> Using the current exynos_defconfig on the exynos5422-odroid-xu3, only
>> 6 of 8 CPUs come online with MCPM boot. CPU0 is an A7, CPUs 1-4 are
>> A15s and CPU5-7 are the other A7s, but with the cur
Hello Sudeep,
On 06/15/2015 05:08 PM, Sudeep Holla wrote:
> On 15/06/15 16:00, Javier Martinez Canillas wrote:
>> On 06/15/2015 11:01 AM, Sudeep Holla wrote:
>>> On 15/06/15 08:46, Javier Martinez Canillas wrote:
[...]
>>>
>>> Agreed. But I would suggest also to add MASK_ON_SUSPEND and set_irq_w
On 15/06/15 16:00, Javier Martinez Canillas wrote:
Hello Sudeep,
On 06/15/2015 11:01 AM, Sudeep Holla wrote:
On 15/06/15 08:46, Javier Martinez Canillas wrote:
[...]
Sudeep, so we may need something like $subject after all from Doug's
explanations since the combiner chip state is lost du
Hello Sudeep,
On 06/15/2015 11:01 AM, Sudeep Holla wrote:
>
>
> On 15/06/15 08:46, Javier Martinez Canillas wrote:
> [...]
>
>>
>> Sudeep, so we may need something like $subject after all from Doug's
>> explanations since the combiner chip state is lost during a S2R. I know
>> that it adds more
On 06/15/2015 02:17 PM, Krzysztof Kozłowski wrote:
2015-06-15 19:19 GMT+09:00 Przemyslaw Marczak :
Hello Krzysztof,
On 06/14/2015 10:56 AM, Krzysztof Kozłowski wrote:
Hi,
+Cc Marek, Bartlomiej, Kukjin Kim,
I would like to bring back this topic. Unfortunately I don't have
access to sourc
One should not do any assumptions on the stare of the fimd hardware
during driver initialization, so to properly reset fimd before enabling
IOMMU, one should ensure that all power domains and clocks are really
enabled. This patch adds pm_runtime and clocks management in the
fimd_clear_channel() fun
Hello,
On 2015-06-12 15:51, Inki Dae wrote:
On 2015년 06월 12일 21:10, Inki Dae wrote:
On 2015년 06월 12일 18:07, Marek Szyprowski wrote:
One should not do any assumptions on the stare of the fimd hardware
during driver initialization, so to properly reset fimd before enabling
IOMMU, one should ensu
On 06/15/2015 01:19 PM, Amit Kucheria wrote:
On Mon, Jun 15, 2015 at 3:49 PM, Przemyslaw Marczak
wrote:
Hello Krzysztof,
On 06/14/2015 10:56 AM, Krzysztof Kozłowski wrote:
I'm trying port the hardkernel's SPL to the mainline U-Boot at present. The
mainline SPL is implemented for E5420 a
Wolfram, Dmitry, Olof,
Enjoy!
The following changes since commit 5ebe6afaf0057ac3eaeb98defd5456894b446d22:
Linux 4.1-rc2 (2015-05-03 19:22:23 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd.git
ib-mfd-i2c-input-chrome-4.2
for you to fe
On Tue, 09 Jun 2015, Javier Martinez Canillas wrote:
> From: Alexandru M Stan
>
> Some ECs need a little time for waking up before they can accept
> SPI data at a high speed. This is configurable via a DT property
> "google,cros-ec-spi-pre-delay".
>
> This patch makes the cros_ec_spi driver to
On Tue, 09 Jun 2015, Javier Martinez Canillas wrote:
> From: Alexandru M Stan
>
> Some ECs need a little time for waking up before they can accept
> SPI data at a high speed. Add a "google,cros-ec-spi-pre-delay"
> property to the DT binding to configure this.
>
> If this property isn't set, the
On Tue, 09 Jun 2015, Javier Martinez Canillas wrote:
> From: Gwendal Grignou
>
> Chromebooks can have more than one Embedded Controller so the
> cros_ec device id has to be incremented for each EC registered.
>
> Add a new structure to represent multiple EC as different char
> devices (e.g: /de
On Tue, 09 Jun 2015, Javier Martinez Canillas wrote:
> From: Stephen Barber
>
> Add proto v3 support to the SPI, I2C, and LPC.
>
> Signed-off-by: Stephen Barber
> Signed-off-by: Javier Martinez Canillas
> Tested-by: Heiko Stuebner
> Reviewed-by: Gwendal Grignou
> Tested-by: Gwendal Grignou
On Tue, 09 Jun 2015, Javier Martinez Canillas wrote:
> The MFD driver should only have the logic to instantiate its child devices
> and setup any shared resources that will be used by the subdevices drivers.
>
> The cros_ec MFD is more complex than expected since it also has helpers to
> communic
On Tue, 09 Jun 2015, Javier Martinez Canillas wrote:
> From: Stephen Barber
>
> Add support in cros_ec.c to handle EC host command protocol v3.
> For v3+, probe for maximum shared protocol version and max
> request, response, and passthrough sizes. For now, this will
> always fall back to v2, si
On Tue, 09 Jun 2015, Javier Martinez Canillas wrote:
> Commit 1b84f2a4cd4a ("mfd: cros_ec: Use fixed size arrays to transfer
> data with the EC") modified the struct cros_ec_command fields to not
> use pointers for the input and output buffers and use fixed length
> arrays instead.
>
> This chang
On Tue, 09 Jun 2015, Javier Martinez Canillas wrote:
> From: Stephen Barber
>
> Update cros_ec_commands.h to the latest version in the EC
> firmware sources and add power domain and passthru commands.
>
> Also, update lightbar to use new command names.
>
> Signed-off-by: Stephen Barber
> Revi
2015-06-15 19:19 GMT+09:00 Przemyslaw Marczak :
> Hello Krzysztof,
>
>
> On 06/14/2015 10:56 AM, Krzysztof Kozłowski wrote:
>>
>>
>> Hi,
>>
>> +Cc Marek, Bartlomiej, Kukjin Kim,
>>
>>
>> I would like to bring back this topic. Unfortunately I don't have
>> access to source code of BL1 (or any other
On Mon, Jun 15, 2015 at 3:49 PM, Przemyslaw Marczak
wrote:
> Hello Krzysztof,
>
>
> On 06/14/2015 10:56 AM, Krzysztof Kozłowski wrote:
> I'm trying port the hardkernel's SPL to the mainline U-Boot at present. The
> mainline SPL is implemented for E5420 and E5800. But there are few
> differences
Hello Krzysztof,
On 06/14/2015 10:56 AM, Krzysztof Kozłowski wrote:
2014-11-25 15:21 GMT+09:00 Kevin Hilman :
From: Kevin Hilman
Using the current exynos_defconfig on the exynos5422-odroid-xu3, only
6 of 8 CPUs come online with MCPM boot. CPU0 is an A7, CPUs 1-4 are
A15s and CPU5-7 are the o
Hi,
+ Cc Przemyslaw Marczak (he is working on fixing u-boot fox XU3)
Best regards,
--
Bartlomiej Zolnierkiewicz
Samsung R&D Institute Poland
Samsung Electronics
On Sunday, June 14, 2015 05:56:20 PM Krzysztof Kozłowski wrote:
> 2014-11-25 15:21 GMT+09:00 Kevin Hilman :
> > From: Kevin Hilman
>
The magic cookie for entering sleep state was defined and used in two
different places: firmware.c and suspend.c. Move it to one common place
to reduce duplication.
Signed-off-by: Krzysztof Kozlowski
---
arch/arm/mach-exynos/common.h | 6 ++
arch/arm/mach-exynos/firmware.c | 2 --
arch/arm
Am 15.06.2015 um 10:58 schrieb Linus Walleij:
On Sat, Jun 13, 2015 at 8:27 PM, Alexander Holler wrote:
And because you've said that "problem space is a bit convoluted" and I
disagree, here's a summary from my point of view:
1. All the necessary information (dependencies between drivers) alrea
On 15/06/15 08:46, Javier Martinez Canillas wrote:
[...]
Sudeep, so we may need something like $subject after all from Doug's
explanations since the combiner chip state is lost during a S2R. I know
that it adds more duplicated code (others irqchip drivers do the same)
and it may not scale wel
On Sat, Jun 13, 2015 at 8:27 PM, Alexander Holler wrote:
> And because you've said that "problem space is a bit convoluted" and I
> disagree, here's a summary from my point of view:
>
> 1. All the necessary information (dependencies between drivers) already
> exists at compile time. The set of de
On 12/06/15 21:17, Doug Anderson wrote:
Hi,
On Fri, Jun 12, 2015 at 12:36 PM, Javier Martinez Canillas
wrote:
registers are lost assuming the combiner was powered down, even the
status register will be lost and you will not know exactly the wakeup
reason right ?
Good question, I didn't fi
Hi Anand, Krzysztof
Am 15.06.2015 um 04:23 schrieb Anand Moon:
> hi Krzysztof
>
> On 15 June 2015 at 05:41, Krzysztof Kozlowski wrote:
>> On 14.06.2015 19:24, Anand Moon wrote:
>>> This changes enables TMU IP block on the Exynos5422 Odroid-XU3
>>> device.
>>>
>>> Signed-off-by: Anand Moon
>>> T
As a follow-up to recent changes to Exynos mipi video phy
driver, introducing support for PMU regmap in commit
e4b3d38088df6f3acd40 ("phy: exynos-video-mipi: Fix regression
by adding support for PMU regmap") add a syscon phandle to
video-phy node to bring back to life both MIPI DSI display
and MIPI
Hello Doug,
Thanks a lot for your comments.
On 06/12/2015 10:17 PM, Doug Anderson wrote:
> Hi,
>
> On Fri, Jun 12, 2015 at 12:36 PM, Javier Martinez Canillas
> wrote:
registers are lost assuming the combiner was powered down, even the
status register will be lost and you will not know
On 2015년 06월 12일 22:00, Marek Szyprowski wrote:
> Hello,
>
> On 2015-06-12 14:10, Inki Dae wrote:
>> On 2015년 06월 12일 18:07, Marek Szyprowski wrote:
>>> One should not do any assumptions on the stare of the fimd hardware
>>> during driver initialization, so to properly reset fimd before enabling
>
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