Hmm,
this looks a lot like my patch from some time ago:
http://www.spinics.net/lists/linux-samsung-soc/msg43677.html
With best wishes,
Tobias
Marek Szyprowski wrote:
Exynos DRM reported that all planes for all supported sub-devices supports
only three pixel formats: XRGB24, ARGB24 and NV12.
Exynos DRM reported that all planes for all supported sub-devices supports
only three pixel formats: XRGB24, ARGB24 and NV12. This patch lets each
Exynos DRM sub-drivers to provide the list of supported pixel formats
and registers this list to DRM core.
Signed-off-by: Marek Szyprowski
On Wed, Aug 19, 2015 at 03:53:44PM +0200, Tobias Jakobi wrote:
Adding Jérôme to Cc. I think he looked the userptr code before, so maybe
he has some idea what is going wrong here.
I also had a look at the code, but my knowledge about the DMA API is
almost nonexistant. However I can see that
Adding Jérôme to Cc. I think he looked the userptr code before, so maybe
he has some idea what is going wrong here.
I also had a look at the code, but my knowledge about the DMA API is
almost nonexistant. However I can see that before doing any DMA via the
G2D on the buffer the code calls
Rockchip have three clocks for dp controller, we leave pclk_edp
to analogix_dp driver control, and keep the sclk_edp_24m and
sclk_edp in platform driver.
Signed-off-by: Yakir Yang y...@rock-chips.com
---
Changes in v3:
- Take Thierry Reding and Heiko suggest, leave sclk_edp_24m to rockchip
dp
Signed-off-by: Yakir Yang y...@rock-chips.com
---
Changes in v3:
- Take Heiko suggest, add rockchip dp phy driver,
collect the phy clocks and power control.
Changes in v2: None
.../devicetree/bindings/phy/rockchip-dp-phy.txt| 26 +++
drivers/phy/Kconfig|
link_rate and lane_count already configed in analogix_dp_set_link_train(),
so we don't need to config those repeatly after training finished, just
remove them out.
Beside Display Port 1.2 already support 5.4Gbps link rate, the maximum sets
would change from {1.62Gbps, 2.7Gbps} to {1.62Gbps,
RK3288 need some special registers setting, we can separate
them out by the dev_type of plat_data.
Signed-off-by: Yakir Yang y...@rock-chips.com
---
Changes in v3: None
Changes in v2:
- Fix compile failed dut to phy_pd_addr variable misspell error
drivers/gpu/drm/bridge/analogix_dp_reg.c | 76
On Wed, Aug 19, 2015 at 08:58:24AM +0530, Pratyush Anand wrote:
/sys/class/watchdog/watchdogn/device/modalias can help to identify the
driver/module for a given watchdog node. However, many wdt devices does not
set
its parent and so, we do not see an entry for device in sysfs for such
Hi all,
The Samsung Exynos eDP controller and Rockchip RK3288 eDP controller
share the same IP, so a lot of parts can be re-used. I split the common
code into bridge directory, then rk3288 and exynos only need to keep
some platform code. Cause I can't find the exact IP name of exynos dp
After run checkpatch.pl -f --subjective command, I see there
are lots of alignment problem in exynos_dp driver, so let just
fix them.
Signed-off-by: Yakir Yang y...@rock-chips.com
---
Changes in v3: None
Changes in v2:
- Take Joe Preches advise, improved commit message more readable, and
avoid
Hello,
This series contains a couple of build fixes and cleanups for the
Media Controller framework. The goal of the series is to get rid of
the struct media_entity .parent member since now that a media_gobj is
embedded into entities, the media_gobj .mdev member can be used to
store a pointer to
The struct media_entity has a .parent field that stores a pointer
to the parent struct media_device. But recently a media_gobj was
embedded into the entities and since struct media_gojb already has
a pointer to a struct media_device in the .mdev field, the .parent
field becomes redundant and can
Both hsync/vsync polarity and interlace mode can be parsed from
drm display mode, and dynamic_range and ycbcr_coeff can be judge
by the video code.
But presumably Exynos still relaies on the DT properties, so take
good use of mode_fixup() in to achieve the compatibility hacks.
Signed-off-by:
Analogix dp driver is split from exynos dp driver, so we just
make an copy of exynos_dp.txt, and then simplify exynos_dp.txt
Beside update some exynos dtsi file with the latest change
according to the devicetree binding documents.
Signed-off-by: Yakir Yang y...@rock-chips.com
---
Changes in v3:
On Wed, Aug 19, 2015 at 10:08 AM, Jerome Glisse jgli...@redhat.com wrote:
On Wed, Aug 19, 2015 at 03:53:44PM +0200, Tobias Jakobi wrote:
Adding Jérôme to Cc. I think he looked the userptr code before, so maybe
he has some idea what is going wrong here.
I also had a look at the code, but my
In order to move exynos dp code to bridge directory,
we need to convert driver drm bridge mode first. As
dp driver already have a ptn3460 bridge, so we need
to move ptn bridge to the next bridge of dp bridge.
Signed-off-by: Yakir Yang y...@rock-chips.com
---
Changes in v3: None
Changes in v2:
-
Some edp screen do not have hpd signal, so we can't just return
failed when hpd plug in detect failed.
This is an hardware property, so we need add a devicetree property
analogix,need-force-hpd to indicate this sutiation.
Signed-off-by: Yakir Yang y...@rock-chips.com
---
Changes in v3:
- Add
Signed-off-by: Yakir Yang y...@rock-chips.com
---
Changes in v3:
- move dp hpd detect to connector detect function.
Changes in v2: None
drivers/gpu/drm/bridge/analogix_dp_core.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git
Display Port monitor could support kinds of mode which indicate
in monitor edid, not just one single display resolution which
defined in panel or devivetree property display timing.
Signed-off-by: Yakir Yang y...@rock-chips.com
---
Changes in v3:
- Add edid modes parse support
Changes in v2:
Signed-off-by: Yakir Yang y...@rock-chips.com
---
Changes in v3: None
Changes in v2:
- Add GNU license v2 declared and samsung copyright
drivers/gpu/drm/exynos/analogix_dp-exynos.c | 1 +
drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 1 +
include/drm/bridge/analogix_dp.h
Some edp screen with no hpd signal would need some delay time
to ensure that screen would be ready for work, so we can expand
the delay time in hpd detect function, it works prefectly on my
rk3288 sdk board.
Signed-off-by: Yakir Yang y...@rock-chips.com
---
Changes in v3: None
Changes in v2: None
Hi Javier,
Em Wed, 19 Aug 2015 17:35:18 +0200
Javier Martinez Canillas jav...@osg.samsung.com escreveu:
Hello,
This series contains a couple of build fixes and cleanups for the
Media Controller framework. The goal of the series is to get rid of
the struct media_entity .parent member since
Hello,
On 08/18/2015 09:01 AM, Javier Martinez Canillas wrote:
The ChromeOS mfd driver (MFD_CROS_EC) select the CROS_EC_PROTO config
symbol because the driver uses some communication helper functions in
drivers/platform/chrome/cros_ec_proto.c but other drivers depends on
CROS_EC_PROTO
If registering the driver fails take care that runtime PM is properly
cleaned up.
Signed-off-by: Heiner Kallweit hkallwe...@gmail.com
---
drivers/spi/spi-s3c64xx.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c
index
Extend the driver to make full use of runtime PM autosuspend.
Before only the SPI core was instructed to use autosuspend
by setting master-auto_runtime_pm. Nevertheless due to the missing
pm_runtime_use_autosuspend call autosuspend wasn't active.
Signed-off-by: Heiner Kallweit
Am 19.08.2015 um 07:54 schrieb Heiner Kallweit:
Am 19.08.2015 um 02:35 schrieb Krzysztof Kozlowski:
On 19.08.2015 06:06, Heiner Kallweit wrote:
The patch fixes / extends the runtime PM handling.
- Currently the driver instructs the SPI core to use auto-suspend
but doesn't configure it. Add
The runtime PM suspend / resume handlers take care of the enabling/
disabling the clocks already.
Therefore replace the duplicated clock handling with
pm_runtime_force_suspend/resume.
Signed-off-by: Heiner Kallweit hkallwe...@gmail.com
---
drivers/spi/spi-s3c64xx.c | 15 +++
1 file
On 20.08.2015 04:54, Heiner Kallweit wrote:
Extend the driver to make full use of runtime PM autosuspend.
Before only the SPI core was instructed to use autosuspend
by setting master-auto_runtime_pm. Nevertheless due to the missing
pm_runtime_use_autosuspend call autosuspend wasn't active.
On 20 August 2015 at 00:48, Yakir Yang y...@rock-chips.com wrote:
Hi all,
The Samsung Exynos eDP controller and Rockchip RK3288 eDP controller
share the same IP, so a lot of parts can be re-used. I split the common
code into bridge directory, then rk3288 and exynos only need to keep
some
On 20.08.2015 04:36, Heiner Kallweit wrote:
Am 19.08.2015 um 07:54 schrieb Heiner Kallweit:
Am 19.08.2015 um 02:35 schrieb Krzysztof Kozlowski:
On 19.08.2015 06:06, Heiner Kallweit wrote:
The patch fixes / extends the runtime PM handling.
- Currently the driver instructs the SPI core to use
Hi Dave,
On 08/19/2015 06:54 PM, Dave Airlie wrote:
On 20 August 2015 at 00:48, Yakir Yang y...@rock-chips.com wrote:
Hi all,
The Samsung Exynos eDP controller and Rockchip RK3288 eDP controller
share the same IP, so a lot of parts can be re-used. I split the common
code into bridge
Kukjin Kim wrote:
Hello Arnd, Olof, Kevin
Hi,
Please pull and if any comments, please kindly let me know.
Thanks,
Kukjin
Here is re-spin of pull request for Samsung stuff for v4.3 as per Olof's
suggestion.
Most of this pull-requests are to switch to support generic cpufreq
driver for
Hi Pratyush,
On 08/19/2015 05:28 AM, Pratyush Anand wrote:
diff --git a/drivers/watchdog/st_lpc_wdt.c b/drivers/watchdog/st_lpc_wdt.c
index 6785afdc0fca..14e9badf2bfa 100644
--- a/drivers/watchdog/st_lpc_wdt.c
+++ b/drivers/watchdog/st_lpc_wdt.c
@@ -241,6 +241,7 @@ static int
Now that a link can be either between two different graph
objects, we'll need to add more functions to create links.
So, rename the existing one that create links only between
two pads as media_create_pad_link().
No functional changes.
This patch was created via this shell script:
for i
Am 20.08.2015 um 01:46 schrieb Krzysztof Kozlowski:
On 20.08.2015 04:54, Heiner Kallweit wrote:
Extend the driver to make full use of runtime PM autosuspend.
Before only the SPI core was instructed to use autosuspend
by setting master-auto_runtime_pm. Nevertheless due to the missing
Am 20.08.2015 um 01:41 schrieb Krzysztof Kozlowski:
On 20.08.2015 04:36, Heiner Kallweit wrote:
Am 19.08.2015 um 07:54 schrieb Heiner Kallweit:
Am 19.08.2015 um 02:35 schrieb Krzysztof Kozlowski:
On 19.08.2015 06:06, Heiner Kallweit wrote:
The patch fixes / extends the runtime PM handling.
-
On 2015. 8. 20., at PM 1:29, Archit Taneja arch...@codeaurora.org wrote:
Hi,
On 08/19/2015 08:18 PM, Yakir Yang wrote:
Hi all,
The Samsung Exynos eDP controller and Rockchip RK3288 eDP controller
share the same IP, so a lot of parts can be re-used. I split the common
code into
Hello,
On Wed, Aug 19, 2015 at 08:58:24AM +0530, Pratyush Anand wrote:
/sys/class/watchdog/watchdogn/device/modalias can help to identify the
driver/module for a given watchdog node. However, many wdt devices does not
set
s/es//
its parent and so, we do not see an entry for device in sysfs
On Wed, Aug 19, 2015 at 08:58:24AM +0530, Pratyush Anand wrote:
[...]
diff --git a/drivers/watchdog/tegra_wdt.c b/drivers/watchdog/tegra_wdt.c
index 30451ea46902..7f97cdd53f29 100644
--- a/drivers/watchdog/tegra_wdt.c
+++ b/drivers/watchdog/tegra_wdt.c
@@ -218,6 +218,7 @@ static int
Hello Joonyoung Shim,
The patch 2a8cb4894540: drm/exynos: merge exynos_drm_buf.c to
exynos_drm_gem.c from Aug 16, 2015, leads to the following static
checker warning:
drivers/gpu/drm/exynos/exynos_drm_gem.c:610
exynos_drm_gem_prime_import_sg_table()
error: 'exynos_gem_obj'
Hi,
On 08/19/2015 05:35 PM, Dan Carpenter wrote:
Hello Joonyoung Shim,
The patch 2a8cb4894540: drm/exynos: merge exynos_drm_buf.c to
exynos_drm_gem.c from Aug 16, 2015, leads to the following static
checker warning:
drivers/gpu/drm/exynos/exynos_drm_gem.c:610
On 19.08.2015 17:19, Marek Szyprowski wrote:
DWC2 (s3c-hsotg) hardware module is available on many Exynos based boards,
so enable DWC2 driver as well as the most common USB Ethernet gadget.
Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
Reviewed-by: Javier Martinez Canillas
DWC2 (s3c-hsotg) hardware module is available on many Exynos based boards,
so enable DWC2 driver as well as the most common USB Ethernet gadget.
Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
Reviewed-by: Javier Martinez Canillas jav...@osg.samsung.com
---
Changes since v1: build DWC2
On 08/18/2015 10:04 PM, Mauro Carvalho Chehab wrote:
Now that a link can be either between two different graph
objects, we'll need to add more functions to create links.
So, rename the existing one that create links only between
two pads as media_create_pad_link().
No functional changes.
Hi,
On Wednesday 19 August 2015 08:21 PM, Yakir Yang wrote:
Signed-off-by: Yakir Yang y...@rock-chips.com
where's the commit message?
---
Changes in v3:
- Take Heiko suggest, add rockchip dp phy driver,
collect the phy clocks and power control.
Changes in v2: None
Hi,
On 08/19/2015 08:18 PM, Yakir Yang wrote:
Hi all,
The Samsung Exynos eDP controller and Rockchip RK3288 eDP controller
share the same IP, so a lot of parts can be re-used. I split the common
code into bridge directory, then rk3288 and exynos only need to keep
some platform code. Cause
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