2015-08-28 18:28 GMT+09:00 Alim Akhtar alim.akh...@samsung.com:
Adding required mux/div/gate clocks for UFS controller
present on Exynos7.
Signed-off-by: Alim Akhtar alim.akh...@samsung.com
---
This patch has a dependency on [1]
[1]-
This adds BUS1 instance pinctrl for exynos7 soc.
Signed-off-by: Alim Akhtar alim.akh...@samsung.com
---
arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi | 111 +++
arch/arm64/boot/dts/exynos/exynos7.dtsi |7 ++
2 files changed, 118 insertions(+)
diff --git
Michael/Sylwester, could you please merge this patch?
It is a bugfix for ddeac8d968d41d13a52582d6e80395a329e9b1ff (clk:
samsung: add infrastructure to register cpu clocks) which got
merged in v4.2-rc1.
Best regards,
--
Bartlomiej Zolnierkiewicz
Samsung RD Institute Poland
Samsung Electronics
On 29/06/15 19:29, Bartlomiej Zolnierkiewicz wrote:
CLK_CPU_HAS_DIV1 and CLK_CPU_NEEDS_DEBUG_ALT_DIV masks were
incorrectly used as a bit numbers. Fix it.
Tested on Exynos4210 based Origen board and on Exynos5250 based
Arndale board.
Cc: Tomasz Figa tomasz.f...@gmail.com
Cc: Michael
Hello Bartlomiej and Lorenzo,
Thanks a lot for your explanations.
On 08/27/2015 06:58 PM, Bartlomiej Zolnierkiewicz wrote:
Hi,
On Tuesday, August 25, 2015 05:09:32 PM Lorenzo Pieralisi wrote:
On Tue, Aug 25, 2015 at 03:35:29PM +0100, Bartlomiej Zolnierkiewicz wrote:
[ added Lorenzo and
On Fri, 2015-08-28 at 10:16 +0200, Javier Martinez Canillas wrote:
Some Exynos big.LITTLE boards (i.e: Exynos5420 and Exynos5800 based
Chromebooks) have proper firmware that allow the big.LITTLE CPUidle
driver to work correctly, so enable support for this.
Signed-off-by: Javier Martinez
Some Exynos big.LITTLE boards (i.e: Exynos5420 and Exynos5800 based
Chromebooks) have proper firmware that allow the big.LITTLE CPUidle
driver to work correctly, so enable support for this.
Signed-off-by: Javier Martinez Canillas jav...@osg.samsung.com
---
Kukjin and Krzysztof,
As you know
Hello Sjoerd,
On 08/28/2015 10:51 AM, Sjoerd Simons wrote:
On Fri, 2015-08-28 at 10:16 +0200, Javier Martinez Canillas wrote:
Some Exynos big.LITTLE boards (i.e: Exynos5420 and Exynos5800 based
Chromebooks) have proper firmware that allow the big.LITTLE CPUidle
driver to work correctly, so
Adding required mux/div/gate clocks for UFS controller
present on Exynos7.
Signed-off-by: Alim Akhtar alim.akh...@samsung.com
---
This patch has a dependency on [1]
[1]-
https://www.mail-archive.com/linux-samsung-soc@vger.kernel.org/msg46122.html
drivers/clk/samsung/clk-exynos7.c | 117
W dniu 28.08.2015 o 17:35, Javier Martinez Canillas pisze:
Hello Bartlomiej and Lorenzo,
Thanks a lot for your explanations.
On 08/27/2015 06:58 PM, Bartlomiej Zolnierkiewicz wrote:
If somebody wants to implement a separate Exynos542x/Exynos5800
big.LITTLE cpuidle driver for them I see
Hi,
On Friday, August 28, 2015 09:42:35 PM Krzysztof Kozlowski wrote:
W dniu 28.08.2015 o 17:35, Javier Martinez Canillas pisze:
Hello Bartlomiej and Lorenzo,
Thanks a lot for your explanations.
On 08/27/2015 06:58 PM, Bartlomiej Zolnierkiewicz wrote:
If somebody wants to
Em Wed, 26 Aug 2015 11:54:03 -0300
Mauro Carvalho Chehab mche...@osg.samsung.com escreveu:
Em Tue, 25 Aug 2015 12:55:41 -0600
Shuah Khan shua...@osg.samsung.com escreveu:
On 08/23/2015 02:17 PM, Mauro Carvalho Chehab wrote:
Now that a link can be either between two different graph
CLK_CPU_HAS_DIV1 and CLK_CPU_NEEDS_DEBUG_ALT_DIV masks were
incorrectly used as a bit numbers. Fix it.
Tested on Exynos4210 based Origen board and on Exynos5250 based
Arndale board.
Cc: Tomasz Figa tomasz.f...@gmail.com
Cc: Michael Turquette mturque...@baylibre.com
Cc: Thomas Abraham
Hi,
On 08/28/2015 03:36 PM, Krzysztof Kozlowski wrote:
2015-08-28 18:28 GMT+09:00 Alim Akhtar alim.akh...@samsung.com:
Adding required mux/div/gate clocks for UFS controller
present on Exynos7.
Signed-off-by: Alim Akhtar alim.akh...@samsung.com
---
This patch has a dependency on [1]
[1]-
14 matches
Mail list logo
