On 10.12.2015 16:44, Krzysztof Kozlowski wrote:
> On 09.12.2015 22:58, Marek Szyprowski wrote:
>> Enable support for Multimedia Codec (MFC) device for all Exynos4412-based
... and one more finding: I think the abbreviation is Multi Format Codec.
BR,
Krzysztof
>> Odroid boards.
>>
>> Signed-off-b
On 09.12.2015 22:58, Marek Szyprowski wrote:
> Enable support for Multimedia Codec (MFC) device for all Exynos4412-based
> Odroid boards.
>
> Signed-off-by: Marek Szyprowski
> ---
> arch/arm/boot/dts/exynos4412-odroid-common.dtsi | 24
> 1 file changed, 24 insertions(+)
On 2015년 12월 10일 15:58, Krzysztof Kozlowski wrote:
> On 09.12.2015 13:08, Chanwoo Choi wrote:
>> This patch adds the bus device-tree node of INT (internal) block
>> to enable the bus frequency. The following sub-blocks share
>
> "to enable the bus frequency scaling"
>
>> the VDD_INT power source:
On 2015년 12월 10일 16:08, Krzysztof Kozlowski wrote:
> On 09.12.2015 13:08, Chanwoo Choi wrote:
>> THis patch adds the bus device tree nodes for both MIF (Memory) and INT
>> (Internal) block to enable the bus frequency.
>>
>> The DMC bus is parent device in MIF block using VDD_MIF and the LEFTBUS
>>
On 2015년 12월 10일 16:02, Krzysztof Kozlowski wrote:
> On 09.12.2015 13:08, Chanwoo Choi wrote:
>> This patch expands the voltage range of buck1/3 regulator due to as
>> following:
>> - MIF (Memory Interface) bus frequency needs the 9uV ~ 105uV V.
>> - INT (Internal) bus frequency needs 9000
On 2015년 12월 10일 16:12, Krzysztof Kozlowski wrote:
> On 10.12.2015 16:07, Chanwoo Choi wrote:
>> On 2015년 12월 10일 15:53, Krzysztof Kozlowski wrote:
>>> On 10.12.2015 15:43, Chanwoo Choi wrote:
On 2015년 12월 10일 15:32, Krzysztof Kozlowski wrote:
> On 10.12.2015 15:08, Chanwoo Choi wrote:
>>>
On 10.12.2015 16:07, Chanwoo Choi wrote:
> On 2015년 12월 10일 15:53, Krzysztof Kozlowski wrote:
>> On 10.12.2015 15:43, Chanwoo Choi wrote:
>>> On 2015년 12월 10일 15:32, Krzysztof Kozlowski wrote:
On 10.12.2015 15:08, Chanwoo Choi wrote:
> On 2015년 12월 10일 14:57, Krzysztof Kozlowski wrote:
>>>
On 09.12.2015 13:08, Chanwoo Choi wrote:
> THis patch adds the bus device tree nodes for both MIF (Memory) and INT
> (Internal) block to enable the bus frequency.
>
> The DMC bus is parent device in MIF block using VDD_MIF and the LEFTBUS
> bus is parent device in INT block using VDD_INT.
>
> Sig
On 2015년 12월 10일 15:53, Krzysztof Kozlowski wrote:
> On 10.12.2015 15:43, Chanwoo Choi wrote:
>> On 2015년 12월 10일 15:32, Krzysztof Kozlowski wrote:
>>> On 10.12.2015 15:08, Chanwoo Choi wrote:
On 2015년 12월 10일 14:57, Krzysztof Kozlowski wrote:
> On 09.12.2015 13:08, Chanwoo Choi wrote:
>>>
On 09.12.2015 13:08, Chanwoo Choi wrote:
> This patch expands the voltage range of buck1/3 regulator due to as following:
> - MIF (Memory Interface) bus frequency needs the 9uV ~ 105uV V.
> - INT (Internal) bus frequency needs 9uV ~ 100uV.
9->90 and duplicated "uV V". Maybe
On 09.12.2015 13:08, Chanwoo Choi wrote:
> This patch adds the bus device-tree node of INT (internal) block
> to enable the bus frequency. The following sub-blocks share
"to enable the bus frequency scaling"
> the VDD_INT power source:
> - LEFTBUS (parent device)
> - RIGHTBUS
> - PERIL
> - LCD0
>
On 10.12.2015 15:48, Inki Dae wrote:
> CCing Mr. Kukjin and Krzysztof
>
>
> Hi Kukjin and Krzysztof,
>
> Below patch includes dt binding about gsc device but it'd be nice this patch
> to exynos drm tree with others.
> So could you give me Acked-by so that I can merge it to exynos drm tree?
>
>
On 10.12.2015 15:43, Chanwoo Choi wrote:
> On 2015년 12월 10일 15:32, Krzysztof Kozlowski wrote:
>> On 10.12.2015 15:08, Chanwoo Choi wrote:
>>> On 2015년 12월 10일 14:57, Krzysztof Kozlowski wrote:
On 09.12.2015 13:08, Chanwoo Choi wrote:
> This patch adds the bus noes using VDD_INT for Exynos4
CCing Mr. Kukjin and Krzysztof
Hi Kukjin and Krzysztof,
Below patch includes dt binding about gsc device but it'd be nice this patch to
exynos drm tree with others.
So could you give me Acked-by so that I can merge it to exynos drm tree?
Thanks,
Inki Dae
2015년 11월 30일 22:53에 Marek Szyprowski
On 09.12.2015 13:08, Chanwoo Choi wrote:
> This patch add dt node for PPMU_{DMC0|DMC1|LEFTBUS|RIGHTBUS} for
> exynos4412-odroidu3 board. Each PPMU dt node includes one event of
> 'PPMU Count3'.
>
> Signed-off-by: Chanwoo Choi
> ---
> arch/arm/boot/dts/exynos4412-odroid-common.dtsi | 40
> ++
On 2015년 12월 10일 15:32, Krzysztof Kozlowski wrote:
> On 10.12.2015 15:08, Chanwoo Choi wrote:
>> On 2015년 12월 10일 14:57, Krzysztof Kozlowski wrote:
>>> On 09.12.2015 13:08, Chanwoo Choi wrote:
This patch adds the bus noes using VDD_INT for Exynos4x12 SoC.
Exynos4x12 has the following AXI
On 10.12.2015 15:08, Chanwoo Choi wrote:
> On 2015년 12월 10일 14:57, Krzysztof Kozlowski wrote:
>> On 09.12.2015 13:08, Chanwoo Choi wrote:
>>> This patch adds the bus noes using VDD_INT for Exynos4x12 SoC.
>>> Exynos4x12 has the following AXI buses to translate data between
>>> DRAM and sub-blocks.
On 2015년 12월 10일 14:57, Krzysztof Kozlowski wrote:
> On 09.12.2015 13:08, Chanwoo Choi wrote:
>> This patch adds the bus noes using VDD_INT for Exynos4x12 SoC.
>> Exynos4x12 has the following AXI buses to translate data between
>> DRAM and sub-blocks.
>>
>> Following list specifies the detailed rel
On 09.12.2015 13:08, Chanwoo Choi wrote:
> This patch adds the bus noes using VDD_INT for Exynos4x12 SoC.
> Exynos4x12 has the following AXI buses to translate data between
> DRAM and sub-blocks.
>
> Following list specifies the detailed relation between DRAM and sub-blocks:
> - ACLK100 clock for
On 2015년 12월 10일 12:17, Krzysztof Kozlowski wrote:
> On 09.12.2015 13:08, Chanwoo Choi wrote:
>> This patch adds the bus noes using VDD_MIF for Exynos4x12 SoC.
>
> s/noes/nodes/
OK.
>
>> Exynos4x12 has the following AXI buses to translate data
>> between DRAM and DMC/ACP/C2C.
>>
>> Signed-off-b
Hi Anand,
On 2015년 12월 10일 13:14, Anand Moon wrote:
> Hi Chanwoo Choi,
>
> On 10 December 2015 at 05:42, Chanwoo Choi wrote:
>> Hi Anand,
>>
>> First of all, thanks for trying to test this series.
>>
>> On 2015년 12월 10일 04:05, Anand Moon wrote:
>>> Hi Chanwoo Choi,
>>>
>>> On 9 December 2015 at
Hi Chanwoo Choi,
On 10 December 2015 at 05:42, Chanwoo Choi wrote:
> Hi Anand,
>
> First of all, thanks for trying to test this series.
>
> On 2015년 12월 10일 04:05, Anand Moon wrote:
>> Hi Chanwoo Choi,
>>
>> On 9 December 2015 at 09:37, Chanwoo Choi wrote:
>>> This patch-set includes the two fea
On 09.12.2015 13:08, Chanwoo Choi wrote:
> This patch adds the bus noes using VDD_MIF for Exynos4x12 SoC.
s/noes/nodes/
> Exynos4x12 has the following AXI buses to translate data
> between DRAM and DMC/ACP/C2C.
>
> Signed-off-by: Chanwoo Choi
> ---
> arch/arm/boot/dts/exynos4x12.dtsi | 72
> +
On 2015년 12월 10일 11:09, Krzysztof Kozlowski wrote:
> On 09.12.2015 13:08, Chanwoo Choi wrote:
>> This patch adds the bus nodes using VDD_INT for Exynos3250 SoC.
>> Exynos3250 has following AXI buses to translate data between
>> DRAM and sub-blocks.
>>
>> Following list specifies the detailed relati
On 10.12.2015 11:17, Chanwoo Choi wrote:
> On 2015년 12월 10일 11:04, Krzysztof Kozlowski wrote:
>> On 10.12.2015 11:00, Chanwoo Choi wrote:
>>> On 2015년 12월 10일 10:20, Krzysztof Kozlowski wrote:
On 10.12.2015 10:09, Chanwoo Choi wrote:
> On 2015년 12월 10일 09:44, Krzysztof Kozlowski wrote:
>>>
On 09.12.2015 22:12, Linus Walleij wrote:
> The separate struct bgpio_chip has been a pain to handle, both
> by being confusingly similar in name to struct gpio_chip and
> for being contained inside a struct so that struct gpio_chip
> is contained in a struct contained in a struct, making several
>
On 2015년 12월 10일 10:22, Krzysztof Kozlowski wrote:
> On 10.12.2015 09:57, Krzysztof Kozlowski wrote:
>> On 09.12.2015 13:07, Chanwoo Choi wrote:
>>
>> (...)
>>
>>> .../devicetree/bindings/devfreq/exynos-bus.txt | 383 +++
>>
>> How about adding this file to the MAINTAINERS to devfreq exyno
On 2015년 12월 10일 11:04, Krzysztof Kozlowski wrote:
> On 10.12.2015 11:00, Chanwoo Choi wrote:
>> On 2015년 12월 10일 10:20, Krzysztof Kozlowski wrote:
>>> On 10.12.2015 10:09, Chanwoo Choi wrote:
On 2015년 12월 10일 09:44, Krzysztof Kozlowski wrote:
> On 09.12.2015 13:07, Chanwoo Choi wrote:
>>>
On 09.12.2015 13:08, Chanwoo Choi wrote:
> This patch adds the bus nodes using VDD_INT for Exynos3250 SoC.
> Exynos3250 has following AXI buses to translate data between
> DRAM and sub-blocks.
>
> Following list specifies the detailed relation between DRAM and sub-blocks:
> - ACLK400 clock for MCU
On 10.12.2015 11:00, Chanwoo Choi wrote:
> On 2015년 12월 10일 10:20, Krzysztof Kozlowski wrote:
>> On 10.12.2015 10:09, Chanwoo Choi wrote:
>>> On 2015년 12월 10일 09:44, Krzysztof Kozlowski wrote:
On 09.12.2015 13:07, Chanwoo Choi wrote:
> This patch adds the DMC (Dynamic Memory Controller) bu
On 2015년 12월 10일 10:20, Krzysztof Kozlowski wrote:
> On 10.12.2015 10:09, Chanwoo Choi wrote:
>> On 2015년 12월 10일 09:44, Krzysztof Kozlowski wrote:
>>> On 09.12.2015 13:07, Chanwoo Choi wrote:
This patch adds the DMC (Dynamic Memory Controller) bus node for
Exynos3250 SoC.
The DMC i
On 2015년 12월 10일 10:31, Krzysztof Kozlowski wrote:
> On 09.12.2015 13:08, Chanwoo Choi wrote:
>> This patch updates the documentation for passive bus devices and adds the
>> detailed example of Exynos3250.
>>
>> Signed-off-by: Chanwoo Choi
>> ---
>> .../devicetree/bindings/devfreq/exynos-bus.txt
On 2015년 12월 10일 10:25, Krzysztof Kozlowski wrote:
> On 10.12.2015 09:49, Chanwoo Choi wrote:
>> Hi,
>>
> (...)
>
>>>
+
+ bus_dmc: bus_dmc {
+ compatible = "samsung,exynos-bus";
+ clocks = <&cmu_dmc CLK_DIV_DMC>;
+ clock-names = "bus";
+
On 09.12.2015 13:08, Chanwoo Choi wrote:
> This patch updates the documentation for passive bus devices and adds the
> detailed example of Exynos3250.
>
> Signed-off-by: Chanwoo Choi
> ---
> .../devicetree/bindings/devfreq/exynos-bus.txt | 244
> -
> 1 file changed, 241
On 10.12.2015 09:49, Chanwoo Choi wrote:
> Hi,
>
(...)
>>
>>> +
>>> + bus_dmc: bus_dmc {
>>> + compatible = "samsung,exynos-bus";
>>> + clocks = <&cmu_dmc CLK_DIV_DMC>;
>>> + clock-names = "bus";
>>> + operating-points-v2 = <&bus_dmc_opp_table>;
>>> +
On 10.12.2015 09:57, Krzysztof Kozlowski wrote:
> On 09.12.2015 13:07, Chanwoo Choi wrote:
>
> (...)
>
>> .../devicetree/bindings/devfreq/exynos-bus.txt | 383 +++
>
> How about adding this file to the MAINTAINERS to devfreq exynos entry?
> Unfortunately, in current linux-next, I can fi
On 10.12.2015 10:09, Chanwoo Choi wrote:
> On 2015년 12월 10일 09:44, Krzysztof Kozlowski wrote:
>> On 09.12.2015 13:07, Chanwoo Choi wrote:
>>> This patch adds the DMC (Dynamic Memory Controller) bus node for Exynos3250
>>> SoC.
>>> The DMC is an AMBA AXI-compliant slave to interface external JEDEC
On 2015년 12월 10일 09:44, Krzysztof Kozlowski wrote:
> On 09.12.2015 13:07, Chanwoo Choi wrote:
>> This patch adds the DMC (Dynamic Memory Controller) bus node for Exynos3250
>> SoC.
>> The DMC is an AMBA AXI-compliant slave to interface external JEDEC standard
>> SDRAM devices. The bus includes the
On 09.12.2015 13:07, Chanwoo Choi wrote:
(...)
> .../devicetree/bindings/devfreq/exynos-bus.txt | 383 +++
How about adding this file to the MAINTAINERS to devfreq exynos entry?
Unfortunately, in current linux-next, I can find the entry for devfreq
exynos. However I saw patches adding s
On 2015년 12월 10일 09:53, Krzysztof Kozlowski wrote:
> On 09.12.2015 13:07, Chanwoo Choi wrote:
>> This patch adds the DMC (Dynamic Memory Controller) bus frequency node
>> which includes the devfreq-events and regulator properties. The bus
>> frequency support the DVFS (Dynamic Voltage Frequency Sca
On 09.12.2015 13:07, Chanwoo Choi wrote:
> This patch adds the DMC (Dynamic Memory Controller) bus frequency node
> which includes the devfreq-events and regulator properties. The bus
> frequency support the DVFS (Dynamic Voltage Frequency Scaling) feature
> with ondemand governor.
>
> The devfreq
Hi,
On 2015년 12월 10일 09:39, Krzysztof Kozlowski wrote:
> On 09.12.2015 13:07, Chanwoo Choi wrote:
>> This patch adds the documentation for generic exynos bus frequency
>> driver.
>>
>> Signed-off-by: Chanwoo Choi
>> ---
>> .../devicetree/bindings/devfreq/exynos-bus.txt | 94
>> +
On 09.12.2015 13:07, Chanwoo Choi wrote:
> This patch adds the DMC (Dynamic Memory Controller) bus node for Exynos3250
> SoC.
> The DMC is an AMBA AXI-compliant slave to interface external JEDEC standard
> SDRAM devices. The bus includes the OPP tables and the source clock for DMC
> block.
>
> Fo
On 09.12.2015 13:07, Chanwoo Choi wrote:
> This patch adds the documentation for generic exynos bus frequency
> driver.
>
> Signed-off-by: Chanwoo Choi
> ---
> .../devicetree/bindings/devfreq/exynos-bus.txt | 94
> ++
> 1 file changed, 94 insertions(+)
> create mode 100
Hi Anand,
First of all, thanks for trying to test this series.
On 2015년 12월 10일 04:05, Anand Moon wrote:
> Hi Chanwoo Choi,
>
> On 9 December 2015 at 09:37, Chanwoo Choi wrote:
>> This patch-set includes the two features as following. The generic exynos bus
>> frequency driver is able to suppor
On Wed, Dec 09, 2015 at 02:12:40PM +0100, Linus Walleij wrote:
...
> @@ -55,16 +54,16 @@ static int moxart_gpio_probe(struct platform_device *pdev)
> return ret;
> }
>
> - bgc->gc.label = "moxart-gpio";
> - bgc->gc.request = gpiochip_generic_request;
> - bgc->gc.fr
* Linus Walleij [151209 05:14]:
> The separate struct bgpio_chip has been a pain to handle, both
> by being confusingly similar in name to struct gpio_chip and
> for being contained inside a struct so that struct gpio_chip
> is contained in a struct contained in a struct, making several
> steps of
Hi Chanwoo Choi,
On 9 December 2015 at 09:37, Chanwoo Choi wrote:
> This patch-set includes the two features as following. The generic exynos bus
> frequency driver is able to support almost Exynos SoCs for bus frequency
> scaling. And the new passive governor is able to make the dependency on
>
On Wednesday, December 09, 2015 6:13 AM, Linus Walleij wrote:
> The separate struct bgpio_chip has been a pain to handle, both
> by being confusingly similar in name to struct gpio_chip and
> for being contained inside a struct so that struct gpio_chip
> is contained in a struct contained in a stru
On Wed, Dec 09, 2015 at 02:12:40PM +0100, Linus Walleij wrote:
> The separate struct bgpio_chip has been a pain to handle, both
> by being confusingly similar in name to struct gpio_chip and
> for being contained inside a struct so that struct gpio_chip
> is contained in a struct contained in a str
Hi Yakir,
Am Mittwoch, 9. Dezember 2015, 11:49:10 schrieb Yakir Yang:
> Thanks a lot for great debugging.
>
> On 12/08/2015 11:33 PM, Heiko Stübner wrote:
> > Hi Yakir,
> >
> > Am Montag, 7. Dezember 2015, 14:37:19 schrieb Yakir Yang:
> >> The Samsung Exynos eDP controller and Rockchip RK328
Exynos and Samsung S5P platforms has been fully converted to device
tree, so old platform device based init data can be now removed.
Signed-off-by: Marek Szyprowski
---
drivers/media/platform/exynos4-is/fimc-core.c | 50 ---
1 file changed, 50 deletions(-)
diff --git
Exynos and Samsung S5P platforms has been fully converted to device
tree, so old platform device based init data can be now removed.
Signed-off-by: Marek Szyprowski
---
drivers/media/platform/s5p-mfc/s5p_mfc.c | 37 +---
1 file changed, 5 insertions(+), 32 deletio
Exynos platform has been fully converted to device tree, so old platform
device based init data can be now removed.
Signed-off-by: Marek Szyprowski
---
drivers/media/platform/exynos-gsc/gsc-core.c | 33 +---
drivers/media/platform/exynos-gsc/gsc-core.h | 1 -
2 files cha
Exynos and Samsung S5P platforms has been fully converted to device
tree, so old platform device based init data can be now removed.
Signed-off-by: Marek Szyprowski
---
drivers/media/platform/s5p-g2d/g2d.c | 27 +--
drivers/media/platform/s5p-g2d/g2d.h | 5 -
2 f
All multimedia devices found on Exynos SoCs support only contiguous
buffers, so set DMA max segment size to DMA_BIT_MASK(32) to let memory
allocator to correctly create contiguous memory mappings.
Signed-off-by: Marek Szyprowski
---
drivers/media/platform/exynos-gsc/gsc-core.c | 1 +
drivers/me
This patch adds support for IOMMU to s5p-mfc device driver. MFC firmware
is limited and it cannot use the default configuration. If IOMMU is
available, the patch disables the default DMA address space
configuration and creates a new address space of size limited to 256M
and base address set to 0x20
Hello,
This patchset finally perform cleanup of custom code in s5p-mfc codec
driver. The first part is removal of custom, driver specific code for
intializing and handling of reserved memory. Instead, a generic code for
reserved memory regions is used. Then, once it is done, the proper setup
of DM
Enable support for Multimedia Codec (MFC) device for all Exynos4412-based
Odroid boards.
Signed-off-by: Marek Szyprowski
---
arch/arm/boot/dts/exynos4412-odroid-common.dtsi | 24
1 file changed, 24 insertions(+)
diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dt
This patch removes custom code for initialization and handling of
reserved memory regions in s5p-mfc driver and replaces it with generic
named reserved memory regions specified in device tree.
s5p-mfc driver now handles two reserved memory regions: "left" and
"right", defined by generic reserved m
Add a helper function for device drivers to set DMA's max_seg_size.
Setting it to largest possible value lets DMA-mapping API always create
contiguous mappings in DMA address space. This is essential for all
devices, which use dma-contig videobuf2 memory allocator and shared
buffers.
Signed-off-by
This patch replaces custom properties for definining reserved memory
regions with generic reserved memory bindings. All custom code for
handling MFC-specific reserved memory can be now removed from Exynos-DT
generic board code.
Signed-off-by: Marek Szyprowski
---
.../devicetree/bindings/media/s5
This patch allows device drivers to initialize more than one reserved
memory region assigned to given device. When driver needs to use more
than one reserved memory region, it should allocate child devices and
initialize regions by index or name for each of its child devices.
Signed-off-by: Marek
W dniu 09.12.2015 o 17:07, Marek Szyprowski pisze:
> Add support for restoring GScaler parent clocks configuration when GSCL
> power domain is turned on.
>
> Signed-off-by: Marek Szyprowski
> ---
> arch/arm/boot/dts/exynos5420.dtsi | 6 --
> 1 file changed, 4 insertions(+), 2 deletions(-)
C
W dniu 09.12.2015 o 19:14, Sylwester Nawrocki pisze:
> Adding Stephen and linux-clk at Cc.
>
> On 09/12/15 05:49, Krzysztof Kozlowski wrote:
>> On 08.12.2015 22:46, Marek Szyprowski wrote:
This patch adds clocks, which are required for preserving parent clock
configuration on GSCL power
Hello Bartlomiej,
On 12/07/2015 03:18 PM, Bartlomiej Zolnierkiewicz wrote:
> Hi,
>
> This patch series adds generic cpufreq-dt driver support for
> Exynos542x/5800 (using the new CPU clock type which allows it).
>
> It has been tested on Exynos5422 based ODROID-XU3 Lite board.
>
I tested on an
The separate struct bgpio_chip has been a pain to handle, both
by being confusingly similar in name to struct gpio_chip and
for being contained inside a struct so that struct gpio_chip
is contained in a struct contained in a struct, making several
steps of dereferencing necessary.
Make things simp
Hello Inki,
On 11/27/2015 10:00 AM, Javier Martinez Canillas wrote:
> Hello Andrzej,
>
> On 11/27/2015 03:57 AM, Andrzej Hajda wrote:
>> Since atomic check is called also for disabled crtcs it should skip
>> mode checking as it can be uninitialized. The patch fixes it.
>>
>> Signed-off-by: Andrze
Adding Stephen and linux-clk at Cc.
On 09/12/15 05:49, Krzysztof Kozlowski wrote:
> On 08.12.2015 22:46, Marek Szyprowski wrote:
>> > This patch adds clocks, which are required for preserving parent clock
>> > configuration on GSCL power domain on/off.
>> >
>> > Signed-off-by: Marek Szyprowski
>
Hello,
On 2015-12-08 15:58, Rob Herring wrote:
On Mon, Dec 7, 2015 at 6:08 AM, Marek Szyprowski
wrote:
This patch allows device drivers to use more than one reserved memory
region assigned to given device. When NULL name is passed to
of_reserved_mem_device_init(), the default (first) region is
Hi Brian,
On Tue, 8 Dec 2015 16:17:41 -0800
Brian Norris wrote:
>
> > diff --git a/drivers/mtd/nand/cmx270_nand.c b/drivers/mtd/nand/cmx270_nand.c
> > index 43bded6..84d027e 100644
> > --- a/drivers/mtd/nand/cmx270_nand.c
> > +++ b/drivers/mtd/nand/cmx270_nand.c
> > @@ -160,10 +160,8 @@ static
Hi Brian,
On Tue, 8 Dec 2015 16:36:24 -0800
Brian Norris wrote:
> Hi,
>
> On Tue, Dec 01, 2015 at 12:02:57PM +0100, Boris Brezillon wrote:
> > Hello,
> >
> > This huge series aims at clarifying the relationship between the mtd and
> > nand_chip structures and hiding NAND framework internals to
Add support for restoring GScaler parent clocks configuration when GSCL
power domain is turned on.
Signed-off-by: Marek Szyprowski
---
arch/arm/boot/dts/exynos5420.dtsi | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5420.dtsi
b/arch/arm/boot/dt
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