On Thu, Dec 3, 2015 at 5:10 PM, Krzysztof Kozlowski
wrote:
> Bindings for Samsung S2M and S5M family PMICs are in mess. They are
> spread over different files and subdirectories in a non-consistent way.
> The devices and respective drivers for them share a lot in common so
> everything could be or
Hi Jingoo,
Okay, fine, I would drop this patch, until I found the the root cause.
- Yakir
On 12/23/2015 11:10 PM, Jingoo Han wrote:
On Wednesday, December 23, 2015 9:51 PM, Yakir Yang wrote:
On Rockchip platform, sometimes driver would failed at reading EDID
message, and it's caused by the AU
On Wednesday, December 23, 2015 3:01 PM, Yakir Yang wrote:
>
> Hi Jingoo,
>
> On 12/23/2015 12:24 PM, Yakir Yang wrote:
> > Hi Jingoo,
> >
> > On 12/22/2015 08:26 PM, Jingoo Han wrote:
> >> On Wednesday, December 16, 2015 12:58 PM, Yakir Yang wrote:
> >>> After test on rockchiop platform, i found
On Wednesday, December 23, 2015 9:51 PM, Yakir Yang wrote:
>
> On Rockchip platform, sometimes driver would failed at reading EDID
> message, and it's caused by the AUX reply flag wouldn't received under
> the 100*10us wait time.
The problem is specific for Rockchip platform.
Also, 1 ms is long t
It may caused a dead lock if we flush the hpd work in bridge disable time.
The normal flow would like:
IN --> DRM IOCTL
1. Acquire crtc_ww_class_mutex (DRM IOCTL)
IN --> analogix_dp_bridge
2. Acquire hpd work lock (Flush hpd work)
3. HPD work already in idle, no need to
Turn off the panel power in suspend time would help to reduce
power waste.
Signed-off-by: Yakir Yang
---
Changes in v12: None
Changes in v11: None
Changes in v10: None
Changes in v9: None
Changes in v8: None
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes i
On Rockchip platform, sometimes driver would failed at reading EDID
message, and it's caused by the AUX reply flag wouldn't received under
the 100*10us wait time.
But after expand the wait time a little, the AUX reply flag would be
set, so maybe the wait time is a little critical. Besides the anal
Display Port monitor could support kinds of mode which indicate
in monitor edid, not just one single display resolution which
defined in panel or devivetree property display timing.
Note: Gustavo Padovan try to remove the controller and phy
power on function in bind time at bellow commit:
This change just make a little clean to make code more like
drm core expect, move hdp detect code from bridge->enable(),
and place them into connector->detect().
Note: Gustavo Padovan try to remove the controller and phy
power on function in bind time at bellow commit:
drm/exynos: do not s
Some edp screen do not have hpd signal, so we can't just return
failed when hpd plug in detect failed.
This is an hardware property, so we need add a devicetree property
"analogix,need-force-hpd" to indicate this sutiation.
Signed-off-by: Yakir Yang
Acked-by: Rob Herring
Tested-by: Javier Marti
There are some IP limit on rk3288 that only support 4 physical lanes
of 2.7/1.6 Gbps/lane, so seprate them out by device_type flag.
Signed-off-by: Yakir Yang
Tested-by: Javier Martinez Canillas
---
Changes in v12: None
Changes in v11: None
Changes in v10:
- Remove the surplus "plat_data" check.
RK3288 need some special registers setting, we can separate
them out by the dev_type of plat_data.
Signed-off-by: Yakir Yang
---
Changes in v12: None
Changes in v11: None
Changes in v10: None
Changes in v9: None
Changes in v8: None
Changes in v7: None
Changes in v6: None
Changes in v5: None
Chang
Add dt binding documentation for rockchip display port PHY.
Signed-off-by: Yakir Yang
Acked-by: Rob Herring
Reviewed-by: Heiko Stuebner
---
Changes in v12: None
Changes in v11:
- Correct the title of this rockchip dp phy document(Rob)
- Add the ack from Rob Herring
Changes in v10: None
Changes
Add phy driver for the Rockchip DisplayPort PHY module. This
is required to get DisplayPort working in Rockchip SoCs.
Signed-off-by: Yakir Yang
Reviewed-by: Heiko Stuebner
---
Changes in v12:
- Re-order the include headers file alphabetically in phy-rockchip-dp.c (Jingoo)
Changes in v11: None
C
Rockchip DP driver is a helper driver of analogix_dp coder driver,
so most of the DT property should be descriped in analogix_dp document.
Signed-off-by: Yakir Yang
Acked-by: Rob Herring
Reviewed-by: Heiko Stuebner
---
Changes in v12: None
Changes in v11: None
Changes in v10:
- Add the ack from
Rockchip have three clocks for dp controller, we leave pclk_edp
to analogix_dp driver control, and keep the sclk_edp_24m and
sclk_edp in platform driver.
Signed-off-by: Yakir Yang
---
Changes in v12: None
Changes in v11: None
Changes in v10:
- Correct the ROCKCHIP_ANALOGIX_DP indentation in Kconf
link_rate and lane_count already configured in analogix_dp_set_link_train(),
so we don't need to config those repeatly after training finished, just
remove them out.
Beside Display Port 1.2 already support 5.4Gbps link rate, the maximum sets
would change from {1.62Gbps, 2.7Gbps} to {1.62Gbps, 2.7G
Analogix dp driver is split from exynos dp driver, so we just
make an copy of exynos_dp.txt, and then simplify exynos_dp.txt
Beside update some exynos dtsi file with the latest change
according to the devicetree binding documents.
Signed-off-by: Yakir Yang
Acked-by: Rob Herring
---
Changes in v
Both hsync/vsync polarity and interlace mode can be parsed from
drm display mode, and dynamic_range and ycbcr_coeff can be judge
by the video code.
But presumably Exynos still relies on the DT properties, so take
good use of mode_fixup() in to achieve the compatibility hacks.
Signed-off-by: Yakir
After exynos_dp have been split the common IP code into analogix_dp driver,
the analogix_dp driver have deprecated some Samsung platform properties which
could be dynamically parsed from EDID/MODE/DPCD message, so this is an update
for Exynos DTS file for dp-controller.
Beside the backward compati
Fix some obvious alignment problems, like alignment and line
over 80 characters problems, make this easy to be maintained
later.
Signed-off-by: Yakir Yang
Acked-by: Jingoo Han
Reviewed-by: Krzysztof Kozlowski
Tested-by: Javier Martinez Canillas
---
Changes in v12:
- Add the ack from Jingoo
Ch
Hi all,
The Samsung Exynos eDP controller and Rockchip RK3288 eDP controller
share the same IP, so a lot of parts can be re-used. I split the common
code into bridge directory, then rk3288 and exynos only need to keep
some platform code. Cause I can't find the exact IP name of exynos dp
contro
W dniu 18.12.2015 o 18:16, Pavel Fedin pisze:
> Hello!
>
>> 4. This branch is not pushed to linux-next. I will sort it out if my
>> previous pull requests get in. I will be out of office for Christmas so
>> depending on the timing of {arm-soc,Christmas,Kukjin} this may or may
>> not go into v4.5
On Wed, Dec 23, 2015 at 08:20:43AM +0100, Julia Lawall wrote:
> On Wed, 23 Dec 2015, Mark Brown wrote:
> > On Sat, Dec 19, 2015 at 03:58:00PM +0100, Julia Lawall wrote:
> > > The regulator_ops structures are never modified, so declare them as const.
> > > Done with the help of Coccinelle.
> > Th
set_state_oneshot_stopped() is called by the clkevt core, when the next
event is required at an expiry time of 'KTIME_MAX'. This normally
happens with NO_HZ_{IDLE|FULL} in both LOWRES/HIGHRES modes.
This patch makes the clockevent device to stop on such an event, to
avoid spurious interrupts, as e
W dniu 23.12.2015 o 20:06, Tomasz Figa pisze:
> 2015-12-23 19:58 GMT+09:00 Krzysztof Kozlowski :
>> W dniu 23.12.2015 o 19:54, Tomasz Figa pisze:
>>> Hi,
>>>
>>> 2015-12-23 19:51 GMT+09:00 Krzysztof Kozlowski :
W dniu 22.12.2015 o 13:50, Olof Johansson pisze:
> On Wed, Dec 02, 2015 at 10:3
2015-12-23 19:58 GMT+09:00 Krzysztof Kozlowski :
> W dniu 23.12.2015 o 19:54, Tomasz Figa pisze:
>> Hi,
>>
>> 2015-12-23 19:51 GMT+09:00 Krzysztof Kozlowski :
>>> W dniu 22.12.2015 o 13:50, Olof Johansson pisze:
On Wed, Dec 02, 2015 at 10:39:42AM +0900, Krzysztof Kozlowski wrote:
> Hi Kukj
On Wed, Dec 23, 2015 at 11:59:25AM +0100, Marek Szyprowski wrote:
> This patch ensures that existing bus match callbacks don't return
> negative values (which might be interpreted as potential errors in the
> future) in case of positive match.
This actually can't return a negative number - only va
W dniu 22.12.2015 o 13:52, Olof Johansson pisze:
> On Wed, Dec 02, 2015 at 10:39:44AM +0900, Krzysztof Kozlowski wrote:
>> Hi Kukjin,
>>
>> A lot of stuff here, mostly cleanups. Description in tag.
>>
>> Best regards,
>> Krzysztof
>>
>>
>> The following changes since commit 8005c49d9aea74d382f474ce
From: Tomeu Vizoso
Allow implementations of the match() callback in struct bus_type to
return errors and if it's -EPROBE_DEFER then queue the device for
deferred probing.
This is useful to buses such as AMBA in which devices are registered
before their matching information can be retrieved from
To read pid/cid registers, the probed device need to be properly turned on.
When it is inside a power domain, the bus code should ensure that the
given power domain is enabled before trying to access device's registers.
Signed-off-by: Marek Szyprowski
Reviewed-by: Ulf Hansson
---
drivers/amba/b
From: Tomeu Vizoso
Reading the periphid when the Primecell device is registered means that
the apb pclk must be available by then or the device won't be registered
at all.
By reading the periphid in amba_match() we can return -EPROBE_DEFER if
the apb pclk isn't there yet and the device will be r
From: Dan Williams
This patch ensures that existing bus match callbacks don't return
negative values (which might be interpreted as potential errors in the
future) in case of positive match.
Signed-off-by: Dan Williams
Signed-off-by: Marek Szyprowski
---
drivers/nvdimm/bus.c | 2 +-
1 file ch
This patch ensures that existing bus match callbacks don't return
negative values (which might be interpreted as potential errors in the
future) in case of positive match.
Signed-off-by: Marek Szyprowski
---
arch/arm/common/sa.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --g
(Old thread name: Exynos4210: fix power domain for MDMA1 device)
This patchset fixes mysterious boot hang on Exynos 4210 SoCs, when IOMMU
is enabled. There is no direct dependency between IOMMU devices and
MDMA1. However enabling IOMMU changes the device probe order, what
results in LCD0 power dom
W dniu 23.12.2015 o 19:54, Tomasz Figa pisze:
> Hi,
>
> 2015-12-23 19:51 GMT+09:00 Krzysztof Kozlowski :
>> W dniu 22.12.2015 o 13:50, Olof Johansson pisze:
>>> On Wed, Dec 02, 2015 at 10:39:42AM +0900, Krzysztof Kozlowski wrote:
Hi Kukjin,
Pinctrl for v4.5.
Best regards,
W dniu 22.12.2015 o 13:51, Olof Johansson pisze:
> On Wed, Dec 02, 2015 at 10:39:43AM +0900, Krzysztof Kozlowski wrote:
>> Hi Kukjin,
>>
>> This is also clock dependency. I put it in separate tag in case clock
>> folks want to pull it also.
>>
>> Best regards,
>> Krzysztof
>>
>>
>> The following ch
2015-12-23 19:54 GMT+09:00 Tomasz Figa :
> Hi,
>
> 2015-12-23 19:51 GMT+09:00 Krzysztof Kozlowski :
>> W dniu 22.12.2015 o 13:50, Olof Johansson pisze:
>>> On Wed, Dec 02, 2015 at 10:39:42AM +0900, Krzysztof Kozlowski wrote:
Hi Kukjin,
Pinctrl for v4.5.
Best regards,
K
Hi,
2015-12-23 19:51 GMT+09:00 Krzysztof Kozlowski :
> W dniu 22.12.2015 o 13:50, Olof Johansson pisze:
>> On Wed, Dec 02, 2015 at 10:39:42AM +0900, Krzysztof Kozlowski wrote:
>>> Hi Kukjin,
>>>
>>> Pinctrl for v4.5.
>>>
>>> Best regards,
>>> Krzysztof
>>>
>>>
>>> The following changes since commi
W dniu 22.12.2015 o 13:50, Olof Johansson pisze:
> On Wed, Dec 02, 2015 at 10:39:42AM +0900, Krzysztof Kozlowski wrote:
>> Hi Kukjin,
>>
>> Pinctrl for v4.5.
>>
>> Best regards,
>> Krzysztof
>>
>>
>> The following changes since commit 8005c49d9aea74d382f474ce11afbbc7d7130bec:
>>
>> Linux 4.4-rc1
W dniu 22.12.2015 o 13:49, Olof Johansson pisze:
> On Wed, Dec 02, 2015 at 10:39:41AM +0900, Krzysztof Kozlowski wrote:
>> Hi Kukjin,
>>
>> ARM64 change touch also defconfig.
>>
>> Best regards,
>> Krzysztof
>>
>>
>> The following changes since commit 8005c49d9aea74d382f474ce11afbbc7d7130bec:
>>
>>
W dniu 22.12.2015 o 13:46, Olof Johansson pisze:
> On Wed, Dec 02, 2015 at 10:39:40AM +0900, Krzysztof Kozlowski wrote:
>> Hi Kukjin,
>>
>> Dependency for soc64 changes.
>>
>> Best regards,
>> Krzysztof
>>
>>
>> The following changes since commit 8005c49d9aea74d382f474ce11afbbc7d7130bec:
>>
>> Li
From: Krzysztof Kozlowski
For Odroid XU3-family enable the:
- PWM fan (to control the CPU fan using thermal subsystem),
- TI INA231 sensors (provide power measurements of big.LITTLE cores,
DRAM and GPU),
- Samsung sound (for Odroid XU3 and Snow as well).
Signed-off-by: Krzysztof Kozlowski
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