Re: [PATCH] I2C: EXYNOS: High speed mode clock setting for HSI2C

2013-04-19 Thread Wolfram Sang
On Fri, Apr 19, 2013 at 05:26:23PM +0530, Yuvaraj Kumar C D wrote: > This patch configure the High speed mode timing register using the > clock speed mentioned in the dts file.Also it configure the MASTER_ID > for High speed i2c transfer. > For i2c high speed transaction, tarnsaction initially star

[PATCH] I2C: EXYNOS: High speed mode clock setting for HSI2C

2013-04-19 Thread Yuvaraj Kumar C D
This patch configure the High speed mode timing register using the clock speed mentioned in the dts file.Also it configure the MASTER_ID for High speed i2c transfer. For i2c high speed transaction, tarnsaction initially starts with the fast mode i,e 400Kbits/sec and then switches to high speed mode