Currently these SoCs claim TRIM_RELOAD support but don't have
triminfo_ctrl register address defined in their struct
exynos_tmu_registers entries. This causes incorrect write of
value "1" to data->base + 0x00 address (which happens to be
TRIMINFO register). Fix it by removing TMU_SUPPORT_TRIM_REL
Hello Bartlomiej,
On Wed, Aug 20, 2014 at 02:04:18PM +0200, Bartlomiej Zolnierkiewicz wrote:
> Currently these SoCs claim TRIM_RELOAD support but don't have
> triminfo_ctrl register address defined in their struct
> exynos_tmu_registers entries. This causes incorrect write of
> value "1" to data-
