On 20 February 2014 11:35, Sachin Kamat sachin.ka...@linaro.org wrote:
Instead of hardcoding the SYSRAM details for each SoC,
pass this information through device tree (DT) and make
the code SoC agnostic.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
Based on top of my earlier
On 05.03.2014 09:23, Sachin Kamat wrote:
diff --git a/arch/arm/boot/dts/exynos4210-universal_c210.dts
b/arch/arm/boot/dts/exynos4210-universal_c210.dts
index d2e3f5f5916d..3ca3fb6aa5f4 100644
--- a/arch/arm/boot/dts/exynos4210-universal_c210.dts
+++
On 05.03.2014 16:36, Sachin Kamat wrote:
On 5 March 2014 18:56, Andreas Oberritter o...@saftware.de wrote:
On 05.03.2014 09:23, Sachin Kamat wrote:
diff --git a/arch/arm/boot/dts/exynos4210-universal_c210.dts
b/arch/arm/boot/dts/exynos4210-universal_c210.dts
index d2e3f5f5916d..3ca3fb6aa5f4
Instead of hardcoding the SYSRAM details for each SoC,
pass this information through device tree (DT) and make
the code SoC agnostic.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
---
Based on top of my earlier patch
ARM: EXYNOS: Consolidate CPU init code at