Hi Thomas,
On Tuesday 04 of December 2012 14:29:24 Thomas Abraham wrote:
> On 27 November 2012 17:52, Prasanna Kumar
wrote:
> > From: Prasanna Kumar
> >
> > This patch adds a software workaround to the hardware
> > problem found in exynos5 while powergating.
> >
> > It is observed that CLK_TO
Hi Thomas,
Thanks for the comments.Please find my reply inline.
On Tue, Dec 4, 2012 at 2:29 PM, Thomas Abraham
wrote:
>
> On 27 November 2012 17:52, Prasanna Kumar wrote:
> > From: Prasanna Kumar
> >
> > This patch adds a software workaround to the hardware
> > problem found in exynos5 while p
On 27 November 2012 17:52, Prasanna Kumar wrote:
> From: Prasanna Kumar
>
> This patch adds a software workaround to the hardware
> problem found in exynos5 while powergating.
>
> It is observed that CLK_TOP_SRC3 register gets modified if
> the G-Scaler/MFC devices are power gated. The clock for
From: Prasanna Kumar
This patch adds a software workaround to the hardware
problem found in exynos5 while powergating.
It is observed that CLK_TOP_SRC3 register gets modified if
the G-Scaler/MFC devices are power gated. The clock for G-Scaler gets
set to XXTI which results in the device running