On Thursday, December 08, 2011, Mark Brown wrote:
On Wed, Dec 07, 2011 at 10:44:02PM +0100, Rafael J. Wysocki wrote:
On Friday, December 02, 2011, Mark Brown wrote:
May as well, yes - I didn't actually measure how long it tends to take
to do the spin but it's not going to hurt.
Are
On Thursday, December 08, 2011, Rafael J. Wysocki wrote:
On Thursday, December 08, 2011, Mark Brown wrote:
On Wed, Dec 07, 2011 at 10:44:02PM +0100, Rafael J. Wysocki wrote:
On Friday, December 02, 2011, Mark Brown wrote:
May as well, yes - I didn't actually measure how long it tends
On Friday, December 02, 2011, Mark Brown wrote:
On Fri, Dec 02, 2011 at 09:10:27PM +0100, Sylwester Nawrocki wrote:
+ /* Not all domains provide power status readback */
+ if (pd-pwr_stat) {
+ while (retry--)
+ if (__raw_readl(S3C64XX_BLK_PWR_STAT)
On Wed, Dec 07, 2011 at 10:44:02PM +0100, Rafael J. Wysocki wrote:
On Friday, December 02, 2011, Mark Brown wrote:
May as well, yes - I didn't actually measure how long it tends to take
to do the spin but it's not going to hurt.
Are you going to post an updated patch?
I've resent it but
Hi,
W dniu 2 grudnia 2011 01:56 użytkownik Mark Brown
broo...@opensource.wolfsonmicro.com napisał:
On Fri, Dec 02, 2011 at 09:35:44AM +0900, Kyungmin Park wrote:
I'm not sure what's the next step at s3c64xx for generic power domain.
Related with exysno4 series, it's helpful to read following
On Fri, Dec 02, 2011 at 07:25:01PM +0100, Tomasz Figa wrote:
Please do not forget that there might be some drivers not yet submited
to mainline and mainline should not break them with an assumption that
there are no such drivers.
For example, there is an on-going work on an open source
Hi Mark,
good to see someone adding a proper power domain support for s3c64xx.
On 12/01/2011 07:48 PM, Mark Brown wrote:
The S3C64xx SoCs contain a set of gateable power domains which can be
enabled and disabled at runtime in order to save power. Use the generic
power domain code to
On Fri, Dec 02, 2011 at 09:10:27PM +0100, Sylwester Nawrocki wrote:
+ /* Not all domains provide power status readback */
+ if (pd-pwr_stat) {
+ while (retry--)
+ if (__raw_readl(S3C64XX_BLK_PWR_STAT) pd-pwr_stat)
+ break;
How
The S3C64xx SoCs contain a set of gateable power domains which can be
enabled and disabled at runtime in order to save power. Use the generic
power domain code to implement support for these in software, enabling
runtime control of most domains:
- ETM (not supported in mainline).
- Domain G:
Hi Mark,
I'm not sure what's the next step at s3c64xx for generic power domain.
Related with exysno4 series, it's helpful to read following threads.
http://68.183.106.108/lists/linux-pm/msg26291.html
I don't think we should control/gate the clocks with regarding power
domain from Mr. Kim
Thank
On Fri, Dec 02, 2011 at 09:35:44AM +0900, Kyungmin Park wrote:
I'm not sure what's the next step at s3c64xx for generic power domain.
Related with exysno4 series, it's helpful to read following threads.
http://68.183.106.108/lists/linux-pm/msg26291.html
I don't think we should control/gate
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